TDLM06100 Product Specification
TDLM06100 Product Specification
Features
Figure 1 • TDLM06100 Functional Diagram
• Monolithic drop-in solution with no external bias
components
• Adjustable low power limiting threshold from
+7 dBm to +13 dBm
POUT
• High maximum power handling of 50 dBm,
P1dB
100 W pulsed
RF1 RF2
• Positive threshold control from +0 V to +0.3 V
• Fast response time of less than 1 ns
• Packaging – 24-pad 4 × 4 × 0.85 mm CLGA PIN
• Qualified for use in harsh environments
Voltage Control and ESD
Applications
• Satellite transceivers and antennas VCTRL
• Sensitive orbital T/R Modules
• Radar
Product Description
The TDLM06100 is a RF power limiter qualified for operating in harsh environments, including military, space ,
avionics and medical applications.
Unlike traditional PIN diode solutions, the TDLM06100 achieves an adjustable input 1dB compression point or
limiting threshold via a low current control voltage (VCTRL), eliminating the need for external bias components
such as DC blocking capacitors, RF choke inductors and bias resistors.
It delivers low insertion loss and high linearity under non-limiting power levels and extremely fast response
time in a limiting event, ensuring protection of sensitive circuitry. It also offers excellent ESD rating and ESD
protection.
The TDLM06100 is a monolithic solution manufactured on a ruggedized process offering the performance of
GaAs with the economy and integration of conventional CMOS.
©2020, Teledyne e2v HiRel Electronics. All rights reserved. • Headquarters: 765 Sycamore Dr, Milpitas, CA, 95035
www.tdehirel.com DOC-TDLM06100_4_2020_Rev-
TDLM06100
Power Limiter
ESD Precautions
When handling this device, observe the same precautions as with any other ESD-sensitive devices. Although
this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid
exceeding the rating specified in Table 1.
Latch-up Immunity
The TDLM06100 is immune to latch-up.
Notes:
1) Pulsed, 1.0% duty cycle of 10 µs pulse width in 1 ms period, 50Ω at +25 °C.
2) Human body model (MIL-STD 883 Method 3015).
3) Charged device model (JEDEC JESD22-C101).
Electrical Specifications
Table 3 provides the TDLM06100 key electrical specifications at -55 °C to +105 °C (ZS = ZL = 50Ω),
unless otherwise specified.
10 MHz–3 GHz 22 dB
Return loss TA = +25 °C
3–6 GHz 12 dB
Notes:
1) Measured with +30 dBm CW applied at input.
2) This mode requires the control voltage to toggle between +3.0V and 0V. At +3.0V, the limiter equivalent circuit is a low impedance to ground,
reflecting most of the incident power back to the source.
3) State change is VCTRL toggle from 0V to +3.0V.
4) Pulsed, 1% duty cycle of 10 µs pulse width in 1 ms period, 50Ω @ +25 °C.
Figure 2 • Power De-rating Curve, 10 MHz–6 GHz, +25 °C to +105 °C Ambient, CW, 50Ω(*)
25 C 85 C 105 C
37
36
Suggested Power (dBm)
35
34
33
32
31
30
29
28
27
1.00E+05 1.00E+06 1.00E+07 1.00E+08 1.00E+09 6.00E+09
Frequency (Hz)
Note: * High frequency CW power handling can be improved with 0.30pF capacitive matching on input and output RF ports.
Note: Figures 4-17 were taken using a 12L, 3x3 mm Plastic QFN Package
Figure 4 • Input Return Loss vs Temp Figure 5 • Output Return Loss vs Temp
-10 -10
-15 -15
-20 -20
-25 -25
-30 -30
-35 -35
-40 -40
-45 -45
0 1 2 3 4 5 6 0 1 2 3 4 5 6
Frequency (GHz) Frequency (GHz)
Figure 6 • POUT vs PIN Over VCTRL (Limiting Mode @ Figure 9 • POUT vs PIN Over VCTRL (Reflecting Mode @
915 MHz) 915 MHz)
0V 0.15 V 0.3 V 1V 2V 3V
20 0
18 -10
16
Pout (dBm)
Pout (dBm)
14 -20
12 -30
10 -40
8
6 -50
4 -60
2
0 -70
-2 -80
0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40
Pin (dBm) Pin (dBm)
Figure 7 • POUT vs PIN Over VCTRL (Limiting Mode @ Figure 10 • POUT vs PIN Over VCTRL (Reflecting Mode @
6 GHz) 6 GHz)
0V 0.15 V 0.3 V 1V 2V 3V
20 0
18
16 -10
Pout (dBm)
Pout (dBm)
14 -20
12
10 -30
8
6 -40
4
2 -50
0
-2 -60
0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35
Figure 8 • P1dB vs VCTRL Over Temp @ 915 MHz Figure 11 • P1dB vs VCTRL Over Temp @ 6 GHz
12 12
P1dB (dBm)
10
P1dB (dB)
10
8 8
6 6
4 4
2
2
0
0
0 0.05 0.1 0.15 0.2 0.25 0.3
0 0.05 0.1 0.15 0.2 0.25 0.3
VCTRL (V) VCTRL (V)
Figure 12 • Leakage Power @ PMAX vs VCTRL Over Temp Figure 15 • Leakage Power @ PMAX vs VCTRL Over Temp
@ 915 MHz @ 6 GHz
14 14
12 12
10 10
8 8
6 6
4 4
2 2
0
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0 0.05 0.1 0.15 0.2 0.25 0.3
VCTRL (V) V CTRL (V)
Figure 13 • IIP2/IIP3 vs PIN Over VCTRL @ 915 MHz Figure 16 • IIP2/IIP3 vs PIN Over VCTRL @ 6 GHz
80 60
60
40
40
20
20
0 0
-10 0 10 20 -10 -5 0 5 10 15 20 25
PIN (dBm) PIN (dBm)
Figure 14 • IIP2/IIP3 vs VCTRL Over PIN @ 915 MHz Figure 17 • IIP2/IIP3 vs VCTRL Over PIN @ 6 GHz
IIP2 @ Pin = -5dBm IIP3 @ Pin = -5dBm IIP2 @ Pin = -5dBm IIP3 @ Pin = -5dBm
IIP2 @ Pin = 0dBm IIP3 @ Pin = 0dBm IIP2 @ Pin = 0dBm IIP3 @ Pin = 0dBm
IIP2 @ Pin = 5dBm IIP3 @ Pin = 5dBm IIP2 @ Pin = 5dBm IIP3 @ Pin = 5dBm
100 80
IIP2/IIP3 (dBm)
IIP2/IIP3 (dBm)
80 60
60 40
40
20
20
0
0 0 0.1 0.2 0.3
0 0.1 0.2 0.3
VCTRL VCTRL
Evaluation Kit
The power limiter evaluation kit board (EVB) was designed to ease customer evaluation of Peregrine’s
TDLM06100. The uni-directional RF input and output are connected to the RF1 and RF2 port through a 50Ω
trans-mission line via SMA connectors J2 and J3. A through 50Ω transmission line is available via SMA
connectors J5 and J6. This transmission line can be used to estimate the loss of the PCB over the
environmental conditions being evaluated. The 2-pin connector J4 is connected to the external bias VCTRL.
The board is constructed of a four metal layer material with a total thickness of 62 mils. The top RF layer is
Rogers RO4350B material with a 6.6 mil RF core and ƐR = 3.66. The middle layers provide ground for the trans-
mission lines. The transmission lines were designed using a coplanar wavequide with ground plane model using
a trace width of 13.5 mils, trace gaps of 10 mils, and metal thickness of 2.1 mils.
N/C
N/C
16 RF2(1)(3) RF port 2
1, 2, 6-8,12-14,
24
22
21
19
23
20
N/C 6 13 N/C
8
7
10
12
11
N/C
N/C
GND
VCTRL
GND
N/C
Packaging Information
This section provides packaging data
Package Drawing
Figure 20 • Package Mechanical Drawing for 24-lead 4 × 4 Ceramic QFN
Ordering Information
Table 6 lists the available ordering codes for the TDLM06100 as well as available shipping methods.
Document Categories
Advance Information
The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications
and features may change in any manner without notice.
Preliminary Specification
The data sheet contains preliminary data. Additional data may be added at a later date. Teledyne e2v HiRel Electronics reserves the right to
change specifications at any time without notice in order to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Teledyne e2v HiRel Electronics decides to change the specifications, Teledyne e2v HiRel
Electronics will notify customers of the intended changes by issuing a CNF (Customer Notification Form).
Sales Contact
For additional information, Email us at: [email protected]
Disclaimers
The information in this document is believed to be reliable. However, Teledyne e2v HiRel Electronics assumes no liability for the use of
this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this document are implied
or granted to any third party. Teledyne e2v’s products are not designed or intended for use in devices or systems intended for surgical
implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Teledyne e2v product could
create a situation in which personal injury or death might occur. Teledyne e2v assumes no liability for damages, including consequential or
incidental damages, arising out of the use of its products in such applications.