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TDLM06100 Product Specification

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0% found this document useful (0 votes)
166 views13 pages

TDLM06100 Product Specification

Uploaded by

AmreshAman
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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TDLM06100

Document Category: Product Specification

RF Power Limiter, 10 MHz–6 GHz

Features
Figure 1 • TDLM06100 Functional Diagram
• Monolithic drop-in solution with no external bias
components
• Adjustable low power limiting threshold from
+7 dBm to +13 dBm
POUT
• High maximum power handling of 50 dBm,
P1dB
100 W pulsed
RF1 RF2
• Positive threshold control from +0 V to +0.3 V
• Fast response time of less than 1 ns
• Packaging – 24-pad 4 × 4 × 0.85 mm CLGA PIN
• Qualified for use in harsh environments
Voltage Control and ESD

Applications
• Satellite transceivers and antennas VCTRL
• Sensitive orbital T/R Modules
• Radar

Product Description
The TDLM06100 is a RF power limiter qualified for operating in harsh environments, including military, space ,
avionics and medical applications.
Unlike traditional PIN diode solutions, the TDLM06100 achieves an adjustable input 1dB compression point or
limiting threshold via a low current control voltage (VCTRL), eliminating the need for external bias components
such as DC blocking capacitors, RF choke inductors and bias resistors.
It delivers low insertion loss and high linearity under non-limiting power levels and extremely fast response
time in a limiting event, ensuring protection of sensitive circuitry. It also offers excellent ESD rating and ESD
protection.
The TDLM06100 is a monolithic solution manufactured on a ruggedized process offering the performance of
GaAs with the economy and integration of conventional CMOS.

©2020, Teledyne e2v HiRel Electronics. All rights reserved. • Headquarters: 765 Sycamore Dr, Milpitas, CA, 95035

www.tdehirel.com DOC-TDLM06100_4_2020_Rev-
TDLM06100
Power Limiter

Absolute Maximum Ratings


Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be
restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for
extended periods may reduce reliability.

ESD Precautions
When handling this device, observe the same precautions as with any other ESD-sensitive devices. Although
this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid
exceeding the rating specified in Table 1.

Latch-up Immunity
The TDLM06100 is immune to latch-up.

Table 1 • Absolute Maximum Ratings for TDLM06100

Parameter/Condition Min Max Unit


Control voltage, VCTRL
Power limiting mode 0 3.6 V

RF input power, Pulsed(1) 50 dBm

Storage temperature range –65 +150 °C

ESD voltage HBM, all pins(2) 7000 V

ESD voltage CDM, all pins(3) 2000 V

Notes:
1) Pulsed, 1.0% duty cycle of 10 µs pulse width in 1 ms period, 50Ω at +25 °C.
2) Human body model (MIL-STD 883 Method 3015).
3) Charged device model (JEDEC JESD22-C101).

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TDLM06100
Power Limiter

Recommended Operating Conditions


Table 2 lists the recommended operating conditions for the TDLM06100. Devices should not be operated
outside the operating conditions listed below.

Table 2 • Recommended Operating Conditions for TDLM06100

Parameter Min Typ Max Unit


Control voltage, VCTRL
Power limiting mode 0 +0.3 V
Power reflecting mode 0 +3.0 V

RF input power, CW(*) Fig. 2 dBm

Operating temperature range (Tambient = TA) –55 +25 +105 °C

Operating max junction temperature +150 °C

Note: * See Fig. 2.

DOC-TDLM06100_4_2020_Rev- www.tdehirel.com Page 3


TDLM06100
Power Limiter

Electrical Specifications
Table 3 provides the TDLM06100 key electrical specifications at -55 °C to +105 °C (ZS = ZL = 50Ω),
unless otherwise specified.

Table 3 • TDLM06100 Electrical Specifications

Parameter Condition Min Typ Max Unit


As
Operation frequency 10 MHz 6 GHz
shown

Power limiting mode

10 MHz–3 GHz 0.87 1.10 dB


Insertion loss
3–6 GHz 1.20 1.50 dB

10 MHz–3 GHz 22 dB
Return loss TA = +25 °C
3–6 GHz 12 dB

Gain compression with VCTRL = +0V@915 MHz, Pin=+12 dBm 1.1 dB


P1dB/limiting threshold the input conditions VCTRL = +0.15V@915 MHz , Pin=+9 dBm 1.1 dB
shown to the right: VCTRL = +0.3V@915 MHz, Pin=+6 dBm 1.1 dB

VCTRL = 0V @ 915 MHz 14.6 15.5 dBm


(1) VCTRL = +0.15V @ 915 MHz 13.6 14.5 dBm
Leakage power
VCTRL = +0.3V @ 915 MHz 12.1 13.3 dBm

VCTRL = 0V @ 915 MHz 88 dBm


Input IP2 TA = +25 °C
VCTRL = 0V @ 6 GHz 70 dBm

VCTRL = 0V @ 915 MHz 37 dBm


Input IP3
VCTRL = 0V @ 6 GHz TA = +25 °C 31 dBm

Response time 1 GHz TA = +25 °C 0.6 ns

Recovery time(4) 1 GHz, PIN, Pulse = 30 dBm TA = +25 °C 1.0 ns

Power reflecting mode(2)

Leakage power(1) VCTRL = +3.0V @ 915 MHz –36.6 –24.0 dBm

Switching time(3) State change to 10% RF TA = +25 °C 2.7 µs

Notes:
1) Measured with +30 dBm CW applied at input.
2) This mode requires the control voltage to toggle between +3.0V and 0V. At +3.0V, the limiter equivalent circuit is a low impedance to ground,
reflecting most of the incident power back to the source.
3) State change is VCTRL toggle from 0V to +3.0V.
4) Pulsed, 1% duty cycle of 10 µs pulse width in 1 ms period, 50Ω @ +25 °C.

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TDLM06100
Power Limiter

Thermal Data Table 4 • Thermal Data for TDLM06100


Psi-JT (ΨJT), junction top-of-package, is a thermal
metric to estimate junction temperature of a device on Parameter Typ Unit
the customer application PCB (JEDEC JESD51-2).
ΨJT 35 °C/W
ΨJT = (TJ – TT)/P
ΘJA, junction-to-ambient thermal resistance 73 °C/W
where
ΨJT = junction-to-top of package characterization
parameter, °C/W
TJ = die junction temperature, °C
TT = package temperature (top surface, in the
center), °C
P = power dissipated by device, Watts

Power De-rating Curve


Figure 2 shows the power de-rating curve indicating maximum allowable operating RF input power (CW) up to
the part’s maximum operating ambient temperature of +105 °C. This RF input power maintains the maximum
operating junction temperature requirement of +150 °C.

Figure 2 • Power De-rating Curve, 10 MHz–6 GHz, +25 °C to +105 °C Ambient, CW, 50Ω(*)

25 C 85 C 105 C

37

36
Suggested Power (dBm)

35

34

33

32

31

30

29

28

27
1.00E+05 1.00E+06 1.00E+07 1.00E+08 1.00E+09 6.00E+09

Frequency (Hz)

Note: * High frequency CW power handling can be improved with 0.30pF capacitive matching on input and output RF ports.

DOC-TDLM06100_4_2020_Rev- www.tdehirel.com Page 5


TDLM06100
Power Limiter

Dual Mode Operation Power Reflecting Mode


Power Limiting Mode Power reflecting mode requires a power detector to
sample the RF input power and a microcontroller to
The TDLM06100 performs as a linear power limiter toggle the limiter control voltage between +3.0V and
with adjustable P1dB/limiting threshold. The P1dB/ 0V based on the system protection requirements. At
limiting threshold can be adjusted by changing the +3.0V, the limiter impedance to ground is less than 1Ω
control voltage between 0V and +0.3V. If unbiased, and most of the incident power will be reflected back
or if VCTRL = 0V, the TDLM06100 still offers power to the source. At 0V, the device operates as in power
limiting protection. limiting mode.

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TDLM06100
Power Limiter

Typical Performance Data


Fig. 3–Figure 16 show the typical performance data at +25 °C (ZS = ZL = 50 Ω), unless otherwise specified.

Figure 3 • Insertion Loss vs Temp (Soldered 24L CLGA Package)

Note: Figures 4-17 were taken using a 12L, 3x3 mm Plastic QFN Package

Figure 4 • Input Return Loss vs Temp Figure 5 • Output Return Loss vs Temp

-55 °C +25 °C +85 °C +105 °C -55 °C +25 °C +85 °C +105 °C


0 0
-5 -5
Return Loss (dB)

Return Loss (dB)

-10 -10
-15 -15
-20 -20
-25 -25
-30 -30
-35 -35
-40 -40
-45 -45
0 1 2 3 4 5 6 0 1 2 3 4 5 6
Frequency (GHz) Frequency (GHz)

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TDLM06100
Power Limiter

Figure 6 • POUT vs PIN Over VCTRL (Limiting Mode @ Figure 9 • POUT vs PIN Over VCTRL (Reflecting Mode @
915 MHz) 915 MHz)

0V 0.15 V 0.3 V 1V 2V 3V

20 0
18 -10
16
Pout (dBm)

Pout (dBm)
14 -20
12 -30
10 -40
8
6 -50
4 -60
2
0 -70
-2 -80
0 5 10 15 20 25 30 35 40 0 5 10 15 20 25 30 35 40
Pin (dBm) Pin (dBm)

Figure 7 • POUT vs PIN Over VCTRL (Limiting Mode @ Figure 10 • POUT vs PIN Over VCTRL (Reflecting Mode @
6 GHz) 6 GHz)

0V 0.15 V 0.3 V 1V 2V 3V

20 0
18
16 -10
Pout (dBm)
Pout (dBm)

14 -20
12
10 -30
8
6 -40
4
2 -50
0
-2 -60
0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35

Pin (dBm) Pin (dBm)

Figure 8 • P1dB vs VCTRL Over Temp @ 915 MHz Figure 11 • P1dB vs VCTRL Over Temp @ 6 GHz

-55 °C +25 °C +85 °C +105 °C -55 °C +25 °C +85 °C +105 °C


14 14

12 12
P1dB (dBm)

10
P1dB (dB)

10
8 8

6 6

4 4
2
2
0
0
0 0.05 0.1 0.15 0.2 0.25 0.3
0 0.05 0.1 0.15 0.2 0.25 0.3
VCTRL (V) VCTRL (V)

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TDLM06100
Power Limiter

Figure 12 • Leakage Power @ PMAX vs VCTRL Over Temp Figure 15 • Leakage Power @ PMAX vs VCTRL Over Temp
@ 915 MHz @ 6 GHz

-55 °C +25 °C +85 °C +105 °C -55 °C +25 °C +85 °C +105 °C


18 18
16 16

Leakage Power (dBm)


Leakage Power (dBm)

14 14
12 12
10 10
8 8
6 6
4 4
2 2
0
0
0 0.05 0.1 0.15 0.2 0.25 0.3 0 0.05 0.1 0.15 0.2 0.25 0.3
VCTRL (V) V CTRL (V)

Figure 13 • IIP2/IIP3 vs PIN Over VCTRL @ 915 MHz Figure 16 • IIP2/IIP3 vs PIN Over VCTRL @ 6 GHz

IIP2 @ VCTRL = 0V IIP3 @ VCTRL = 0V


IIP2 @ VCTRL = 0V IIP3 @ VCTRL = 0V
IIP2 @ VCTRL = 0.3V IIP3 @ VCTRL = 0.3V
IIP2 @ VCTRL = 0.3V IIP3 @ VCTRL = 0.3V
IIP2 @ VCTRL = 0.15V IIP3 @ VCTRL = 0.15V
IIP2 @ VCTRL = 0.15V IIP3 @ VCTRL = 0.15V
80
100
IIP2/IIP3 (dBm)
IIP2/IIP3 (dBm)

80 60

60
40
40
20
20
0 0
-10 0 10 20 -10 -5 0 5 10 15 20 25
PIN (dBm) PIN (dBm)

Figure 14 • IIP2/IIP3 vs VCTRL Over PIN @ 915 MHz Figure 17 • IIP2/IIP3 vs VCTRL Over PIN @ 6 GHz

IIP2 @ Pin = -5dBm IIP3 @ Pin = -5dBm IIP2 @ Pin = -5dBm IIP3 @ Pin = -5dBm

IIP2 @ Pin = 0dBm IIP3 @ Pin = 0dBm IIP2 @ Pin = 0dBm IIP3 @ Pin = 0dBm

IIP2 @ Pin = 5dBm IIP3 @ Pin = 5dBm IIP2 @ Pin = 5dBm IIP3 @ Pin = 5dBm
100 80
IIP2/IIP3 (dBm)
IIP2/IIP3 (dBm)

80 60
60 40
40
20
20
0
0 0 0.1 0.2 0.3
0 0.1 0.2 0.3
VCTRL VCTRL

DOC-TDLM06100_4_2020_Rev- www.tdehirel.com Page 9


TDLM06100
Power Limiter

Evaluation Kit
The power limiter evaluation kit board (EVB) was designed to ease customer evaluation of Peregrine’s
TDLM06100. The uni-directional RF input and output are connected to the RF1 and RF2 port through a 50Ω
trans-mission line via SMA connectors J2 and J3. A through 50Ω transmission line is available via SMA
connectors J5 and J6. This transmission line can be used to estimate the loss of the PCB over the
environmental conditions being evaluated. The 2-pin connector J4 is connected to the external bias VCTRL.
The board is constructed of a four metal layer material with a total thickness of 62 mils. The top RF layer is
Rogers RO4350B material with a 6.6 mil RF core and ƐR = 3.66. The middle layers provide ground for the trans-
mission lines. The transmission lines were designed using a coplanar wavequide with ground plane model using
a trace width of 13.5 mils, trace gaps of 10 mils, and metal thickness of 2.1 mils.

Figure 18 • Evaluation Kit Layout for TDLM06100

Page 10 www.tdehirel.com DOC-TDLM06100_4_2020_Rev-


TDLM06100
Power Limiter

Pin Information Table 5 • Pin Descriptions for TDLM06100


This section provides pinout information for the
TDLM06100. Figure 19 shows the pin map of this Pin No.
Pin
Description
device for the available package. Table 5 provides a Name
description for each pin.
3, 5, 9, 11,
GND Ground
15, 17, 21
Figure 19 • Pin Configuration (Top View)
4 RF1(1)(3) RF port 1

Pin 1 Dot 10 VCTRL Control voltage


GND
Marking
N/C
N/C
N/C

N/C

N/C
16 RF2(1)(3) RF port 2
1, 2, 6-8,12-14,
24

22

21

19
23

20

18-20, 22-24 N/C(2) No connect

N/C 1 18 N/C Exposed backside pad: ground


Pad GND
for proper operation
N/C 2 17 GND
Notes:
Exposed
1) RF pins 4 and 16 must be at 0 VDC. The RF pins do not require
GND 3 Ground 16 RF2
DC blocking capacitors for proper operation if the 0 VDC
Backside requirement is met.
RF1 4 Pad 15 GND 2) N/C pins can be grounded, if deemed necessary by the customer.
3) The limiter is not bi-directional. RF1 is the RF input and RF2 is the
GND 5 14 N/C RF output.

N/C 6 13 N/C
8
7

10

12
11
N/C
N/C
GND

VCTRL

GND

N/C

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TDLM06100
Power Limiter

Packaging Information
This section provides packaging data

Package Drawing
Figure 20 • Package Mechanical Drawing for 24-lead 4 × 4 Ceramic QFN

- Ceramic Land Grid Array

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TDLM06100
Power Limiter

Ordering Information
Table 6 lists the available ordering codes for the TDLM06100 as well as available shipping methods.

Table 6 • Order Codes for TDLM06100

Order Codes Description Packaging Shipping Method


TDLM06100-00 TDLM06100 Evaluation Kit Evaluation kit 1/box

TDLM06100-01 TDLM06100 EM Units 24-lead 4 × 4 Ceramic LGA Trays

TDLM06100–11 TDLM06100 Flight Units 24-lead 4 × 4 Ceramic LGA Trays

Document Categories
Advance Information
The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications
and features may change in any manner without notice.

Preliminary Specification
The data sheet contains preliminary data. Additional data may be added at a later date. Teledyne e2v HiRel Electronics reserves the right to
change specifications at any time without notice in order to supply the best possible product.

Product Specification
The data sheet contains final data. In the event Teledyne e2v HiRel Electronics decides to change the specifications, Teledyne e2v HiRel
Electronics will notify customers of the intended changes by issuing a CNF (Customer Notification Form).

Sales Contact
For additional information, Email us at: [email protected]

Disclaimers
The information in this document is believed to be reliable. However, Teledyne e2v HiRel Electronics assumes no liability for the use of
this information. Use shall be entirely at the user’s own risk. No patent rights or licenses to any circuits described in this document are implied
or granted to any third party. Teledyne e2v’s products are not designed or intended for use in devices or systems intended for surgical
implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Teledyne e2v product could
create a situation in which personal injury or death might occur. Teledyne e2v assumes no liability for damages, including consequential or
incidental damages, arising out of the use of its products in such applications.

Copyright and Trademark


Trademarks are the property of their respective owners.

©2020, Teledyne e2v HiRel Electronics. All rights reserved.

DOC-TDLM06100_4_2020_Rev- www.tdehirel.com Page 13

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