Minimum set of registers required for von Neumann machines:

Accumulator Register (AC): This register is used to store data temporarily for computation by
ALU. AC is considered to contain one of the operands. The result of computation by ALU is also
stored back to AC. It implies that the operand value is over-written by the result.
Memory Address Register (MAR): It specifies the address of memory location from which data
or instruction is to be accessed (read operation) or to which the data is to be stored (write
operation). Refer to figure 3.
Memory Buffer Register (MBR): It is a register, which contains the data to be written in the
memory (write operation) or it receives the data from the memory (read operation).
Program Counter (PC): It keeps track of the instruction that is to be executed next, that is, after
the execution of an on-going instruction.
Instruction Register (IR): Here the instructions are loaded prior to execution.
INSTRUCTION CYCLE

Step to be
S.No. How is it done Who does it
performed
1 The Program Counter Control Unit (CU).
Calculate the address
(PC register stores the
of next instruction to
address of next
be executed
instruction.
2. Get the instruction in The memory is accessed Memory Read operation
the CPU register and the desired is done. Size of
instruction is brought to instruction is important.
register (IR) in CPU In addition, PC is
incremented to point to
next instruction in
sequence.
3. Decode the instruction The control Unit issues
CU.
necessary control
signals
4. Evaluate the operand CPU evaluates the CPU under the control of CU
address address based on the
addressing mode
specified.
5. Fetch the operand The memory is Memory Read
accessed and the
desired operands
brought into the CPU
Registers
Repeat steps 4 and 5 if instruction has more than one operands.
6. Perform the operation The ALU does evaluation ALUCU
as decoded in steps3. of arithmetic or logic,
instruction or the
transfer of control
operations.
7. Store the results in The value is written toMemory write
memory desired memory location
•First the address of the next instruction is calculated, based on the size of
instruction and memory organisation. For example, if in a computer an
instruction is of 16 bits and if memory is organized as 16-bits words, then the
address of the next instruction is evaluated by adding one in the address of
the current instruction. In case, the memory is organized as bytes, which can
be addressed individually, then we need to add two in the current instruction
address to get the address of the next instruction to be executed in sequence.
• Now, the next instruction is fetched from a memory location to the CPU

registers such as Instruction register.

• The next state decodes the instruction to determine the type of operation

desired and the operands to be used.

• In case the operands need to be fetched from memory or via Input devices, then

the address of the memory location or Input device is calculated.

• Next, the operand is fetched (or operands are fetched one by one) from the

memory or read from the Input devices.

• Now, the operation, asked by the instruction is performed.
• Finally, the results are written back to memory or Output devices, wherever

desired by first calculating the address of the operand and then transferring the
values to desired destination.

Interrupts

The term interrupt is an exceptional event that causes CPU to temporarily transfer its control from currently executing
program to a different program which provides service to the exceptional event. It is like you asking a question in a class.
When you ask a question in a class by raising hands, the teacher who is explaining some point may respond to your
request only after completion of his/her point. Similarly, an interrupt is acknowledged by the CPU when it has completed
the currently executing instruction. An interrupt may be generated by a number of sources, which may be either internal
or external to the CPU.

Interrupt Condition Occurrence of Event

Interrupt are generated by
executing program itself (also 􀂉Division by Zero
called traps) 􀂉The number exceeds the
maximum allowed.
􀂉Attempt of executing an
illegal/privileged instruction.
􀂉Trying to reference memory
location other than allowed for
that program.

Interrupt generated by clock in Generally used on expiry of

the processor time allocated for a program,
in multiprogramming operating
systems.
Interrupts generated by I/O
devices and their interfaces 􀂉Request of starting an
Input/Output operation.
􀂉Normal completion of an
Input/Output operation.
 􀂉Occurrence of an error in
Input/Output operation.

Interrupts on Hardware failure

􀂉Power failure
􀂉Memory parity error.

Interrupts are a useful mechanism. They are useful in improving the efficiency of processing. This is to the fact that almost
all the external devices are slower than the processor, therefore, in a typical system, a processor has to continually test
whether an input value has arrived or a printout has been completed, in turn wasting a lot of CPU time. With the interrupt
facility CPU is freed from the task of testing status of Input/Output devices and can do useful processing during this time,
thus increasing the processing efficiency.

First the condition is to be checked as to why the interrupt has occurred. That includes not only
the device but also why that device has raised the interrupt. Once the interrupt condition is
determined the necessary program called ISRs (Interrupt servicing routines) must be executed
such that the CPU can resume further operations.
For example, assume that the interrupt occurs due to an attempt by an executing program for
execution of an illegal or privileged instruction, then ISR for such interrupt may terminate the
execution of the program that has caused this condition.
Thus, on occurrence of an Interrupt the related ISR is executed by the CPU. The ISRs are pre-
defined programs written for specific interrupt conditions.
Considering these requirements let us work out the steps, which CPU must perform on the
occurrence of an interrupt.

• The CPU must find out the source of the interrupt, as this will determine which nterrupt service
routine is to be executed.
• The CPU then acquires the address of the interrupt service routine, which are stored in the
memory (in general).
• This program needs to be interrupted till the CPU executes the Interrupt service program. Well
the context of this program is to be saved.
• Finally, the CPU executes the interrupt service routine till the completion of the routine. A
RETURN statement marks the end of this routine. After that, the control is passed back to the
interrupted program.

Interrupts and Instruction Cycle

Let us summarise the interrupt process, on the occurrence of an interrupt, an interrupt request (in
the form of a signal) is issued to the CPU. The CPU on receipt of interrupt request suspends the
operation of the currently executing program, saves the context of the currently executing
program and starts executing the program which services that interrupt request. This program is
also known as interrupt handler. After the interrupting condition/ device has been serviced the
execution of original program is resumed.
Thus, an interrupt can be considered as the interruption of the execution of an ongoing user program. The execution of
user program resumes as soon as the interrupt processing is completed. Therefore, the user program does not contain
any code for interrupt handling. This job is to be performed by the processor and the operating system, which in turn are
also responsible for suspending the execution of the user program, and later after interrupt handling, resumes the user
program from the point of interruption.

Interrupt is processed as per the following.

• Suspend the execution of current program and save its context.
• Set the Program counter to the starting address of the interrupt service routine of the interrupt
acknowledged.
• The processor then executes the instructions in the interrupt-servicing program. The interrupt
servicing programs are normally part of the operating system.
• After completing the interrupt servicing program the CPU can resume the program it has
suspended in step 1 above.