LOGIC DESIGN

LECTURE 4

Prof. Mohammed Alrahmawy

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DeMorgan’s Theorems
DeMorgan’s Theorem #1

A · B = A + B

A B A•B A•B A B A+B

0 0 0 1 1 1 1
0 1 0 1 1 0 1
1 0 0 1 0 1 1
1 1 1 0 0 0 0

EQUAL

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DeMorgan’s Theorems
DeMorgan’s Theorem #1

A · B = A + B
A A

B
= B

Invert output of an AND gate Invert the inputs of an OR gate

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DeMorgan’s Theorems
DeMorgan’s Theorem #2

A + B = A · B

A B A+B A+B A B A•B

0 0 0 1 1 1 1
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 0

EQUAL

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DeMorgan’s Theorems
DeMorgan’s Theorem #2

A + B = A · B
A A

B
= B

Invert output of an OR gate Invert the inputs of an AND gate

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Applying of DeMorgan’s Theorems
❑ To get a complement of a boolean expression:
➔ Replace
➢ • with +, + with •, 0 with 1, and 1 with 0
➢ All variables with their complements

❑ Example 1: Z = A'B' + A'C'

Z' = (A'B' + A'C')'

= (A+B) • (A+C)

❑ Example 2: Z = A'B'C + A'BC + AB'C + ABC'

Z' = (A'B'C + A'BC + AB'C + ABC')'

= (A+B+C') • (A+B'+C') • (A'+B+C') • (A'+B'+C)

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Standard forms
❑ Standard Forms
❑ Standard Sum-of-Products (SOP) form: equations are
written as an OR of AND terms, e.g. Z = A+B'C + A'C + AB’C
❑ Standard Product-of-Sums (POS) form: equations are
written as an AND of OR terms, Z = (A’+B’).(B’+C’).(A+B’+C)

❑ Standard Canonical forms

❑ Standard forms for Boolean expressions
❑ Generally, these forms are not the simplest forms
❑ Can be minimized
❑ Derived from truth table
❑ Two canonical forms
❑ Sum-of-minterms : equations are written as an OR of AND terms
Z = AB'C + A’BC + A’B’C’
❑ Product-of-Maxterms Z = (A’+B’+C).(A+B’+C’).(A+B’+C)
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Sum-of-products canonical form (SOP)
❑ Also called disjunctive normal form (DNF)
Commonly called a minterm expansion
minterm

001 011 101 110 111

F = A'B'C + A'BC + AB'C + ABC' + ABC
A B C F F'
0 0 0 0 1
0 0 1 1 0
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 0
F' = A'B'C' + A'BC' + AB'C'

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Minterms
❑ Variables appears exactly once in each minterm
In true or inverted form (but not both)

A B C minterms F in canonical form:

0 0 0 A'B'C' m0 F(A,B,C) = m(1,3,5,6,7)
0 0 1 A'B'C m1 = m1 + m3 + m5 + m6 + m7
0 1 0 A'BC' m2 = A'B'C+A'BC+AB'C+ABC'+ABC
0 1 1 A'BC m3
1 0 0 AB'C' m4
canonical form → minimal form
1 0 1 AB'C m5
1 1 0 ABC' m6 F(A,B,C) = A'B'C+A'BC+AB'C+ABC+ABC'
1 1 1 ABC m7
= AB + C
short-hand notation

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Minterms
❑ Minterms are AND terms with every variable present in either true
or complemented form.
❑ Given that each binary variable may appear normal (e.g., x) or
complemented (e.g., x’), there are 2n minterms for n variables.
❑ Example:
❑ Two variables (X and Y) produce 2 x 2 = 4 combinations:
- (both normal)➔ m0= XY x y m0 m1 m2 m3
- (X normal, Y complemented) m1= ➔XY’
- (X complemented, Y normal) m2= ➔ X’Y 0 0 1 0 0 0
- (both complemented)➔ m3= X’Y’ 01 0 1 0 0
10 0 0 1 0
❑ Thus, there are four minterms of two variables. 11 0 0 0 1
❑ For n variables, we have 2n minterms

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Maxterms
❑ Maxterms are OR terms with every variable in true or
complemented form.
❑ Given that each binary variable may appear normal (e.g., x) or
complemented (e.g., x), there are 2n maxterms for n variables.
❑ Example:
❑ Two variables (X and Y) produce 2 x 2 = 4 combinations:
- (both normal) ➔ M0=X+Y
- (x normal, y complemented) ➔ M1= X+Y’ xy M0 M1 M2 M3
- (x complemented, y normal) ➔ M2= X’+Y 00 0 1 1 1
- (both complemented) ➔ M3= X’+Y’ 01 1 0 1 1
10 1 1 0 1
❑ Thus, there are four Maxterms of two variables. 11 1 1 1 0
❑ For n variables, we have 2n Maxterms

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Product-of-sums canonical form (POS)
❑ Also called conjunctive normal form (CNF)
Commonly called a maxterm expansion
maxterm
000 010 100
F = (A + B + C) (A + B' + C) (A' + B + C)
A B C F F'
0 0 0 0 1
0 0 1 1 0
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 0

F' = (A+B+C')(A+B'+C')(A'+B+C')(A'+B'+C)(A'+B'+C')

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Maxterms
❑ Variables appears exactly once in each maxterm
In true or inverted form (but not both)

A B C maxterms F in canonical form:

0 0 0 A+B+C M0 F(A,B,C) = M(0,2,4)
0 0 1 A+B+C' M1 = M0 • M2 • M4
0 1 0 A+B'+C M2
0 1 1 A+B'+C' M3 = (A+B+C)(A+B'+C)(A'+B+C)
1 0 0 A'+B+C M4
1 0 1 A'+B+C' M5 canonical form → minimal form
1 1 0 A'+B'+C M6 F(A,B,C) = (A+B+C)(A+B'+C)(A'+B+C)
1 1 1 A'+B'+C' M7
= AB + C
short-hand notation

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Canonical implementations of F = AB + C

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Conversion between canonical forms
❑ Minterm to Maxterm
❑ Use maxterms that aren’t in minterm expansion
❑ F(A,B,C) = m(1,3,5,6,7) = M(0,2,4)

❑ Maxterm to minterm
❑ Use minterms that aren’t in maxterm expansion
❑ F(A,B,C) = M(0,2,4) = m(1,3,5,6,7)

❑ Minterm of F to minterm of F'

❑ Use minterms that don’t appear
❑ F(A,B,C) = m(1,3,5,6,7) F'(A,B,C) = m(0,2,4)

❑ Maxterm of F to maxterm of F'

❑ Use maxterms that don’t appear
❑ F(A,B,C) = M(0,2,4) F'(A,B,C) = M(1,3,5,6,7)

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SOP, POS, and De Morgan's theorems
❑ Sum-of-products
❑ F' = A'B'C' + A'BC' + AB'C'

❑ Apply de Morgan's to get POS

❑ (F')' = (A'B'C' + A'BC' + AB'C')'
❑ F = (A+B+C)(A+B'+C)(A'+B+C)

❑ Product-of-sums
❑ F' = (A+B+C')(A+B'+C')(A'+B+C')(A'+B'+C)(A'+B'+C')

❑ Apply de Morgan's to get SOP

❑ (F')' = ((A+B+C')(A+B'+C')(A'+B+C')(A'+B'+C)(A'+B'+C'))'
❑ F = A'B'C + A'BC + AB'C + ABC' + ABC

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NAND/NOR more common/efficient

❑ CMOS logic gates are more common and efficient

in the inverted forms
❑ NAND, NOR, NOT
❑ Even though Canonical forms discussed so far used
AND/OR, NAND/NOR preferred for real hardware
implementation

X X Y Z
Z
Y 0 0 1
0 1 1
X 1 0 1
Z
Y 1 1 0

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Electronic Logic Gates (1)
Vcc 4B 4A 4Y 3B 3A 3Y Vcc 4Y 4B 4A 3Y 3B 3A
14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7
1A 1B 1Y 2A 2B 2Y GND 1Y 1A 1B 2Y 2A 2B GND
7400:Y =AB 7402:
Y =A + B
Quadruple two-input NAND gates Quadruple two-input NOR gates

Vcc 6A 6Y 5A 5Y 4A 4Y Vcc 4B 4A 4Y 3B 3A 3Y
14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7
1A 1Y 2A 2Y 3A 3Y GND 1A 1B 1Y 2A 2B 2Y GND
7404:Y =A 7408:Y =AB
Hex inverters Quadruple two-input AND gates

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Electronic Logic Gates (2)

Vcc 1C 1Y 3C 3B 3A 3Y Vcc 2D 2C NC 2B 2A 2Y
14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7
1A 1B 2A 2B 2C 2Y GND 1A 1B NC 1C 1D 1Y GND
7410:Y =ABC 7420: Y =ABCD
Triple three-input NAND gates Dual four-input NAND gates

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Electronic Logic Gates (3)

Vcc NC H G NC NC Y Vcc 4B 4A 4Y 3B 3A 3Y
14 13 12 11 10 9 8 14 13 12 11 10 9 8

1 2 3 4 5 6 7 1 2 3 4 5 6 7
A B C D E F GND 1A 1B 1Y 2A 2B 2Y GND
7430:
Y = ABCDEFGH 7432:Y =A + B
8-input NAND gate Quadruple two-input OR gates

Vcc 4B 4A 4Y 3B 3A 3Y
14 13 12 11 10 9 8

1 2 3 4 5 6 7
1A 1B 1Y 2A 2B 2Y GND
7486:Y =A Å B
Quadruple two-input exclusive-OR gates

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NAND and NOR (truth table)

(X + Y)' = X' • Y' X Y X' Y' (X + Y)' X' • Y'

NOR is equivalent to AND 0 0 1 1 1 1
with inputs complemented 0 1 1 0 0 0
1 0 0 1 0 0
1 1 0 0 0 0

(X • Y)' = X' + Y' X Y X' Y' (X • Y)' X' + Y'

NAND is equivalent to OR 0 0 1 1 1 1
with inputs complemented 0 1 1 0 1 1
1 0 0 1 1 1
1 1 0 0 0 0

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NAND and NOR (logic gates)
❑ De Morgan's
❑ Standard form: A'B' = (A + B)' A' + B' = (AB)'
❑ Inverted: A + B = (A'B')' (AB) = (A' + B')'

❑ AND with complemented inputs  NOR

❑ OR with complemented inputs  NAND pushing
❑ OR  NAND with complemented inputs the
❑ AND  NOR with complemented inputs bubble

NOR NOR NAND NAND

OR OR AND AND

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Converting to use NAND/NOR
❑ Introduce inversions ("bubbles")
❑ Introduce bubbles in pairs
❑ Conserve inversions
❑ Do not alter logic function Z = AB + CD
= (A'+B')'+(C'+D')'
❑ Example
❑ AND/OR to NAND/NAND = [(A'+B')(C'+D')]'
= [(AB)'(CD)']'

A A
NAND
B Z B Z
NAND
C C
NAND
D D

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Converting to use NAND/NOR (con’t)
❑ Example: AND/OR network to NOR/NOR

Z= AB+CD
= (A'+B')'+(C'+D')’
= [(A'+B')'+(C'+D')’]’’
= {[(A'+B')'+(C'+D')']'}'

A A’
NOR
B Z B’ Z
NOR
C C’
NOR
D D’

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Converting to use NAND/NOR (con’t)
❑ Example: OR/AND to NAND/NAND

A A’
NAND
B Z B’ Z
NAND
C C’
NAND
D D’

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Converting to use NAND/NOR(con’t)
❑ Example: OR/AND to NOR/NOR

A A
NOR
B Z B Z
NOR
C C
NOR
D D

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END

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