Chapter2: Boolean Algebra and Logic
Gates
Lecture2- Canonical Forms, Other Logic Operations
Engr. Arshad Nazir, Asst Prof
Dept of Electrical Engineering
EE-223 Digital Logic Design Spring 2024 SEECS 1
EE-223 Digital Logic Design Spring 2024 2
Objectives
• Study Canonical Forms
• Standard and non-standard Forms
• Conversion of Canonical Forms
• Other Logic Operations
EE-223 Digital Logic Design Spring 2024 3
Canonical Forms
• A canonical form is a standard method for representing Boolean
functions.
• The two canonical forms that are used are:
➢ Sum of Minterms
➢ Product of Maxterms
• These forms are sometimes considered the “brute force” method of
representing functions as they seldom represent a function in a
minimized form.
• Examples of these two forms are:
F1 = xyz′+xy′z+x′y′z′
F2 = (x+y+z′)(x+y′+z)(x′+y′+z′)
EE-223 Digital Logic Design Spring 2024 4
Minterms
• Any given binary variable can be represented in two forms:
➢ x, its normal form, and
➢ X′, its complement
• If we consider two binary variables and the AND operation, there are
four combinations of the variables:
➢ xy
➢ Xy′
➢ X′y
➢ X′y′
• Each of the above four AND terms is called a minterm or a standard
product.
• n variables can be combined to form 2n minterms.
EE-223 Digital Logic Design Spring 2024 5
Minterms Expressed
EE-223 Digital Logic Design Spring 2024 6
Maxterms Expressed
EE-223 Digital Logic Design Spring 2024 7
Truth Table to Expression (Sum of Minterms)
• Any Boolean function can be expressed as a sum of minterms or sum of
products (i.e. the ORing of terms).
➢ You can form the function algebraically by forming a minterm for each
combination of the variables that produces a 1 in the function. (Each
row with output of 1 becomes a product term) x y z G
➢ Sum (OR) product terms together. 0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 1
1 1 1 1
xyz + xyz′ + x′yz
EE-223 Digital Logic Design Spring 2024 8
Minterms and Maxterms Expressed
EE-223 Digital Logic Design Spring 2024 9
Sum of Minterms Example
F1 = xˊyˊzˊ + xˊyz + xyˊzˊ
= m0+m3+m4
= ∑(0,3,4)
EE-223 Digital Logic Design Spring 2024 10
Equivalent Representations of Circuits
• All three formats are equivalent
• Number of 1’s in truth table output column equals AND terms for
Sum-of-Products (SOP)
x y z G
0 0 0 0
x
0 0 1 0 x
x
0 1 0 0 x
G
0 1 1 1 x
x
1 0 0 0 x
x
1 0 1 0 x
1 1 0 1
1 1 1 1
x y z
G = xyz + xyz′ + x′yz
EE-223 Digital Logic Design Spring 2024 11
Truth Table to Expression (Product of
Maxterms)
• Any Boolean function can be expressed as a product of maxterms or
product of sums (i.e. the ANDing of terms).
➢ You can form the function algebraically by forming a maxterm for
each combination of the variables that produces a 0 in the function.
(Each row with output of 0 becomes a standard sums)
➢ AND these maxterms together.
EE-223 Digital Logic Design Spring 2024 12
Product of Maxterms Example
F1 = (x + y + z’)(x + y’ + z)(x’ + y + z’)(x’ + y’ + z)(x’ + y’ + z’)
= M1M2M5M6M7
= π(1,2, 5, 6, 7)
EE-223 Digital Logic Design Spring 2024 13
Minterms and Maxterms
• Each variable in a Boolean expression is a literal
• Boolean variables can appear in normal (x) or complement form (x’)
• Each AND combination of terms is a minterm
• Each OR combination of terms is a maxterm
• Example:
Minterms Maxterms
x y z Minterm x y z Maxterm
0 0 0 x’y’z’ m0 0 0 0 x+y+z M0
0 0 1 x’y’z m1 0 0 1 x+y+z’ M1
… …
1 0 0 xy’z’ m4 1 0 0 x’+y+z M4
… …
1 1 1 xyz m7 1 1 1 x’+y’+z’ M7
EE-223 Digital Logic Design Spring 2024 14
Obtaining Sum of Minterms Form
F = AˊBˊCˊ + AˊBˊC + AˊBCˊ + AˊBC + ABˊCˊ + ABˊC+ ABC
= m 0 + m 1 + m 2 + m 3 + m4 + m 5 + m 7
F(A, B, C) = ∑(0, 1, 2, 3, 4, 5, 7)
EE-223 Digital Logic Design Spring 2024 15
Obtaining Product of Maxterms
F = (A+B+C)(Aˊ+B+C)(Aˊ+Bˊ+C)(Aˊ+Bˊ+Cˊ)
= M0 . M4 . M6 . M7
F(A, B, C) = π(0, 4, 6, 7)
EE-223 Digital Logic Design Spring 2024 16
Canonical Form Conversion
• A function represented as Sum of minterms can be represented as the
Product of maxterms of the remaining terms.
• The complement of a function expressed in sum of minterms equals the
sum of minterms missing from the original function
➢ F(A, B, C) = ∑(0, 3,4) = m0+m3+m4
➢ Fˊ(A, B, C) = ∑(1,2,5,6,7)= m1+m2+m5+m6+m7
• Now if we take the complement of F’ using DeMorgan’s theorem, we
obtain F in the product of maxterms form:
o (Fˊ)ˊ = (m1+m2+m5+m6+m7)ˊ
o F = m1ˊ . m2ˊ . m5ˊ . m6ˊ . m7ˊ [Complement of minterms]
o = M1M2M5M6M7 [maxterms]
o = π(1,2, 5, 6, 7)
• This implies the following relation:
miˊ = Mj
• So sum of minterms: ∑(0,3,4) = product of maxterms: π(1,2, 5, 6, 7)
EE-223 Digital Logic Design Spring 2024 17
Table A: Conversion of Forms
Desired Form
Minterm Maxterm Minterm Maxterm
Expansion of F Expansion of F Expansion of F′ Expansion of F′
Given Form
Minterm - maxterm nos are List minterms not Maxterm nos
Expansion of F those nos, not present in F are same as
on the minterm minterm nos of
list of F F
Maxterm minterm nos are - minterm nos are List maxterms
Expansion of F those nos, not on same as maxterm not present in F
the maxterm list nos of F
of F
EE-223 Digital Logic Design Spring 2024 18
Table B: Application of Table A
Desired Form
Minterm Maxterm Minterm Maxterm
Expansion of F Expansion of F Expansion of F′ Expansion of F′
Given Form
F=∑(3,4,5,6,7) - F=π(0,1,2) ∑(0,1,2) π(3,4,5,6,7)
F=π(0,1,2) ∑(3,4,5,6,7) - ∑(0,1,2) π(3,4,5,6,7)
EE-223 Digital Logic Design Spring 2024 19
Standard Forms
• Standard forms are those forms that allow the terms forming the
function to consist of any number of the variables.
• There are two standard forms:
– sum of products (SOP)
– product of sums (POS)
• Examples of these two forms are:
F=xy′+x′yz SOP
G=(X+Y′)(X′+Y+Z) POS
EE-223 Digital Logic Design Spring 2024 20
Sum of Products
• The Sum of Products (SOP) is a Boolean expression containing AND
terms, called product terms, of one or more literals each.
– F1 = y′ + xy + x′yz′
EE-223 Digital Logic Design Spring 2024 21
Product of Sums
• The Product of Sums (POS) is a Boolean expression containing OR
terms, called sum terms, of one or more literals each.
➢ F2 = x(y′ + z)(x′ + y + z′)
EE-223 Digital Logic Design Spring 2024 22
Two Level Implementations
• The standard type of expression results in a two-level gating
structure
EE-223 Digital Logic Design Spring 2024 23
Conversion from Nonstandard to
Standard Form
• A Boolean function may be expressed in a nonstandard form (fig 2.4a shows a
function that is neither in sum of products nor in product of sums). It has three levels
of gating
• It can be converted to a standard form (Sum of product) by using distributive law to
remove parenthesis
• Two-level implementation is preferred as it produces the least amount of delay
EE-223 Digital Logic Design Spring 2024 24
Other Logic Operations
• Given two Boolean variables:
➢ When binary operators AND and OR are placed between two variables,
they form two Boolean functions x . y and x + y
➢ there are 22x2 = 16 combinations of the two variables as there are 22n
possible functions for n binary variables (we will see the details of these 16
functions in next slides)
➢ each combination of the variables can result in one of two values, 0 or 1,
therefore there are 24=16 functions (combinations of 0’s and 1’s for the
four combinations, 00,01,10,11)
• These 16 functions listed can be subdivided into three categories:
➢ Two functions that produce a constant 0 or1.
➢ Four functions with unary operations: complement and transfer.
➢ Ten functions with binary operators that define eight different operations:
AND, OR, NAND, NOR, exclusive-OR, equivalence, inhibition, and
implication. EE-223 Digital Logic Design Spring 2024 25
Function Combinations
• F1 represents the AND Operation
• F7 represents the OR Operation
• There are 14 other functions
EE-223 Digital Logic Design Spring 2024 26
16 Two-Variable Functions
EE-223 Digital Logic Design Spring 2024 27
Function Gate Implementations
EE-223 Digital Logic Design Spring 2024 28
Function Gate Implementations
• It is easier to implement a Boolean function with these types of gates (as
seen on last slide)
• Inverter (Complement), Buffer (transfer), AND, OR, NAND, NOR, X-OR,
and XNOR (equivalence) are used as standard gates in digital design
• NAND and NOR are extensively used logic gates and are more popular
than AND and OR gates because these gates are easily constructed with
transistor circuits and digital circuits are easily implemented with them.
• Implication and inhibition are not commutative or associative and thus
are impractical to use as standard logic gates.
EE-223 Digital Logic Design Spring 2024 29
Multiple Inputs
• All the previously defined gates, with the exception of the inverter and
the buffer, can have multiple inputs.
➢ A gate can have multiple inputs provided it is a binary operation that
is commutative (x + y = y + x and xy = yx) and associative (x + (y + z) =
(x + y) + z and x(yz) = (xy)z)
➢ NAND and NOR functions are commutative but not associative.
For example, for NOR
X Y=Y X commutative
(X Y) Z ≠ X (Y Z) not associative
xz′+yz′≠x′y+x′z
➢ To overcome this difficulty we define multiple NOR (or NAND) gate as
a complemented OR (or AND) gate e.g., as (x+y+z)′ or (xyz)′
EE-223 Digital Logic Design Spring 2024 30
Multiple Inputs (Non-associative
NOR operation)
EE-223 Digital Logic Design Spring 2024 31
Multiple Inputs NOR and NAND
gates
EE-223 Digital Logic Design Spring 2024 32
Multiple Inputs XOR gate
• 3-input XOR gate is normally implemented by cascading 2-input gates
(multiple inputs XOR is uncommon from hardware point)
EE-223 Digital Logic Design Spring 2024 33
The End
EE-223 Digital Logic Design Spring 2024 34
