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PCB Design Optimization: What it Means and New Methods

Presentation · October 2021

DOI: 10.13140/RG.2.2.22613.14566

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PCB Design Optimization: What it
Means and New Methods

Zachariah Peterson
PCB West 2021, Santa Clara, CA (10/6/2021)
INTRODUCTION

• What is PCB design optimization?

• Marketing speak!

Our product optimizes performance

enhancement while mitigating degradation
to optimized improvements…
INTRODUCTION

• Optimization: An important area of engineering and design

• All design engineers do optimization subconsciously:

• Finding tradeoffs in a design
• Balancing tradeoffs

• Mathematically: Maximize/minimize something subject to some

constraints
What is PCB Design Optimization?
My design goal
• Mathematical definition: • Impedance
• S-parameters
• Routing density
Max. or min. 𝑓 𝑥1 , 𝑥2 , … , 𝑥𝑁 • Dispersion

𝑔1 (𝑥1 , 𝑥2 , … , 𝑥𝑁 ) ≤ 𝐴 My constraints
𝑔2 (𝑥1 , 𝑥2 , … , 𝑥𝑁 ) ≤ 𝐴 • Any design goal could
Subject to:
⋮ be a constraint
𝑥1 , 𝑥2 , … , 𝑥𝑁 ≤ 𝐶
My design variables
• Usually geometric

• How to choose 𝑥1 , 𝑥2 , … , 𝑥𝑁 so that I meet my objective function

𝑓 𝑥1 , 𝑥2 , … , 𝑥𝑁 while satisfying 𝑔1 , 𝑔2 , …
Optimization = Analyzing Tradeoffs
• All engineering problems are optimization problems

• Single objective =
usually* easy to get
an optimum design

Hartl, D. J., et al. "A liquid metal-based structurally embedded vascular antenna: II. Multiobjective and parameterized
design exploration," Smart Materials and Structures 26(2) (2016).
Optimization = Analyzing Tradeoffs
• Real problems = multiple objectives = complex tradeoffs

• Impossible to get a
“perfect” design

• More objectives = longer

computation time, more
difficult to visualize 𝑔2

𝑔1
Why Worry About Design Optimization?

• Motivation: Newer signaling standards demand design

techniques that are optimization problems

• Motivation (II): Designs are more complex → Way to

balance great complexity
Methods
• Empirical
• Use models extracted from experimental data

• Numerical
• Use simulation tools (field solvers)

• Analytical
• Use equations derived from first principles → direct calculations

• Build a “catalog” of possible designs, pick the best for your system
Empirical Methods
• Involves measurements
• Objective function: Signal integrity (S-parameters), impulse response
• Design variables: Channel geometry
• Parameters: Roughness, Dk/Df, stackup, via count, …

• Procedure: Vary design variables, measure objectives, compare with

reference model

• Drawbacks: Considers entire interconnect (good and bad!)

• Example with 56G channels on Eurocard backplane (6U) Reflections
Diff. crosstalk
Attenuation
 • Neves et al. “Pathological Design”, 100GBase-KR

Neves, A., et al. “32 to 56 Gbps Serial Link Analysis and Optimization Methods for Pathological Channels,” DesignCon 2017.
• Example: Tri-objective problem in 100GBase-KR or USB 4.0
• Uses Multi-port S-parameters for differential pair design:

𝑓𝑚
‫׬‬0 𝑉𝑖𝑛 𝑓 2 𝑆21 𝑓 2 ( 𝑆11 𝑓 2 + 𝑆22 𝑓 2 )𝑑𝑓
Integrated return loss: 𝐼𝑅𝐿 = 𝑓
‫׬‬0 𝑚 𝑉𝑖𝑛 𝑓 2 𝑑𝑓

𝑓
‫׬‬0 𝑚 𝑉𝑖𝑛 𝑓 2 𝑆21 𝑓 2 𝑑𝑓
Integrated insertion loss: 𝐼𝐼𝐿 = 𝑓
‫׬‬0 𝑚 𝑉𝑖𝑛 𝑓 2 𝑑𝑓

𝑓 2
‫׬‬0 𝑚 𝑉𝑖𝑛 𝑓 2 σ𝑖≠𝑗 𝑆𝑖𝑗 𝑓 𝑑𝑓
Integrated crosstalk: 𝐼𝑇𝑋 = 𝑓
‫׬‬0 𝑚 𝑉𝑖𝑛 𝑓 2 𝑑𝑓
 • Neves et al. “Pathological Design”, 100GBase-KR

Neves, A., et al. “32 to 56 Gbps Serial Link Analysis and Optimization Methods for Pathological Channels,” DesignCon 2017.
 • Neves et al. “Pathological Design”, 100GBase-KR

• Measure SDDx1 (FEXT/NEXT) for

given SDD11
• Iterate through geometry

SDD11

Neves, A., et al. “32 to 56 Gbps Serial Link Analysis and Optimization Methods for Pathological Channels,” DesignCon 2017.
• Zhang et al.: Model extraction
• Input S-parameter and impulse
response measurement, extract
geometric trends

• Extract transmission line values

(𝐿∞ , 𝑅𝑠 , 𝑅𝐷𝐶 , 𝐾𝑔 , 𝜀𝑅 , 𝜀𝐼 )

• Problems:
• Copper roughness included in 𝑅𝑠
• Overly complicated algorithm
Zhang, J., et al. “Causal RLGC(f) Models for Transmission Lines From Measured S-Parameters,” IEEE Transactions on
Electromagnetic Compatibility, 52(1), pp.189-198 (2009).
 Empirical Design: Evaluation
• Useful to compare with some benchmark → Impulse response
• Example under IEEE P802.3bj and P802.3ba models

Minimization
objective

Moore, C., and Healey, A. "A method for evaluating channels." 100 Gb/s Backplane and Copper Study Group, IEEE, 2011.
Numerical Methods
• A.k.a. Design Exploration
• Objective function: Signal integrity (S/Z-parameters), possibly EMI
• Design variables: Channel geometry
• Parameters: Roughness, Dk/Df, stack-up, etc.

• Procedure: Generate objective, iterate through variable

range, build design space
• Drawbacks: Requires finished or proposed layout, slow!
Example: Copper Pour Clearance Constraints
• What’s the allowed pour clearance near controlled impedance traces?
Problem Statement
• What’s the smallest allowed clearance?
1ൗ
𝜔2 𝑝
𝑝
min න 𝑍(𝜔) − 𝑍𝑡𝑎𝑟𝑔𝑒𝑡 𝑑𝜔
𝜔1

𝑊>0
𝑆>0
s.t.: 𝑇 ∈ {𝑇𝑖 }
𝐻 ∈ {𝐻𝑖 }

• Determine curve relating CPW with non-CPW

Accidentally Testing “Rules of Thumb”
• We can easily violate the “3W” clearance rule without affecting
impedance

Minimum clearance for

CPW to have same Z as
microstrip/stripline
Broader Trend: Design Exploration
• Example: DDR SODIMM connectors

Swap connectors or change

stackup to get past 1866 MHz
Analytical Methods
• Deriving analytical models
• Objective function: Signal integrity (S/Z-parameters), possibly EMI
• Design variables: Channel geometry
• Parameters: Roughness, Dk/Df, stackup, etc.

• Procedure: Calculate objective directly, optimize for geometry

and dispersion
• Drawbacks: Difficult to consider parasitics and complex layouts
Analytical: Wideband Interconnect Design
• Example: 112 Gbps PAM4 signaling

Heyfitch, V., and Shlepnev, Y. “Design insights from electromagnetic analysis and measurements of PCB and Package
interconnects operating at 6-112 Gbps and beyond.” DesignCon 2020.
Interconnect Optimization
• Many parameters: geometry, via count, length,…

• Allowed impedance mismatch, dispersion, crosstalk…

Transmission Line Optimization: RLCG model

𝑅+𝑖𝜔𝐿
• TL characteristic impedance: 𝑍0 = 𝐺+𝑖𝜔𝐶

𝑅𝑠
𝑅 𝜔 = 𝑅𝐷𝐶 + 𝜔𝑅𝑠 𝐿 𝜔 = 𝐿∞ + ൘
𝜔
𝐺 𝜔 = 𝜔𝐶 𝜔 tan 𝛿 (𝜔) 𝐶 𝜔 = 𝐾𝑔 𝜀𝑅 𝜔 𝜀0
−𝜔𝜀𝐼 𝜔 −𝜎𝑠𝑢𝑏
• Dielectric constant: 𝜀 = 𝜀𝑅 (𝜔) + 𝑖𝜀𝐼 (𝜔), 𝑡𝑎𝑛𝛿 = 𝜔𝜀𝑅

• Need causal models or data for:

Dielectric constant: 𝜀(𝜔)
Copper roughness: 𝐾(𝜔)
Electrical parameters: 𝑅(𝜔), 𝐿(𝜔)
Copper Roughness
• Copper roughness increases 𝑅𝑠 : non-resonant random scattering
and absorption/relaxation
𝐻𝑅𝑀𝑆 ~5.6 µm on 2116 core 𝑎 ~1.5 µm
SEM image

3 µm

Shlepnev, Y. “Practical methodology for analyzing the effect of conductor roughness on signal losses and dispersion in
Interconnects,” DesignCon 2012.
 Causal Copper Roughness Correction
• Cannonball-Huray (Other models: Hammerstad, Snowball Huray, etc.)

𝑡𝑑𝑖𝑒𝑙
𝜀𝑐 𝜔 = 𝜀 𝜔
𝑡𝑑𝑖𝑒𝑙 − 2𝐻10

𝑅𝑠 → 𝐾 𝜔 𝑅𝑠
Dmitriev-Zdorov, V. “A Causal Conductor Roughness Model and its Effect on Transmission Line Characteristics,”
Signal Integrity Journal, November 2018.
Simonovich, B. “PCB Interconnect Modeling Demystified,” DesignCon 2019.
Stripline Problem

• Lorentzian Parameters for 𝜀: 𝜀𝑠1

4.081
𝜀𝑠2
4.068
𝜀∞
3.95
𝜏1 (ps)
82.12
𝜏2 (ps)
5.712
𝜎 (Ω-1m-1)
5.81·107

• Single objective: min 𝐿2 𝑍 − 𝑍𝑡𝑎𝑟𝑔𝑒𝑡

Zhang, J., et al. "Planar transmission line method for characterization of printed circuit board dielectrics,“
Progress In Electromagnetics Research, 102, pp.267-286 (2010).
 Analytical Approach (Dispersion + Roughness)
• Start with Wadell’s dispersion-less impedance formulas, use the definitions:
𝜀𝑐,𝑅 (𝜔)
𝑣 −1 = 𝑘Τ𝜔 = 𝐿∞ 𝐾𝑔 𝜀0 𝜀𝑐,𝑅 (𝜔) = ൗ𝑐0, and

𝐿∞
𝑍0 = ൘𝐾 𝜀 𝜀 (𝜔)
𝑔 0 𝑐,𝑅

𝜀 𝜔 𝐻
• Use N-pole Lorentzian model for 𝜀𝑐 𝜔 =
𝐻−2𝐻10
, causal 𝐾 𝜔

1
−2
2
• Skin effect: 𝑅𝑠 𝜔 =
µ0
𝜎𝐴
1 + 𝜌𝜔𝜀0 𝜀 𝜔 + 𝜌𝜔𝜀0 𝜀 𝜔 ≈
µ0
8𝜎 𝑇+𝑊 2
 Analytical Approach (Dispersion + Roughness)
• Include losses with linear transformation:
𝑍0 𝜀𝑐,𝑅 (𝜔)
𝐿∞ = ൗ𝑐0 , apply transformation:

𝑖𝜔𝑍0 𝜀𝑐,𝑅 (𝜔) + 𝑅𝐷𝐶 + 𝜔(1 + 𝑖)𝑅𝑠 𝑐0

𝑖𝜔𝐿∞ → = 𝑖𝜔𝐿∞ + 𝑅𝐷𝐶 + 𝜔(1 + 𝑖)𝑅𝑠
𝑐0

𝜀𝑐.𝑅 𝜔
• For capacitance, 𝐾𝑔 𝜀0 𝜀𝑐,𝑅 𝜔 =
𝑍0 𝑐0
, apply transformation 𝐶 → 𝐺 + 𝑖𝜔𝐶

𝜀𝑐.𝑅 𝜔
• Therefore, 𝐺 + 𝑖𝜔𝐶 = 𝑖𝜔𝐾𝑔 𝜀0 𝜀𝑐,𝑅 𝜔 1 − 𝑖𝑡𝑎𝑛𝛿 = 𝑖𝜔 𝑍0 𝑐0
1 − 𝑖𝑡𝑎𝑛𝛿
Analytical Approach (Dispersion + Roughness)

• Define 𝑍 = 𝑖𝜔𝐿∞+𝑅𝐷𝐶+ 𝜔(1+𝑖)𝑅𝑠

ൗ𝑖𝜔𝐾𝑔 𝜀0 𝜀𝑐,𝑅 𝜔 1−𝑖𝑡𝑎𝑛𝛿

𝑖𝜔𝑍02 𝜀𝑐,𝑅 (𝜔) + 𝑍0 𝑐0 𝑅𝐷𝐶 + 1 + 𝑖 𝐾(𝜔)𝑅𝑠 𝜔

𝑍(𝜔) =
𝑖𝜔 𝜀𝑐,𝑅 𝜔 1 − 𝑖𝑡𝑎𝑛𝛿 𝜔

• Define 𝛾 = (𝑖𝜔𝐿∞ + 𝑅𝐷𝐶 + 𝜔(1 + 𝑖)𝑅𝑠 )(𝑖𝜔𝐾𝑔 𝜀0 𝜀𝑐,𝑅 𝜔 1 − 𝑖𝑡𝑎𝑛𝛿 )

−𝜔 2 𝑍0 𝜀𝑐 (𝜔) + 𝑖𝜔𝑐0 𝜀𝑐,𝑅 (𝜔൯(1 − 𝑖𝑡𝑎𝑛𝛿 𝜔 ) 𝑅𝐷𝐶 + 𝐾(𝜔) 1 + 𝑖 𝜔𝑅𝑠

𝛾(𝜔) =
𝑍0 𝑐02
Impedance Deviation Minimization

• Impedance is function of frequency → consider entire bandwidth

1ൗ
𝜔2 𝑝

• Use the 𝐿𝑝 norm: min න 𝑍(𝜔) − 𝑍𝑡𝑎𝑟𝑔𝑒𝑡

𝑝
𝑑𝜔
𝜔1

• For 𝑝 = 2, equivalent to 𝐼𝑚[𝑍]

Parameterized contour
minimizing RMS deviation 𝑍𝑡𝑎𝑟𝑔𝑒𝑡

from a mean (target) value

𝑅𝑒[𝑍]
Example: Stripline Problem
• 8-layer stackup (equal layers),
0.5 oz./ft.2 Cu, 25 cm line
𝐻10 = 5 μm, 𝑎 = 2 μm
• 50 Ohm target, 1 pF load capacitance
• Constraints: 0 < 𝑊Τ𝐻 < 6, 𝑇 and 𝐻 fixed to stackup

• Lorentzian Parameters for 𝜀: 𝜀𝑠1

4.081
𝜀𝑠2
4.068
𝜀∞
3.95
𝜏1 (ps)
82.12
𝜏2 (ps)
5.712
𝜎 (Ω-1m-1)
5.81·107

• Single objective: min 𝐿2 𝑍 − 𝑍𝑡𝑎𝑟𝑔𝑒𝑡

Zhang, J., et al. "Planar transmission line method for characterization of printed circuit board dielectrics,“
Progress In Electromagnetics Research, 102, pp.267-286 (2010).
Optimization Algorithm (Single Objective)
Input: 𝐾, 𝐽, 𝑍𝑇 , 𝑁𝑚𝑎𝑥
00. While 𝑁 < 𝑁𝑚𝑎𝑥
Mutate w/ procedure
01. Generate initial solution 𝑍 𝜔 and 𝑊/𝐻
02. If 𝑁 < 𝑁𝑚𝑎𝑥 in Storn & Price (1997).
′
03. GenerateNew 𝑊 ൗ𝐻′ , 𝑍′
04. If 𝐿2 |𝑍′ 𝜔 − 𝑍𝑇 | < 𝐿2 (𝑍 𝜔 − 𝑍𝑇 )
Check against constraints with
and ConstraintCheck = True
05. 𝑍 𝜔 = 𝑍′ 𝜔 , 𝑁 = 0 method in Lampinin (2002).
06. Go to 02
07. Else
Select new 𝑍(𝜔) with
08. ConstraintMod
09. 𝑁 →𝑁+1
method in Lampinin (2002).
10. Go to 04
11. Else
12. End

Storn, R., & Price, K. “Differential Evolution - A Simple and Efficient Heuristic for Global Optimization over Continuous
Spaces,” Journal of Global Optimization, 11, pp.341-359 (1997).
J. Lampinen, "A constraint handling approach for the differential evolution algorithm," Proceedings of the 2002
Congress on Evolutionary Computation, CEC'02 (Cat. No.02TH8600), Honolulu, HI, USA, vol. 2, pp.1468-1473 (2002).
Optimization Results
• Rough line: W = 0.178 mm (6.996 mil)
• 50 Ω Smooth line: W = 0.180 mm (7.085 mil) → No dispersion or skin effect
• Smooth dispersion-less line: ε = 4.171 + 0.0576𝑖 (@ 1 GHz)
• Commercial MoM solver says 49.99 Ohms at 7.614 mils
Optimization Results
• Very similar return loss, very different insertion loss
• Note the commercial field solver results for return loss

Overlaps with
MoM results
 Optimization Results - Causality
• Load capacitance arises in the line’s transfer function
• Use a standard procedure for RLCG models to enforce causality (see ref.)
𝑡 4
10 𝜏 𝑡
0 −
𝑦 𝑡 = 𝑒 𝜏0
𝑡 4
1+ 𝜏
0

1. Calculate transfer function 𝐻(𝜔)

2. Enforce causality to get 𝐻𝑐 (𝜔)
3. Calculate ℎ 𝑡 = 𝐼𝐹𝑇[𝐻𝑐 𝜔 ]
4. Calculate ℎ 𝑡 ∗ 𝑦(𝑡)

Zhang, J., et al. “Causal RLGC(f) Models for Transmission Lines From Measured S-Parameters,” IEEE Transactions on
Electromagnetic Compatibility, 52(1), pp.189-198 (2009).
Drawbacks
• Analytical models:
• Difficult to account for things like differential impedance, fiber weave effects
• Often need to incorporate numerical models

• Typically need to balance crosstalk, routing density, impedance

control, and distortion → 4 objectives!
• Numerical model: Wu, R.-B. and Yang, J.-C., “Boundary integral equation formulation of
skin effect problems in multiconductor transmission lines,” IEEE Transactions on
Magnetics, 25(4), 3013-3015 (1989).
Looking Ahead
• Upcoming tech demands extremely precise interconnect designs

• Examples: 112+ Gbps PAM4, quantum computing, 5G/6G, radar,

microwave photonics, IEEE 802.11ad (Multiple Gigabit Wireless System)

PCB

• Constraints: Insertion loss, ISI, crosstalk, impedance matching…

PAM4 Signaling in High-Speed Serial Technology: Test, Analysis, and Debug. Tektronix Application Note, July 2018.
Power Integrity
• Power integrity also critical in advanced designs
Machine Learning in Interconnect Design

• ML models already being used for interconnect and device design:

• Transmission lines/waveguides
• Commercial 100 GHz-1 THz oscillators and interconnects
• SerDes adaptive equalization
• Power and thermal integrity (on-die, SiP, applies to boards)
• Nanophotonics device design, including PICs

• Multivariate ML models for predicting 𝑍, S-parameters, 𝛾, 𝐿 & 𝐶,

𝐻(𝜔), etc.
Machine Learning in Interconnect Design
• Inverse design approach
NN’s create risk
• Optimization algorithms for specific systems of overfitting
and models Inverse
design

• Neural networks for prediction

• Training → build numerical model from
measurements (𝑍, 𝑆, 𝛾, 𝐾 etc.)
• Specific to routing topology, materials,
geometry, manufacturing process etc…
Roy, K., et al. "Inverse design of transmission lines with deep learning." In 2019 IEEE 28th Conference on Electrical
Performance of Electronic Packaging and Systems (EPEPS), pp. 1-3. IEEE, 2019.
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