SP7652

6A 28V 600KHz Synchronous Step Down Regulator

January 2020 Rev. 2.0.1

GENERAL DESCRIPTION APPLICATIONS

The SP7652 is a synchronous voltage mode • Distributed Power Architectures
PWM step down (buck) regulator capable of a
• Point of Load Converters
constant output current up to 6Amps. A wide
2.5V to 28V power input voltage range, with • Power Supply Modules
the required 5V biasing voltage, allows
• FPGAs, DSPs and Processors Supplies
conversions from industry standard 5V, 12V,
18V and 24V power rails.
With a 600kHz constant operating frequency
FEATURES
and integrated high and low side switch, the • 6A Continuous Current
SP7652 reduces the overall component count
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• 2.5V-28V Power Input Voltage Rail

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and solution footprint. In addition to a 1%

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− 5V Biasing voltage
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output setpoint accuracy, this device provides

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high efficiency, low ripple and excellent line − 0.8V Min. Output Voltage – 1% Accuracy
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and load regulation. An enable function and

• PWM Voltage Mode Control
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soft start feature allow for controlled power up

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sequencing implementation. − 600kHz Fixed Synchronous Operations

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− Low RDSON Power Switches

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Built-in Under voltage lockout (VLO) on both

VCC and VIN, outputs short-circuit and over − Greater than 92% Efficiency
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temperature protection insure safe operation

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• Type II & III Compensations Support

under abnormal operating conditions.
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• Programmable Soft Start

The SP7652 is offered in a RoHS compliant,
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lead free 26-pin 7mmx4mm DFN package. • UVLO on both VIN and VCC
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• Pre-biased Output Start-Up

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• Over Temperature & Short Circuit

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Protection/Auto-Restart
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• RoHS Compliant Lead Free 26-Pin DFN

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• US Patent #6,922,041
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TYPICAL APPLICATION DIAGRAM

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Fig. 1: SP7652 Application Diagram

1/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

ABSOLUTE MAXIMUM RATINGS OPERATING RATINGS

These are stress ratings only and functional operation of Input Voltage Range VCC .............................. 4.5V to 5.5V
the device at these ratings or any other above those Input Voltage Range VIN .................................. 3V to 28V
indicated in the operation sections of the specifications Junction Temperature Range ................. -40°C to +125°C
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may affect Thermal Resistance θJC ........................................ 5°C/W
reliability. Thermal Resistance θJA ...................................... 36°C/W

VIN ........................................................................ 30V

VCC ......................................................................... 7V
ILX ........................................................................ 10A
BST ...................................................................... 35V
LX-BST........................................................ -0.3V to 7V
LX ............................................................... -1V to 30V
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All other pins ................................... -0.3V to (VCC+0.3)V

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Storage Temperature .............................. -65°C to 150°C

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Power Dissipation ................................ Internally Limited

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Lead Temperature (Soldering, 10 sec) ................... 300°C

ESD Rating (HBM - Human Body Model) ............. 2kV HBM
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ELECTRICAL SPECIFICATIONS
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Specifications with standard type are for an Operating Junction Temperature of TJ = TA = 25°C only; limits applying over the
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full Operating Junction Temperature range are denoted by a “•”. Minimum and Maximum limits are guaranteed through test,
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design, or statistical correlation. Typical values represent the most likely parametric norm at TJ = TA = 25°C, and are
provided for reference purposes only. Unless otherwise indicated, VCC = 4.5V to 5.5V, VIN = 3.0V to 28V, BST = LX + 5V,
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LX = GND = 0V, UVIN = 3V, CVCC = 1µF, CCOMP = 0.1µF, CSS = 50nF, TA= –40°C to 85°C, TJ = –40°C to 125°C.
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Parameter Min. Typ. Max. Units Conditions

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Quiescent Current
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VCC Supply Current (No

1.5 3 mA VFB = 0.9V
Switching)
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VCC Supply Current (Switching) 11 15 mA •

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BST Supply Current (No

0.2 0.4 mA VFB = 0.9V
Switching)
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BST Supply Current (Switching) 8 12 mA •

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Protection: UVLO
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VCC UVLO Start Threshold 4.00 4.25 4.5 v

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VCC UVLO Hysteresis 100 200 300 mV

UVIN Start Threshold 2.3 2.5 2.65 V •
UVIN Hysteresis 200 300 400 mV
UVIN Input Current 1 µA UVIN = 3.0V
Error Amplifier Reference
2x Gain Config., Measure VFB; VCC=5V,
)

Error Amplifier Reference 0.792 0.800 0.808 V

T=25°C
Error Amplifier Reference Over
0.788 0.800 0.812 V •
Line and Temperature
Error Amplifier
6 mA/V
Transconductance
Error Amplifier Gain 60 dB No Load
COMP Sink Current 150 µA VFB = 0.9V, COMP = 0.9V
COMP Source Current 150 µA VFB = 0.7V, COMP = 2.2V
VFB Input Bias Current 50 200 nA VFB = 0.8V
Internal Pole 4 MHz
COMP Clamp 2.5 V VFB = 0.7V, TA=25°C
COMP Clamp Temp. Coefficient -2 mV/°C

2/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

Parameter Min. Typ. Max. Units Conditions

Control Loop: PWM Comparator, Ramp & Loop Delay Path
Ramp Amplitude 0.92 1.1 1.28 V
Ramp Offset 1.1 V • TA=25°C, Ramp COMP
Ramp Offset Temp. Coefficient -2 mV/°C
GH Minimum Pulse width 90 180 ns •
Maximum Controllable Duty Maximum Duty Ratio measured just
92 97 %
Ratio before pulsing begins
Maximum Duty Ratio 100 % Valid for 20 cycles
Internal Oscillator Ratio 420 600 720 kHz •
Timers: Soft Start
SS Charge Current 10 µA
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SS Discharge Current 1 mA • Fault Present, SS = 0.2V

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Protection: Short Circuit & Thermal

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Short Circuit Threshold Voltage 0.25 0.3 V • Measured (VREF(0.8V)-VFB)

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0.2
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Hiccup Timeout 200 ms VFB = 0.5V

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Number of Allowable Clock

20 Cycles
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Cycles at 100% Duty Cycle

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Minimum GL Pulse After 20

0.5 Cycles VFB = 0.7V
Cycles
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Thermal Shutdown Temperature 145 °C VFB = 0.7V

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Thermal Recovery Temperature 135 °C

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Thermal Hysteresis 10 °C
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Output: Power Stage

High Side RDSON 15 mΩ VCC = 5V ; IOUT= 6A, TA = 25°C
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Synchronous FET RDSON 15 mΩ VCC = 5V ; IOUT= 6A, TA = 25°C

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Maximum Output Current 6 A

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PIN ASSIGNMENT
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Fig. 2: SP7652 Pin Assignment

3/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

PIN DESCRIPTION
Name Pin Number Description
PGND 1, 2, 3 Ground connection for the synchronous rectifier.
Ground Pin. The control circuitry of the IC and lower power driver are referenced to this
GND 4, 8, 19, 20, 21
pin. Return separately from other ground traces to the (-) terminal of COUT.
Feedback Voltage and Short Circuit Detection pin. The inverting input of the Error
Amplifier and serves as the output voltage feedback point for the Buck Converter. The
VFB 5 output voltage is sensed and can be adjusted through an external resistor divider.
Whenever VFB drops 0.25V below the positive reference, a short circuit fault is detected
and the IC enters hiccup mode.
Output of the Error Amplifier. Internally connected to the inverting input of the PWM
COMP 6 comparator. An optimal filter combination is chosen and connected to this pin and
either ground or VFB to stabilize the voltage mode loop.
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UVLO input for VIN voltage. Connect a resistor divider between VIN and UVIN to set
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UVIN 7
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minimum operating voltage.

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Soft Start. Connect an external capacitor between SS and GND to set the soft start rate
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SS 9 based on the 10μA source current. The SS pin is held low via a 1mA (min.) current
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during all fault conditions.

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Input connection to the high-side N-channel MOSFET. Place a decoupling capacitor

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VIN 10, 11, 12, 13

between this pin and PGND.
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14, 15, 16,

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LX Connect an inductor between this pin and VOUT.

23, 24, 25, 26
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NC 17 No Connect.
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High-side driver supply pin. Connect BST to the external boost diode and capacitor as
BST 18 shown in the Typical Application Circuit on page one. High-side driver is connected
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between BST and SWN pin.

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VCC 22 Input for external 5V bias supply

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Exposed Pad 1
- Exposed Pad 1
Connect to LX through PCB.
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Exposed Pad 1
- Exposed Pad 2
Connect to GND through PCB.
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Exposed Pad 1
- Exposed Pad 3
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Connect to VIN through PCB.

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ORDERING INFORMATION(1)
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Part Number Junction Temperature Range Package Packing Method Lead Free(2)
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7mm x 4mm
SP7652ER-L/TR -40°C ≤ TJ ≤ +125°C Tape & Reel Yes
26-pin DFN
SP7652EB SP7652 Evaluation Board

Notes:
1. Refer to www.maxlinear.com/SP7652 for most up-to-date Ordering Information.
)

2. Visit www.maxlinear.com for additional information on Environmental Rating.

4/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

TYPICAL PERFORMANCE CHARACTERISTICS

All data taken at VIN = 2.7V to 5.5V, TJ = TA = 25°C, unless otherwise specified - Schematic and BOM from Application
Information section of this datasheet.

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Fig. 4: Output Voltage versus Output Current

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Fig. 3: Efficiency versus Output Current

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VIN=8V, 12V and 15V

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VIN=8V, 12V and 15V, VOUT=5V

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Fig. 5: Efficiency versus Output Current

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VIN=5V, VOUT=3.3V Fig. 6: Output Voltage versus Output Current

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VIN=5V, VOUT=3.3V
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Fig. 8: Output Voltage versus Output Current

Fig. 7: Efficiency versus Output Current VIN=3.3V, VOUT=0.8V
VIN=3.3V, VOUT=0.8V

5/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

Fig. 9: Efficiency versus Output Current Fig. 10: Efficiency versus Output Current
VIN=12V VIN=5V
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Fig. 11: Efficiency versus Output Current

VIN=3.3V
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6/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

THEORY OF OPERATION SOFT START

Soft start is achieved when a power converter
GENERAL OVERVIEW ramps up the output voltage while controlling
The SP7652 is a fixed frequency, voltage the magnitude of the input supply source
mode, synchronous PWM regulator optimized current. In a modern step down converter,
for high efficiency. The part has been designed ramping up the positive terminal of the error
to be especially attractive for split plane amplifier controls soft start. As a result,
applications utilizing 5V to power the controller excess source current can be defined as the
and 3V to 20V for step down conversion. current required to charge the output
capacitor.
The heart of the SP7652 is a wide bandwidth
transconductance amplifier designed to IVIN = COUT * (ΔVOUT / ΔTSOFT-START)
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accommodate Type II and Type III The SP7652 provides the user with the option
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compensation schemes. A precision 0.8V

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to program the soft start rate by tying a

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reference, present on the positive terminal of

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capacitor from the SS pin to GND. The

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the error amplifier, permits the programming

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selection of this capacitor is based on the

of the output voltage down to 0.8V via the VFB
10μA pull up current present at the SS pin and
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pin. The output of the error amplifier, COMP,

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the 0.8V reference voltage. Therefore, the

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which is compared to a 1.1V peak-to-peak excess source can be redefined as:

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ramp, is responsible for trailing edge PWM

control. This voltage ramp and PWM control IVIN = COUT * (ΔVOUT *10μA / (CSS * 0.8V)
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logic are governed by the internal oscillator

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that accurately sets the PWM frequency to UNDER VOLTAGE LOCK OUT (UVLO)
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600kHz.
The SP7652 contains two separate UVLO
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The SP7652 contains two unique control comparators to monitor the internal bias (VCC)
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features that are very powerful in distributed and conversion (VIN) voltages independently.
applications. First, asynchronous driver control The VCC UVLO threshold is internally set to
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is enabled during start up, to prohibit the low 4.25V, whereas the VIN UVLO threshold is
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side NFET from pulling down the output until programmable through the UVIN pin. When
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the high side NFET has attempted to turn on. the UVIN pin is greater than 2.5V, the SP7652
Second, a 100% duty cycle timeout ensures is permitted to start up pending the removal of
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all other faults. Both the VCC and VIN UVLO

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that the low side NFET is periodically enhanced

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during extended periods at 100% duty cycle. comparators have been designed with
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This guarantees the synchronized refreshing of hysteresis to prevent noise from resetting a
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the BST capacitor during very large duty cycle fault.

ratios.
The SP7652 also contains a number of
THERMAL AND SHORT-CIRCUIT PROTECTION
valuable protection features. Programmable Because the SP7652 is designed to drive large
UVLO allows the user to set the exact VIN output current, there is a chance that the
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value at which the conversion voltage can power converter will become too hot.
safely begin down conversion, and an internal Therefore, an internal thermal shutdown
VCC UVLO ensures that the controller itself has (145°C) has been included to prevent the IC
enough voltage to operate properly. Other from malfunctioning at extreme temperatures.
protection features include thermal shutdown
A short-circuit detection comparator has also
and short-circuit detection. In the event that
been included in the SP7652 to protect against
either a thermal, short-circuit, or UVLO fault is
an accidental short at the output of the power
detected, the SP7652 is forced into an idle
converter. This comparator constantly
state where the output drivers are held off for
monitors the positive and negative terminals
a finite period before a re-start is attempted.
of the error amplifier, and if the VFB pin falls
more than 250mV (typical) below the positive
reference, a short-circuit fault is set. Because
7/15 Rev. 2.0.1
 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

the SS pin overrides the internal 0.8V prevents the controller from “dragging down”
reference during soft start, the SP7652 is the output voltage during startup or in fault
capable of detecting short-circuit faults modes. The second feature is a 100% duty
throughout the duration of soft start as well as cycle timeout that ensures synchronized
in regular operation. refreshing of the BST capacitor at very high
duty ratios. In the event that the high-side
HANDLING OF FAULTS NFET is on for 20 continuous clock cycles, a
reset is given to the PWM flip-flop half way
Upon the detection of power (UVLO), thermal,
through the 21st cycle. This forces GL to rise
or short-circuit faults, the SP7652 is forced
for the cycle, in turn refreshing the BST
into an idle state where the SS and COMP pins
capacitor.
are pulled low and the NFETS are held off. In
the event of UVLO fault, the SP7652 remains
POWER MOSFETS
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in this idle state until the UVLO fault is

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removed. Upon the detection of a thermal or The SP7652 contains a pair of integrated low
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short-circuit fault, an internal 200ms timer is resistance N-MOSFETs designed to drive up to

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activated. In the event of a short-circuit fault, 6A of output current. Maximum output current
a re-start is attempted immediately after the could be limited by thermal limitations of a
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200ms timeout expires. Whereas, when a particular application. The SP7652

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thermal fault is detected, the 200ms delay incorporates a built-in over-temperature

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continuously recycles and a re-start cannot be protection to prevent internal overheating.

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attempted until the thermal fault is removed

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and the timer expires.

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ERROR AMPLIFIER AND VOLTAGE LOOP

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Since the heart of the SP7652 voltage error

loop is a high performance, wide bandwidth
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transconductance amplifier, great care should

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be taken to select the optimal compensation

network. Because of the amplifier’s current
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limited (±150μA) transconductance, there are

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many ways to compensate the voltage loop or

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to control the COMP pin externally. If a simple,

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single-pole, single-zero response is desired,

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then compensation can be as simple as an RC

circuit to Ground. If a more complex
compensation is required, then the amplifier
has enough bandwidth (45°C at 4MHz) and
enough gain (60dB) to run Type III
compensation schemes with adequate gain
)

and phase margins at cross over frequencies

greater than 50kHz.
The common mode output of the error
amplifier is 0.9V to 2.2V. Therefore, the PWM SETTING OUTPUT VOLTAGES
voltage ramp has been set between 1.1V and
The SP7652 can be set to different output
2.2V to ensure proper 0% to 100% duty cycle
voltages. The relationship in the following
capability. The voltage loop also includes two
formula is based on a voltage divider from the
other very important features. One is an
output to the feedback pin VFB, which is set to
asynchronous startup mode. Basically, the
an internal reference voltage of 0.80V.
synchronous rectifier cannot turn on unless
Standard 1% metal film resistors of surface
the high-side NFET has attempted to turn on
mount size 0603 are recommended.
or the SS pin has exceeded 1.7V. This feature
8/15 Rev. 2.0.1
 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

Furthermore, one could select the value of the

R1 and R2 combination to meet the exact
output voltage setting by restricting R1
resistance range such that 50kΩ<R1<100kΩ
Where R1 = 68.1kΩ and for VOUT = 0.80V for overall system loop stability.
setting, simply remove R2 from the board.

APPLICATION INFORMATION

INDUCTOR SELECTION
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Once the required inductor value is selected,

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There are many factors to consider in selecting

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the proper selection of core material is based

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the inductor including core material,

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on peak inductor current and efficiency

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inductance vs. frequency, current handling

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requirements.
capability, efficiency, size and EMI. In a typical
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SP7652 circuit, the inductor is chosen The core must be large enough not to saturate
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primarily by operating frequency, saturation at the peak inductor current

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current and DC resistance. Increasing the

inductor value will decrease output voltage
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ripple, but degrade transient response. Low

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inductor values provide the smallest size, but and provide low core loss at the high switching
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cause large ripple currents, poor efficiency and frequency. Low cost powdered-iron cores are
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require more output capacitance to smooth inappropriate for 900kHz operation. Gapped
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out the larger ripple current. The inductor ferrite inductors are widely available for
must be able to handle the peak current at the consideration. Select devices that have
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switching frequency without saturating, and operating data shown up to 1 MHz. Ferrite
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the copper resistance in the winding should be materials, on the other hand, are more
kept as low as possible to minimize resistive expensive and have an abrupt saturation
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power loss. A good compromise between size, characteristic with the inductance dropping
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loss and cost is to set the inductor ripple sharply when the peak design current is
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exceeded. Nevertheless, they are preferred at

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current to be within 20% to 40% of the

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maximum output current. high switching frequencies because they

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present very low core loss and the design only

The switching frequency and the inductor
needs to prevent saturation. In general, ferrite
operating point determine the inductor value
or molypermalloy materials are better choice
as follows:
for all but the most cost sensitive applications.

OPTIMIZING EFFICIENCY
)

The power dissipated in the inductor is equal

where:
to the sum of the core and copper losses. To
Fs = switching frequency minimize copper losses, the winding resistance
needs to be minimized, but this usually comes
KrR = ratio of the AC inductor ripple current to
at the expense of a larger inductor. Core
the maximum output current.
losses have a more significant contribution at
low output current where the copper losses
are at a minimum, and can typically be
neglected at higher output currents where the
The peak to peak inductor ripple current is: copper losses dominate. Core loss information
is usually available from the magnetics
vendor. Proper inductor selection can affect
9/15 Rev. 2.0.1
 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

the resulting power supply efficiency by more ΔVOUT = Peak-to-Peak Output Voltage Ripple
than 15-20%!
IPK-PK= Peak-to-Peak Inductor Current
The copper loss in the inductor can be
The total output ripple is a combination of the
calculated
ESR and the output capacitance value and can
using the following equation: be calculated as follows:
PL(CU) = I2L(RMS) RWINDING
where IL(RMS) is the RMS inductor current that
can be calculated as follows:
FS = Switching Frequency
D = Duty Cycle
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COUT = Output Capacitance Value

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OUTPUT CAPACITOR SELECTION

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INPUT CAPACITOR SELECTION

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The required ESR (Equivalent Series

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The input capacitor should be selected for

Resistance) and capacitance drive the
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ripple current rating, capacitance and voltage

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selection of the type and quantity of the

rating. The input capacitor must meet the
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output capacitors. The ESR must be small

ripple current requirement imposed by the
enough that both the resistive voltage
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switching current. In continuous conduction

deviation due to a step change in the load
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mode, the source current of the high-side

current and the output ripple voltage do not
MOSFET is approximately a square wave of
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exceed the tolerance limits expected on the

duty cycle VOUT/VIN. Most of this current is
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output voltage. During an output load

supplied by the input bypass capacitors. The
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transient, the output capacitor must supply all

RMS value of input capacitor current is
the additional current demanded by the load
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determined at the maximum output current

until the SP7652 adjusts the inductor current
and under the assumption that the peak to
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to the new value.

peak inductor ripple current is low; it is given
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In order to maintain VOUT, the capacitance by:

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must be large enough so that the output

ICIN(RMS)= IOUT(MAX) √D(1-D)
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voltage is held up while the inductor current

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ramps up or down to the value corresponding The worse case occurs when the duty cycle D
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to the new load current. Additionally, the ESR is 50% and gives an RMS current value equal
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in the output capacitor causes a step in the to IOUT/2.

output voltage equal to the current. Because
Select input capacitors with adequate ripple
of the fast transient response and inherent
current rating to ensure reliable operation.
100% to 0% duty cycle capability provided by
the SP7652 when exposed to output load The power dissipated in the input capacitor is:
transient, the output capacitor is typically
)

PCIN=I2CIN(RMS) RESR(CIN)
chosen for ESR, not for capacitance value.
This can become a significant part of power
The ESR of the output capacitor, combined
losses in a converter and hurt the overall
with the inductor ripple current, is typically the
energy transfer efficiency. The input voltage
main contributor to output voltage ripple. The
ripple primarily depends on the input capacitor
maximum allowable ESR required to maintain
ESR and capacitance. Ignoring the inductor
a specified output voltage ripple can be
ripple current, the input voltage ripple can be
calculated by:
determined by:

where:

10/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

The capacitor type suitable for the output High crossover frequency is desirable for fast
capacitors can also be used for the input transient response, but often jeopardizes the
capacitors. However, exercise additional system stability. Crossover frequency should
caution when tantalum capacitors are used. be higher than the ESR zero but less than 1/5
Tantalum capacitors are known for of the switching frequency. The ESR zero is
catastrophic failure when exposed to surge contributed by the ESR associated with the
current, and input capacitors are prone to output capacitors and can be determined by:
such surge current when power supplies are
connected “live” to low impedance power
sources.
The next step is to calculate the complex
LOOP COMPENSATION DESIGN conjugate poles contributed by the LC output
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filter,
The open loop gain of the whole system can
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be divided into the gain of the error amplifier,

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PWM modulator, buck converter output stage,

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and feedback resistor divider. In order to cross

When the output capacitors are of a Ceramic
over at the selected frequency fcoFCO, the
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Type, the SP7652 Evaluation Board requires a

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gain of the error amplifier compensates for the

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Type III compensation circuit to give a phase

attenuation caused by the rest of the loop at
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boost of 180° in order to counteract the

this frequency.
effects of an underdamped resonance of the
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The goal of loop compensation is to output filter at the double pole frequency
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manipulate loop frequency response such that

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its gain crosses over 0db at a slope of -

20db/dec. The first step of compensation
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design is to pick the loop crossover frequency.

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Fig. 12: SP7652 Voltage Mode Control Loop

Definitions:
RESR = Output Capacitor Equivalent Series Resistance
RDC = Output Inductor DC Resistance
RRAMP_PP = SP7652 internal Ramp Amplitude Peak to Peak Voltage

11/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

Conditions:
CZ2 >> Cp1 and R1 >> RZ3
Output Load Resistance >> RESR and RDC

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Fig. 14: Type III Error Amplifier Compensation Circuit

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Fig. 13: Bode Plot of Type III Error Amplifier Compensation

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beyond the 0.7 square inches did not reduce

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SP765X THERMAL RESISTANCE thermal resistance.

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The SP765X family has been tested with a Using a minimum of 0.1 square inches of (3
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variety of footprint layouts along with ounces of) Copper on the top layer with no
different copper area and thermal resistance
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vias connecting to the 3 other layers

has been measured. The layouts were done
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produced a thermal resistance of 44°C/W.

on 4 layer FR4 PCB with the top and bottom This thermal impedance is only 22% higher
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layers using 3oz copper and the power and

than the medium and large footprint layouts,
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ground layers using 1oz copper.

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indicating that space constrained designs can

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For the Minimum footprint, only about 0.1 still benefit thermally from the Powerblox
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square inch (of 3 ounces of) Copper was used family of ICs. This indicates that a minimum
on the top or footprint layer, and this layer footprint of 0.1 square inch, if used on a 4
had no vias to connect to the 3 other layers. layer board, can produce 44°C/W thermal
For the Medium footprint, about 0.7 square resistance. This approach is still very
inches (of 3 ounces of) Copper was used on worthwhile if used in a space constrained
the top layer, but vias were used to connect design.
)

to the other 3 layers. For the Maximum The following figures show the footprint
footprint, about .0 square inch (of 3 ounces layouts from an ORCAD file. The thermal data
of) Copper was used on the top layer and was taken for still air, not with forced air. If
many vias were used to connect to the 3 forced air is used, some improvement in
other layers. thermal resistance would be seen.
The results show that only about 0.7 square
inches (of 3 ounces of) Copper on the top SP765X THERMAL RESISTANCE
layer and vias connecting to the 3 other
4 Layer Board:
layers are needed to get the best thermal
resistance of 36°C/W. Adding area on the top • Top Layer 3ounces Copper
• GND Layer 1ounce Copper

12/15 Rev. 2.0.1

 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

• Power Layer ounce Copper

Medium Footprint: 36°C/W
• Bottom Layer 3ounces Copper
Top Layer: 0.7 square inch
Vias to other 3 Layers
Minimum Footprint: 44°C/W
Top Layer: 0.1 square inch
No Vias to other 3 Layers
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Fig. 15: Minimum Footprint = 0.10in2

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Fig. 16: Medium Footprint = 0.70in2

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Maximum Footprint: 36°C/W

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Top Layer: .0 square inch

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Vias to other 3 Layers

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Fig. 17: Maximum Footprint = 1.0in2

13/15 Rev. 2.0.1

SP7652
6A 28V 600KHz Synchronous Step Down Regulator

Rev. 2.0.1
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14/15
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PACKAGE SPECIFICATION

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26 PIN DFN
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 SP7652
6A 28V 600KHz Synchronous Step Down Regulator

REVISION HISTORY
Revision Date Description
2.0.0 07/16/2012 Reformat of Datasheet
2.0.1 01/24/2020 Updated to MaxLinear logo. Updated Ordering Information.

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CORPORATE HEADQUARTERS:
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5966 La Place Court

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Suite 100
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Carlsbad, CA 92008
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Tel.: +1 (760) 692-0711

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Fax: +1 (760) 444-8598

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www.maxlinear.com
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