Microcontroller Architecture: Intel 8051
Dr.N.Subhashini
Associate Professor,
SENSE, VIT Chennai
ADDRESSING MODES
ADDRESSING MODES
Addressing mode is a way to address an operand. Operand means the
data we are operating upon.
Five Addressing modes available in the 8051:
– Immediate
– Direct
– Register
– Register indirect
– Indexed
ADDRESSING MODES
IMMEDIATE ADDRESSING MODE
This addressing mode is named as “immediate” because it transfers an
8-bit data immediately to the accumulator (destination operand).
In general we can write MOV A, #data.
MOV A, #6AH
The ‘#’ symbol before 6AH indicates that operand is a data (8 bit). If ‘#’ is
not present then the hexadecimal number would be taken as address.
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ADDRESSING MODES
IMMEDIATE ADDRESSING MODE
ADDRESSING MODES
DIRECT ADDRESSING MODE
Here the address of the data (source data ) is given as operand. Lets take
an example.
MOV A, 04H
Here 04H is the address of register 4 of register bank#0. When this
instruction is executed, what ever data is stored in register 04H is moved
to accumulator.
In figure register 04H holds the data 1FH. So the data 1FH is moved to
accumulator.
ADDRESSING MODES
DIRECT ADDRESSING MODE
ADDRESSING MODES
REGISTER ADDRESSING MODE
In this addressing mode we use the register name directly (as source
operand). At a time registers can take value from R0,R1…to R7.An
example is shown below.
MOV A, R4
In register direct addressing mode, data is transferred to accumulator
from the register (based on which register bank is selected).
PSW.3 and PSW.4bits are known as register bank select bits as they are
used to select register banks.
ADDRESSING MODES
REGISTER ADDRESSING MODE
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ADDRESSING MODES
REGISTER ADDRESSING MODE
ADDRESSING MODES
REGISTER INDIRECT ADDRESSING MODE
In this addressing mode, address of the data (source data to transfer) is
given in the register operand.
MOV A, @R0
Here the value inside R0 is considered as an address, which holds the
data to be transferred to accumulator
If R0 holds the value 20H, and we have a data 2F H stored at the address
20H, then the value 2FH will get transferred to accumulator after
executing this instruction.
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ADDRESSING MODES
REGISTER INDIRECT ADDRESSING MODE
ADDRESSING MODES
REGISTER INDIRECT ADDRESSING MODE
The opcode for MOV A, @R0 is E6H. Assuming that register bank #0 is
selected. So the R0 of register bank #0 holds the data 20H.
Program control moves to 20H where it locates the data 2FH and it transfers
2FH to accumulator.
This is a single byte instruction and the program counter increments 1 and
moves to 0203 of program memory.
Only R0 and R1 are allowed to form a register indirect addressing instruction.
All register banks are allowed.
ADDRESSING MODES
INDEXED ADDRESSING MODE
MOV A, @A+DPTR and MOVC A, @A+PC
where DPTR is data pointer and PC is program counter (both are 16 bit
registers).
The source operand is @A+DPTR and we will get the source data (to
transfer) from this location.
It is nothing but adding contents of DPTR with present content of
accumulator. This addition will result a new data which is taken as the
address of source data (to transfer). The data at this address is then
transferred to accumulator.
ADDRESSING MODES
INDEXED ADDRESSING MODE
ADDRESSING MODES
INDEXED ADDRESSING MODE
The opcode for the instruction is 93H. DPTR holds the value 01FE, where 01 is
located in DPH (higher 8 bits) and FE is located in DPL (lower 8 bits).
Accumulator now has the value 02H. A 16 bit addition is performed and now
01FE H+02 H results in 0200 H.
What ever data is in 0200 H will get transferred to accumulator. The previous
value inside accumulator (02H) will get replaced with new data from
0200H. New data in the accumulator is shown in dotted line box.
ADDRESSING MODES
INDEXED ADDRESSING MODE
This is a 1 byte instruction with 2 cycles needed for execution. So, the
execution time required for this instruction is high compared to other
addressing modes (which all were 1 cycle).
The other example MOVC A, @A+PC works the same way as above
example. The only difference is, instead of adding DPTR with
accumulator, here data inside program counter (PC) is added with
accumulator to obtain the target address.
8051 instruction
set
The process of writing program for the microcontroller mainly consists of
giving instructions (commands) in the specific order in which they should
be executed in order to carry out a specific task.
As electronics cannot “understand” what for example an instruction “if
the push button is pressed- turn the light on” means, then a certain
number of simpler and precisely defined orders that decoder can
recognize must be used.
All commands are known as INSTRUCTION SET.
2
All microcontrollers compatible with the 8051 have in total of 255
instructions, i.e. 255 different words available for program writing.
Many instructions are considered to be “different”, even though they perform
the same operation, so there are only 111 truly different commands.
For example: ADD A,R0, ADD A,R1, ... ADD A,R7 are instructions that perform
the same operation (addition of the accumulator and register). Taking into
account that all instructions perform only 53 operations (addition,
subtraction, copy etc.)
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8051 INTRUCTION SET
8051 instructions have 8-bit opcode
• There are 256 possible instructions of which 255 are implemented
• Every 8-bit opcode from 00 to FF is used except for A5.
• Some instructions have one or two additional bytes for data or address
• There are 139 1-byte instructions, 92 2-byte instructions, and 24 3-byte
instruction
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8051 INTRUCTION SET
Depending on operation they perform, all instructions are
divided in 5 groups:
1. Arithmetic Instructions
2. Logic Instructions
3. Program Branching Instructions
4. Boolean or Bit-oriented Instructions
5. Data Transfer Instructions
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DATA TRANSFER ARITHMETIC LOGICAL BOOLEAN PROGRAM BRANCHING
MOV ADD / ADDC ANL CLR JMP / SJMP / AJMP/ LJMP
MOVC SUBB ORL SETB LCALL / ACALL
MOVX INC XRL MOV RET / RETI
PUSH DEC ANL JZ / JNZ
POP MUL ORL JC /JNC
XCH DIV CPL JB / JNB
XCHD DAA JBC
CLR CJNE
CPL DJNZ
RL / RLC NOP
RR / RRC
SWAP
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8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
Using Arithmetic Instructions, you can perform addition, subtraction,
multiplication and division.
The arithmetic instructions also include increment by one, decrement by
one and Decimal Adjust Accumulator.
The arithmetic instructions has no knowledge about the data format i.e.
signed, unsigned, ASCII, BCD, etc.
The operations performed by the arithmetic instructions affect flags like
carry, overflow, zero, etc. in the PSW
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
A<-Q B(High):A(Lower)
B<-R
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
8051 INTRUCTION SET
ARITHMETIC INSTRUCTIONS
8051 INTRUCTION SET
LOGICAL INSTRUCTIONS
The Logical Instructions perform logical operations like AND, OR, XOR.
Logical Instruction are performed on Bytes of data on a bit-by-bit basis.
ANL
ORL
XRL
8051 INTRUCTION SET
LOGICAL INSTRUCTIONS
8051 INTRUCTION SET
LOGICAL INSTRUCTIONS
8051 INTRUCTION SET
BOOLEAN OR BIT-ORIENTED INSTRUCTIONS
The Boolean or Bit Manipulation Instructions will deal with bit variables.
We know that there is a special bit-addressable area in the RAM and
some of the Special Function Registers (SFRs) are also bit addressable.
CLR
SETB
CPL
MOV
ANL
ORL
8051 INTRUCTION SET
BOOLEAN OR BIT-ORIENTED INSTRUCTIONS
8051 INTRUCTION SET
BOOLEAN OR BIT-ORIENTED INSTRUCTIONS
8051 INTRUCTION SET
BOOLEAN OR BIT-ORIENTED INSTRUCTIONS
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
These instructions control the flow of program logic.
SJMP JZ / JNZ
LJMP JC / JNC
AJMP JB / JNB
JMP JBC
LCALL CJNE
ACALL DJNZ
RET NOP
RETI
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
JZ Label
JNZ Label
JC Label
JNC Label
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
JB P0.0, Label
JNB P0.1, Label
JBC P0.0, Label
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
CJNE A, #25H, label
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
DJNZ 25H, label
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
8051 INTRUCTION SET
PROGRAM BRANCHING INSTRUCTIONS
8051 INTRUCTION SET
DATA TRANSFER INSTRUCTIONS
The Data Transfer Instructions are associated with transfer with
data between registers or external program memory or external
data memory.
MOV
MOVC
MOVX
PUSH
POP
XCH
XCHD
8051 INTRUCTION SET
DATA TRANSFER INSTRUCTIONS
8051 INTRUCTION SET
DATA TRANSFER INSTRUCTIONS
8051 INTRUCTION SET
DATA TRANSFER INSTRUCTIONS
8051 INTRUCTION SET
DATA TRANSFER INSTRUCTIONS
8051 INTRUCTION SET
DATA TRANSFER INSTRUCTIONS
8051 INTRUCTION SET
DATA TRANSFER INSTRUCTIONS
Arithmetic
flags
ARITHMETIC FLAGS
Flag: It is a 1-bit register that indicates the status of the result from an
operation
Flags are either at a flag-state of value 0 or 1
Arithmetic flags indicate the status of the results from mathematical
operations (+, , *, /)
There are 4 arithmetic flags in the 8051:Carry (C), Auxiliary Carry (AC),
Overflow (OV), Parity (P)
All the above flags are stored in the Program Status Word(PSW)
ARITHMETIC FLAGS
INSTRUCTIONS AFFECTING FLAGS
ARITHMETIC FLAGS
INSTRUCTIONS AFFECTING FLAGS
ARITHMETIC FLAGS
EXAMPLE
Show how the flag register is affected by the following
instructions.
MOV A, #0F5h ; A = F5h
ADD A, #0Bh ; A = F5 + 0B = 00
Solution F5h 1111 0101
+ 0Bh + 0000 1011
100h 0000 0000
After the addition, register A (destination) contains 00 and the flags are:
CY = 1 since there is a carry out from D7
P = 0 because the number of 1s is zero
AC = 1 since there is a carry from D3 to D4
