Lecture Notes for Analog Electronics

Fundamentals of analogue electronics ETT 05114

OD 22 ETE & CST
 Class Notes 1

1 Basic Principles
In electromagnetism, voltage is a unit of either electrical potential or EMF. In electronics,
including the text, the term “voltage” refers to the physical quantity of either potential or
EMF. Note that we will use SI units, as does the text.
As usual, the sign convention for current I = dq/dt is that I is positive in the direction
which positive electrical charge moves.
We will begin by considering DC (i.e. constant in time) voltages and currents to introduce
Ohm’s Law and Kirchoff’s Laws. We will soon see, however, that these generalize to AC.

1.1 Ohm’s Law

For a resistor R, as in the Fig. 1 below, the voltage drop from point a to b, V = Vab = Va −Vb
is given by V = IR.

a b

Figure 1: Voltage drop across a resistor.

A device (e.g. a resistor) which obeys Ohm’s Law is said to be ohmic.

The power dissipated by the resistor is P = V I = I 2 R = V 2 /R.

1.2 Kirchoff’s Laws

Consider an electrical circuit, that is a closed conductive path (for example a battery con-
nected to a resistor via conductive wire), or a network of interconnected paths.
P P
1. For any node of the circuit in I = out I. Note that the choice of “in” or “out” for
any circuit segment is arbitrary, but it must remain consistent. So for the example of
Fig. 2 we have I1 = I2 + I3 .

2. For any closed circuit, the sum of the circuit EMFs (e.g. batteries, generators) is equal
P P
to the sum of the circuit voltage drops: E = V .

Three simple, but important, applications of these “laws” follow.

1
 I3

I1 I2

Figure 2: A current node.

1.2.1 Resistors in series

Two resistors, R1 and R2 , connected in series have voltage drop V = I(R1 + R2 ). That is,
they have a combined resistance Rs given by their sum:

Rs = R1 + R2
Pn
This generalizes for n series resistors to Rs = i=1 Ri .

1.2.2 Resistors in parallel

Two resistors, R1 and R2 , connected in parallel have voltage drop V = IRp , where

Rp = [(1/R1 ) + (1/R2 )]−1

This generalizes for n parallel resistors to

n
X
1/Rp = 1/Ri
i=1

1.2.3 Voltage Divider

The circuit of Fig. 3 is called a voltage divider. It is one of the most useful and important
circuit elements we will encounter. The relationship between Vin = Vac and Vout = Vbc is
given by  
R2
Vout = Vin
R1 + R2

1.3 Voltage and Current Sources

A voltage source delivers a constant voltage regardless of the current it produces. It is an
idealization. For example a battery can be thought of as a voltage source in series with a
small resistor (the “internal resistance” of the battery). When we indicate a voltage V input
to a circuit, this is to be considered a voltage source unless otherwise stated.
A current source delivers a constant current regardless of the output voltage. Again, this
is an idealization, which can be a good approximation in practice over a certain range of
output current, which is referred to as the compliance range.

2
 R1

Vin

R2 Vout

Figure 3: A voltage divider.

1.4 Thevenin’s Theorem

Thevenin’s theorem states that any circuit consisting of resistors and EMFs has an equivalent
circuit consisting of a single voltage source VTH in series with a single resistor RTH .
The concept of “load” is useful at this point. Consider a partial circuit with two output
points held at potential difference Vout which are not connected to anything. A resistor RL
placed across the output will complete the circuit, allowing current to flow through RL . The
resistor RL is often said to be the “load” for the circuit. A load connected to the output of
our voltage divider circuit is shown in Fig. 4
The prescription for finding the Thevenin equivalent quantities VTH and RTH is as follows:

• For an “open circuit” (RL → ∞), then VTH = Vout .

• For a “short circuit” (RL → 0), then RTH = VTH /Ishort .

An example of this using the voltage divider circuit follows. We wish to find the Thevenin
equivalent circuit for the voltage divider.

R1

Vin

R2 Vout RL

Figure 4: Adding a “load” resistor RL .

3
 The goal is to deduce VTH and RTH to yield the equivalent circuit shown in Fig. 5.

R TH

V TH R
L

Figure 5: The Thevenin equivalent circuit.

To get VTH we are supposed to evaluate Vout when RL is not connected. This is just our
voltage divider result:  
R2
VTH = Vin
R1 + R2
Now, the short circuit gives, by Ohm’s Law, Vin = Ishort R1 . Solving for Ishort and combining
with the VTH result gives
R1 R2
RTH = VTH /Ishort =
R1 + R2
Note that this is the equivalent parallel resistance of R1 and R2 .
This concept turns out to be very useful, especially when different circuits are connected
together, and is very closely related to the concepts of input and output impedance (or
resistance), as we shall see.

4
 Class Notes 2

1.5 Thevenin Theorem (contd.)

Recall that the Thevenin Theorem states that any collection of resistors and EMFs is equiv-
alent to a circuit of the form shown within the box labelled “Circuit A” in the figure below.
As before, the load resistor RL is not part of the Thevenin circuit. The Thevenin idea,
however, is most useful when one considers two circuits or circuit elements, with the first
circuit’s output providing the input for the second circuit. In Fig. 6, the output of the
first circuit (A), consisitng of VTH and RTH , is fed to the second circuit element (B), which
consists simply of a load resistance (RL ) to ground. This simple configuration represents, in
a general way, a very broad range of analog electronics.

Circuit A

Circuit B

R TH

V TH Vout R
L

Figure 6: Two interacting circuits.

1.5.1 Avoiding Circuit Loading

VTH is a voltage source. In the limit that RTH → 0 the output voltage delivered to the load
RL remains at constant voltage. For finite RTH , the output voltage is reduced from VTH by
an amount IRTH , where I is the current of the complete circuit, which depends upon the
value of the load resistance RL : I = VTH /(RTH + RL ).
Therefore, RTH determines to what extent the output of the first circuit behaves as an
ideal voltage source. An approximately ideal behavior turns out to be quite desirable in most
cases, as Vout can be considered constant, independent of what load is connected. Since our
combined equivalent circuit (A + B) forms a simple voltage divider, we can easily see what
the requirement for RTH can be found from the following:
 
RL VTH
Vout = VTH =
RTH + RL 1 + (RTH /RL )

5
 Thus, we should try to keep the ratio RTH /RL small in order to approximate ideal behavior
and avoid “loading the circuit”. A maximum ratio of 1/10 is often used as a design rule of
thumb.
A good power supply will have a very small RTH , typically much less than an ohm. For
a battery this is referred to as its internal resistance. The dimming of one’s car headlights
when the starter is engaged is a measure of the internal resistance of the car battery.

1.5.2 Input and Output Impedance

Our simple example can also be used to illustrate the important concepts of input and output
resistance. (Shortly, we will generalize our discussion and substitute the term “impedance”
for resistance. We can get a head start by using the common terms “input impedance” and
“output impedance” at this point.)

• The output impedance of circuit A is simply its Thevenin equivalent resistance RTH .
The output impedance is sometimes called “source impedance”.

• The input impedance of circuit B is its resistance to ground from the circuit input. In
this case it is simply RL .

It is generally possible to reduce two complicated circuits, which are connected to each
other as an input/output pair, to an equivalent circuit like our example. The input and
output impedances can then be measured using the simple voltage divider equations.

2 RC Circuits in Time Domain

2.0.3 Capacitors
Capacitors typically consist of two electrodes separated by a non-conducting gap. The
quantitiy capacitance C is related to the charge on the electrodes (+Q on one and −Q on
the other) and the voltage difference across the capacitor by

C = Q/VC

Capacitance is a purely geometric quantity. For example, for two planar parallel electrodes
each of area A and separated by a vacuum gap d, the capacitance is (ignoring fringe fields)
C = 0 A/d, where 0 is the permittivity of vacuum. If a dielectric having dielectric constant
κ is placed in the gap, then 0 → κ0 ≡ . The SI unit of capacitance is the Farad. Typical
laboratory capacitors range from ∼ 1pF to ∼ 1µF.
For DC voltages, no current passes through a capacitor. It “blocks DC”. When a time
varying potential is applied, we can differentiate our defining expression above to get
dVC
I =C (1)
dt
for the current passing through the capacitor.

6
 R

Vin I C Vout

Figure 7: RC circuit — integrator.

2.0.4 A Basic RC Circuit

Consider the basic RC circuit in Fig. 7. We will start by assuming that Vin is a DC voltage
source (e.g. a battery) and the time variation is introduced by the closing of a switch at
time t = 0. We wish to solve for Vout as a function of time.
Applying Ohm’s Law across R gives Vin − Vout = IR. The same current I passes through
the capacitor according to I = C(dV /dt). Substituting and rearranging gives (let V ≡ VC =
Vout ):
dV 1 1
+ V = Vin (2)
dt RC RC
The homogeneous solution is V = Ae−t/RC , where A is a constant, and a particular solution
is V = Vin . The initial condition V (0) = 0 determines A, and we find the solution
h i
V (t) = Vin 1 − e−t/RC (3)

This is the usual capacitor “charge up” solution.

Similarly, a capacitor with a voltage Vi across it which is discharged through a resistor
to ground starting at t = 0 (for example by closing a switch) can in similar fashion be found
to obey
V (t) = Vi e−t/RC

2.0.5 The “RC Time”

In both cases above, the rate of charge/discharge is determined by the product RC which
has the dimensions of time. This can be measured in the lab as the time during charge-up or
discharge that the voltage comes to within 1/e of its asymptotic value. So in our charge-up
example, Equation 3, this would correspond to the time required for Vout to rise from zero
to 63% of Vin .

2.0.6 RC Integrator
From Equation 2, we see that if Vout  Vin then the solution to our RC circuit becomes
Z
1
Vout = Vin (t)dt (4)
RC

7
Note that in this case Vin can be any function of time. Also note from our solution Eqn. 3
that the limit Vout  Vin corresponds roughly to t  RC. Within this approximation, we
see clearly from Eqn. 4 why the circuit above is sometimes called an “integrator”.

2.0.7 RC Differentiator
Let’s rearrange our RC circuit as shown in Fig. 8.

Vin I R Vout

Figure 8: RC circuit — differentiator.

Applying Kirchoff’s second Law, we have Vin = VC + VR , where we identify VR = Vout .

By Ohm’s Law, VR = IR, where I = C(dVC /dt) by Eqn. 1. Putting this together gives

d
Vout = RC (Vin − Vout )
dt
In the limit Vin  Vout , we have a differentiator:
dVin
Vout = RC
dt
By a similar analysis to that of Section 2.0.6, we would see the limit of validity is the opposite
of the integrator, i.e. t  RC.

8
4 Diode Circuits
The figure below is from Lab 2, which gives the circuit symbol for a diode and a drawing of
a diode from the lab. Diodes are quite common and useful devices. One can think of a diode
as a device which allows current to flow in only one direction. This is an over-simplification,
but a good approximation.

IF

Figure 13: Symbol and drawing for diodes.

17
 A diode is fabricated from a pn junction. Semi-conductors such as silicon or germanium
can be “doped” with small concentrations of specific impurities to yield a material which
conducts electricity via electron transport (n-type) or via holes (p-type). When these are
brounght together to form a pn junction, electrons (holes) migrate away from the n-type
(p-type) side, as shown in Fig. 14. This redistribution of charge gives rise to a potential gap
∆V across the junction, as depicted in the figure. This gap is ∆V ≈ 0.7 V for silicon and
≈ 0.3 V for germanium.

p - -- ++
++ n
- - +

V
∆V

Figure 14: A pn junction, forming a voltage gap across the junction.

When a diode is now connected to an external voltage, this can effectively increase or
decrease the potential gap. This gives rise to very different behavior, depending upon the
polarity of this external voltage, as shown by the typical V -I plot of Fig. 15. When the
diode is “reverse biased,” as depicted in the figure, the gap increases, and very little current
flows across the junction (until eventually at ∼ 100 V field breakdown occurs). Conversely,
a “forward biased” configuration decreases the gap, approaching zero for an external voltage
equal to the gap, and current can flow easily. An analysis of the physics gives the form
h i
I = IS eeV /kT − 1

where IS is a constant, V is the applied voltage, and kT /e = 26 mV at room temperature.

Thus, when reverse biased, the diode behaves much like an open switch; and when forward
biased, for currents of about 10 mA or greater, the diode gives a nearly constant voltage
drop of ≈ 0.6 V.

18
 I
Forward Biased
+ -
10 mA

-100 V
V
0.7 V
Reverse Biased
+ -
1 µΑ

Figure 15: The V -I behavior of a diode.

19
 Class Notes 5

5 Transistors and Transistor Circuits

Although I will not follow the text in detail for the discussion of transistors, I will follow
the text’s philosophy. Unless one gets into device fabrication, it is generally not important
to understand the inner workings of transistors. This is difficult, and the descriptions which
one gets by getting into the intrinsic properties are not particularly satisfying. Rather, it is
usually enough to understand the extrinsic properties of transistors, treating them for the
most part as a black box, with a little discussion about the subtleties which arise from within
the black box.
In practice, one usually confronts transistors as components of pre-packaged circuits, for
example in the operational amplifier circuits which we will study later. However, I have
found that it is very useful to understand transistor behavior even if one rarely builds a
transistor circuit in practice. The ability to analyze the circuit of an instrument or device is
quite valuable.
We will start, as with Chapter 2 of the text, with bipolar transistors. There are other
common technologies used, particularly FET’s, which we will discuss later. However, most
of what you know can be carried over directly by analogy. Also, we will assume npn type
transistors, except where it is necessary to discuss pnp. For circuit calculations, one simply
reverses all signs of relevant currents and voltages in order to translate npn to pnp.

5.1 Connections and Operating Mode

Below we have the basic connection definitions for bipolar transistors as taken from the text.
As indicated in the figure, and as you determined in lab, the base-emitter and base-collector
pairs behave somewhat like diodes. Do not take this too literally. In particular, for the base-
collector pair this description is far off the mark. We will refer to the transistor connections
as C, B, and E.

Figure 16: Bipolar transistor connections.

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5.1.1 Rules for Operation
Let’s start by stating what needs to be done to a transistor to make it operate as a transistor.
Suppose we have the following:
1. VC > VE , by at least a few ×0.1 V.
2. VB > VE
3. VC > VB
4. We do not exceed maximum ratings for voltage differences or currents.
When these conditions are not met, then (approximately) no current flows in or out of the
transistor. When these conditions are met, then current can flow into the collector (and out
the emitter) in proportion to the current flowing into the base:
IC = hFE IB = βIB (19)
where hFE = β is the current gain. (We will use the β notation in these notes.) The value
of the current gain varies from transistor type to type, and within each type, too. However,
typically β ≈ 100. Unless otherwise specified, we will assume β = 100 when we need a
number. From Figure 17 below and Kirchoff’s first law, we have the following relationship
among the currents:
IE = IB + IC = IB + βIB = (β + 1)IB ≈ IC (20)
As we will see below, the transistor will “try” to achieve its nominal β. This will not always
be possible, in which case the transistor will still be on, but IC < βIB . In this case, the
transistor is said to be “saturated”.

IC
IB

IE

Figure 17: Transistor currents.

Because β  1, the main utility of the transistor becomes evident: We are able to control
a large current IC ≈ IE with a small current IB . The simplest such control is in the form of
a switch. Note that in our second condition above we require that the base-emitter “diode”
be forward biased, i.e. that VBE ≡ VB − VE be positive. In fact, the base-emitter pair does
behave much like a diode. So when it is forward biased, current can easily flow, and the
voltage drop quickly reaches its asymptotic value of ≈ 0.6 V. Unless otherwise noted, we will
generally assume that, when the transistor is in operation, we have
VBE ≡ VB − VE ≈ 0.6Volts (21)

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5.1.2 Transistor Switch and Saturation
From the preceding discussion, the most straightforward way to turn the transistor “on” or
“off” is by controlling VBE . This is illustrated by the circuit below which was introduced in
Lab 2. We will follow the lab steps again here.

+5 V

33

LED
R

2N2222A

Figure 18: A transistor switch.

First, let R = 10 kΩ. When the switch is open, IC = βIB = 0, of course. When the switch
is closed, then VBE becomes positive and VB = VE + 0.6 = 0.6 V. IB = (5 − 0.6)/104 = 0.44
mA. Hence, IC = βIB = 44 mA. Then, assuming negligible voltage drop across the LED,
VC = 5 − 33 × 0.044 = 3.5 V. So, VCE > 0 and VCB > 0. So this should work just fine.
Substituting R = 1 kΩ gives IB = 4.4 mA and βIB = 440 mA. Setting this equal to
IC would give VC = −9.5 V. This is not possible. In order to stay in operation VCE must
be positive, and depending upon the transistor species, usually can only go as low as ≈ 0.2
V. (Appendix K of the text, pages 1066-1067, gives data for a typical model.) Hence, IC is
limited to a maximum value of IC = (5 − 0.2)/33 ≈ 150 mA. So, effectively, the current gain
has been reduced to β = IC /IB = 150/4.4 = 34. In this mode of operation, the transistor is
said to be saturated. It turns out that for high-speed switching applications, for example in
computers, the transistors are generally operated in a partially saturated mode, for reasons
discussed in Section 2.02 of the text.

5.2 Notation
We will now look at some other typical transistor configurations, including the emitter
follower, the current source, and the common-emitter amplifier. But first we need to set
some notation. We will often be considering voltages or currents which consist of a time
varying signal superposed with a constant DC value. That is,
V (t) = V0 + v(t) ; I(t) = IO + i(t)
where V0 and I0 are the DC quantities, and v or i represent time-varying signals. Hence,
∆V = v ; ∆I = i

22
Typically, we can consider v or i to be sinusoidal functions, e.g. v(t) = vo cos(ωt + φ), and
their amplitudes vo and io (sometimes also written as v or i when their is no confusion) are
small compared with V0 or I0 , respectively.

5.3 Emitter Follower

The basic emitter follower configuration is shown below in Figure 19. An input is fed to
the base. The collector is held (by a voltage source) to a constant DC voltage, VCC . The
emitter connects to a resistor to ground and an output. As we shall see, the most useful
characteristic of this circuit is a large input impedance and a small output impedance.

Vcc

Vin

Vout

Figure 19: Basic emitter follower.

For an operating transistor we have Vout = VE = VB − 0.6. Hence, vout = vE = vB . From

this, we can determine the voltage gain G, equivalent to the transfer function, for the emitter
follower:
G ≡ vout /vin = vE /vB = 1 (22)
From Eqn. 20, IE = (β + 1)IB ⇒ iE = (β + 1)iB . Therefore, we see that the follower exhibits
“current gain” of output to input equal to β + 1. Assuming the output connection draws
negligible current, we have by Ohm’s Law iE = vE /R. Using this in the previous expression
and solving for iB gives iB = iE /(β + 1) = (vB /R)/(β + 1). Now we can define the input
impedance of the follower:
Zin = vin /iin = vB /iB = R(β + 1) (23)
By applying the Thevenin definition for equivalent impedance, we can also determine the
output impedance of the follower:
vin Zsource
Zout = vin /iE = = (24)
(β + 1)iB β+1
where Zsource is the source (i.e. output) impedance of the circuit which gave rise to vin .
Hence, the emitter follower effectively increases input impedance (compared to R) by a
factor β + 1 ≈ 100 and reduces output impedance, relative to that of the source impedance
of the previous circuit element, by a factor β + 1 ≈ 100. We will return to this point next
time.

23
 Class Notes 6

Following our discussion last time of the basic transistor switch and emitter follower, we
will likewise introduce the basic relations for two other transistor circuit configurations: the
current source and the common-emitter amplifier. We will then return to the issue of input
and output impedance so that we can build realistic circuits using these configurations.

5.4 Transistor Current Source

Figure 20 illustrates the basic configuration for a single-transistor current source. VCC is
a constant positive voltage from a DC power supply. Hence, the base voltage VB is also a
constant, with VB = VCC R2 /(R1 + R2 ). RL represents a load which we intend to power with
a current which is approximately independent of the specific value of RL .

Vcc

RC I
R1 C

IB
VB

IE
R2 RE

Figure 20: Basic transistor current source.

When the transistor is on, we have IE = (β+1)IB . In addition, we have VE = VB −0.6; and
VE = IE RE = (β + 1)IB RE . Solving for IB in this last equation gives IB = VE /((β + 1)RE ).
We can combine these to solve for the current which passes through RL :
VE β VB − 0.6 VB − 0.6
IL = IC = βIB = β = ≈ (25)
(β + 1)RE β + 1 RE RE

Hence, we see that indeed IL is independent of RL .

Of course, there are limitations to the range of RL for which the current source behavior
is reasonable. Recall that the transistor will shut down if VB ≤ VE or if VCE is less than
≈ 0.2 V. These criteria determine the compliance of the current source, that is its useful
operating range. So, for example, if we have VCC = 15 V and VB = 5 V in our circuit above,
then VE = 5 − 0.6 = 4.4 V, and the range of compliance for the collector voltage VC will be
approximately 4.6 V to 15 V.

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5.5 Common-emitter Amplifier
Figure 21 represents the basic configuration of the common-emitter amplifier. To determine
the output for this circuit, we assume at this point that the input is a sum of a DC offset
voltage V0 and a time-varying signal vin , as discussed last time. (In the next section we will
discuss how to achieve these.) V0 provides the transistor “bias”, so that VB > VE , and the
signal of interest is vin .
Vcc

RC

Vout

Vin

RE

Figure 21: Basic common-emitter amplifier.

The incoming signal shows up on the emitter: vin = ∆(VE + 0.6) = ∆VE ≡ vE . And by
Ohm’s Law, iE = vE /RE = vB /RE . As we found previously, iE = iC + iB ≈ iC . Now, the
voltage at the output is Vout = VC = VCC − IC RC . And therefore, ∆Vout ≡ vout = −iC RC .
Putting all of this together, vout = −iC RC ≈ −iE RC = −(vB /RE ) RC , giving the voltage
gain G:
G ≡ vout /vin = −RC /RE (26)

5.6 Circuit Biasing and Input

Now we need to figure out how to provide inputs to our basic circuits. In Fig. 22 below we
show the input network for a common-emitter amplifier. The same considerations we apply
here apply equally to the input of an emitter follower. The idea is that the voltage divider
R1 and R2 provide the DC bias voltage (V0 in our discussion above), and the time varying
signal is input through the capacitor (which blocks the DC). We need to figure out what
design criteria should be applied to this design.
We need to make sure that our input circuit does not load the amplifier, C is chosen
to give a reasonable RC cutoff, and that the gain of the amplifier is what we want. We
will start by designing the DC component of the input network, that is choosing R1 and
R2 . It is helpful when designing the input network to consider the equivalent circuit shown
in Fig. 23. The diode and resistor labelled Zin represent the transistor input: the voltage
drop across the base-emitter “diode” and the input impedance from Eqn. 23. RTH is the
Thenenin equivalent resistance for the DC input network.
So our design procedure can be as follows:

25
 Vcc

RC
R1
Vout
C
Vin

R2
RE

Figure 22: Common-emitter amplifier with input network.

R TH
VB

VTH IB
Z in

Figure 23: Equivalent circuit for design of DC input network.

1. Choose RTH  Zin = RE (β + 1).

2. Determine R1 and R2 based on the equivalent circuit.

3. Choose C to provide a proper high-pass cutoff frequency.

4. Choose the amplifier gain, if need be.

26
 Class Notes 9

6 Op-Amp Basics
The operational amplifier is one of the most useful and important components of analog elec-
tronics. They are widely used in popular electronics. Their primary limitation is that they
are not especially fast: The typical performance degrades rapidly for frequencies greater than
about 1 MHz, although some models are designed specifically to handle higher frequencies.
The primary use of op-amps in amplifier and related circuits is closely connected to the
concept of negative feedback. Feedback represents a vast and interesting topic in itself. We
will discuss it in rudimentary terms a bit later. However, it is possible to get a feeling for the
two primary types of amplifier circuits, inverting and non-inverting, by simply postulating
a few simple rules (the “golden rules”). We will start in this way, and then go back to
understand their origin in terms of feedback.

6.1 The Golden Rules

The op-amp is in essence a differential amplifer of the type we discussed in Section 5.7 with
the refinements we discussed (current source load, follower output stage), plus more, all
nicely debugged, characterized, and packaged for use. Examples are the 741 and 411 models
which we use in lab. These two differ most significantly in that the 411 uses JFET transistors
at the inputs in order to achieve a very large input impedance (Zin ∼ 109 Ω), whereas the
741 is an all-bipolar design (Zin ∼ 106 Ω).
The other important fact about op-amps is that their open-loop gain is huge. This is the
gain that would be measured from a configuration like Fig. 29, in which there is no feedback
loop from output back to input. A typical open-loop voltage gain is ∼ 104 –105 . By using
negative feedback, we throw most of that away! We will soon discuss why, however, this
might actually be a smart thing to do.

in1 +
out

in2 -

Figure 29: Operational amplifier.

The golden rules are idealizations of op-amp behavior, but are nevertheless very useful
for describing overall performance. They are applicable whenever op-amps are configured
with negative feedback, as in the two amplifier circuits discussed below. These rules consist
of the following two statements:

1. The voltage difference between the inputs, V+ − V− , is zero.

(Negative feedback will ensure that this is the case.)

35
 2. The inputs draw no current.
( This is true in the approximation that the Zin of the op-amp is much larger than any
other current path available to the inputs.)
When we assume ideal op-amp behavior, it means that we consider the golden rules to be
exact. We now use these rules to analyze the two most common op-amp configurations.

6.2 Inverting Amplifier

The inverting amplifier configuration is shown in Fig. 30. It is “inverting” because our
signal input comes to the “−” input, and therefore has the opposite sign to the output. The
negative feedback is provided by the resistor R2 connecting output to input.

R2

R1
VIN -
VOUT
+

Figure 30: Inverting amplifier configuration.

We can use our rules to analyze this circuit. Since input + is connected to ground, then
by rule 1, input − is also at ground. For this reason, the input − is said to be at virtual
ground. Therefore, the voltage drop across R1 is vin − v− = vin , and the voltage drop across
R2 is vout − v− = vout . So, applying Kirchoff’s first law to the node at input −, we have,
using golden rule 2:
i− = 0 = iin + iout = vin /R1 + vout /R2
or
G = vout /vin = −R2 /R1 (34)
The input impedance, as always, is the impedance to ground for an input signal. Since
the − input is at (virtual) ground, then the input impedance is simply R1 :

Zin = R1 (35)

The output impedance is very small (< 1 Ω), and we will discuss this again soon.

6.3 Non-inverting Amplifier

This configuration is given in Fig. 31. Again, its basic properties are easy to analyze in
terms of the golden rules.
 
R1
vin = v+ = v− = vout
R1 + R2

36
where the last expression is from our voltage divider result. Therefore, rearranging gives
R1 + R2 R2
G = vout /vin = =1+ (36)
R1 R1
The input impedance in this case is given by the intrinsic op-amp input impedance. As
mentioned above, this is very large, and is typically in the following range:

Zin ∼ 108 to 1012 Ω (37)

VIN +
VOUT
-
R2

R1

Figure 31: Non-inverting amplifier configuration.

6.4 Departures from Ideal

It is no surprise that the golden rules are not exact. On the other hand, they generally
describe most, if not all, observed op-amp behavior. Here are some departures from ideal
performance.

• Offset voltage, VOS . Recall that the input of the op-amp is a differential pair. If the
two transistors are not perfectly matched, an offset will show up as a non-zero DC
offset at the output. As you found in Lab 4, this can be zeroed externally. This offset
adjustment amounts to changing the ratio of currents coming from the emitters of the
two input transistors.

• Bias current, Ibias . The transistor inputs actually do draw some current, regardless
of golden rule 2. Those which use bipolar input transistors (e.g. the 741) draw more
current than those which use FETs (e.g. the 411). The bias current is defined to be
the average of the currents of the two inputs.

• Offset current, IOS . This is the difference between the input bias currents. Each bias
current, after passing through an input resitive network, will effectively offer a voltage
to the op-amp input. Therefore, an offset of the two currents will show up as a voltage
offset at the output.

37
 Perhaps the best way to beat these efects, if they are a problem for a particular appli-
cation, is to choose op-amps which have good specifications. For example, IOS can be a
problem for bi-polar designs, in which case choosing a design with FET inputs will usually
solve the problem. However, if one has to deal with this, it is good to know what to do. Fig-
ure 32 shows how this might be accomplished. Without the 10 kΩ resistors, this represents
a non-inverting amplifier with voltage gain of 1 + (105 /102 ) ≈ 1000. The modified design in
the figure gives a DC path from ground to the op-amp inputs which are aproximately equal
in resistance (10 kΩ), while maintaining the same gain.

IN +
OUT
10k -

10k
100k

100

Figure 32: Non-inverting amplifier designed to minimize effect of IOS .

Similarly, the inverting amplifier configuration can be modified to mitigate offset currents.
In this case one would put a resistance from the − input to ground which is balanced by the
R1 and R2 in parallel (see Fig. 30).
It is important to note that, just as we found for transistor circuits, one shpould always
provide a DC path to ground for op-amp inputs. Otherwise, charge will build up on the
effective capacitance of the inputs and the large gain will convert this voltage (= Q/C) into
a large and uncontrolled output voltage offset.
However, our modified designs to fight IOS have made our op-amp designs worse in a
general sense. For the non-inverting design, we have turned the very large input impedance
into a not very spectacular 10 kΩ. In the inverting case, we have made the virtual ground
into an approximation. One way around this, if one is concerned only with AC signals, is
to place a capacitor in the feedback loop. For the non-inverting amplifier, this would go in
series with the resistor R1 to ground. Therefore, as stated before, it is best, where important,
to simply choose better op-amps!

38
 Class Notes 10

7 Comparator Circuits
7.1 Simple Comparator
A comparator can be thought of as a fast, high-gain op-amp which is not used with negative
feedback. This basic idea is shown in Fig. 38. The comparator has large open-loop gain A.
The function of a comparator is to decide which of the two inputs has larger voltage. We
have in the limit of very large A
(
+Vmax v+ > v−
vout = A(v+ − v− ) =
−|Vmin | v+ < v−

where Vmax and Vmin are aprroximately the power supply voltages. Therefore, the comparator
converts an analog input signal into an output with two possible states. Hence, this can be
thought of as a 1-bit analog to digital converter (A/D or ADC). The comparator circuit
does not use negative feedback, and so purposefully violates Golden Rule 1. In fact, as we
shall see below, comparator circuits often employ positive feedback to ensure that nothing
intermediate between the two extreme output states is utilized. Finally, without negative
feedback, there is no need to do compensation Thus there is more gain at high frequency,
meaning faster response. Also, the amplifier can be optimized for speed at the expense of
linearity. Comparators, like op-amps, are readily available as integrated circuit chips, such
as the model 311 (LM311 or LF311) which we have in lab. Table 9.3 (pages 584-5) of the
text lists some of the possibilities on the market.

+ R

A
v out
-

Figure 38: Comparator model.

We have shown explicitly in Fig. 38 the output stage consisting of a transistor with
collector connected to the comparator output. This is the open collector output, and is
typical. It is used in the 311 comparators we use in lab. We are obliged to complete
the circuit by providing a “pull-up” resistor R. The transistor emitter is also available as
an external connection. It should be connected to whatever is the lower of the two output
voltage states we require. This is chosen to be ground in the figure. The high-gain differential
amplifier of the comparator has output connected to the base of this transistor. When that

44
is low it will, after passing through an inverter, turn the transistor on. In this case, current
sill pass through R and to the emitter connection. This current produces a voltage drop
across R which pulls the output voltage (very close) to the emitter voltage (ground in our
example). Typically R ≈ 1 kΩ. When the comparator inputs are in the complementary
inequality, the transistor is switched off and the output voltage goes to the voltage held by
R, which is +5 V in our example. Using outputs of 0 and +5 V are typical, since these
voltages correspond (roughly) to the TTL convention of digital electronics.

7.2 Schmitt Trigger

A typical circuit using a comparator is shown in Fig. 39. The output goes to one of its
two possible states depending upon whether the input v− is greater than or less than the
“threshold” determined by v+ . Positive feedback is used to help reinforce the chosen output
state. In this configuration, called the Schmitt trigger, two thresholds can be set, depending
upon which state the output is in. The way this works is illustrated in Fig. 40. Vh and
Vl refer to threshold voltages which are set up at the comparator + input by the resistor
divider chain. As long as R3  R4 , the output states will still be determined by the pull-up
resistor R4 . For the circuit in the figure, these states are 0 and +5 V. The resistor divider,
then sets V+ at different values, depending upon which state the ouput is in. Whether the
connection to +V1 and R1 is required or not depends upon whether a positive threshold is
required when Vout = 0.

+V1

R +5
1

v - R4
in

v out
+

R3
R
2

Figure 39: Schmitt trigger.

Referring to Fig. 40, we start with Vin = V− < V+ . The output is in the +5 V state.
In this case the threshold produced by the voltage divider, Vh , is the larger value due to
the contribution of Vout . When the input crosses the threshold, the output changes to the
other state, 0 V. The divider then gives a lower threshold Vl . Having two thresholds provides
comparator stability and noise immunity. Any noise which is << (Vh − Vl ) will not affect
the operation of the comparator.

45
 v
in

Vh

Vl

t
Vout

+5

Figure 40: Examples of Schmitt trigger signals versus time. Top: vin ; the dashed lines
indicate the two thresholds set up at the + input of the comparator. Bottom: vout .

Note that the resistor R1 is not necessary if Vl = 0. Also, a negative threshold could be
set in two ways. The resistor chain forming the threshold could be connected to negative
voltage, rather than ground, or the emitter of the output transistor could be connected to
negative voltage, thus producing an output with low state at this negative voltage.

7.3 RC Relaxation Oscillator

The circuit of Fig. 41 uses both positive and negative feedback. It is called an RC relaxation
oscillator. Note that the positive feedback is a Schmitt configuration. So we expect to have
two thresholds. The output voltages are set up to be either +5 V (pull up) or −5 V (emitter
connection). Analysis of the voltage divider reveals that the corresponding two threshold
at V+ will be ±1 V. When the output is +5 V, the capacitor C is charged up through the
resistor R. The RC part of the circuit is shown in Fig. 42. As we found in class, the voltage
across the capacitor, and hence the − input to the comparator, is given (after applying initial
conditions) by
3V0 (t1 −t)/RC
Vc (t) = V0 − e
2
where t1 is the time at which the comparator output is first at V0 = +5 V. Hence, the charge
up curve will eventually cross the +1 V threshold, forcing the comparator to the −5 V state,
and thereby starting a ramp-down of the capacitor voltage given by
3V0 (t2 −t)/RC
Vc (t) = −V0 + e
2
where t2 is the time at which the output switched to −5 V. This ramp down will cross the
−1 V threshold, and the whole process will therefore repeat indefinitely. The output will
be a square wave, whereas Vc resembles a triangle wave. This is a common technique for
building an oscillator.

46
 +5
100K

- 1K
10nF

v out
+
-5

80K

20K

Figure 41: RC relaxation oscillator.

100K

Vin 10nF Vout

Figure 42: RC circuit with Vin from the comparator output and Vout going to the − com-
parator input of previous figure.

47
 Class Notes 11

8 Radio Basics
In this section we will discuss some basic concepts concerning signal modulation, generation,
receiving, and demodulation. Some of these concepts are quite general and see applications
in many areas. However, the most familiar perhaps is that of broadcast radio generation
and receiving, hence the title of the section.
We will begin with a simplified discussion of amplitude modulation (AM). From this, we
can see how to carry over many of the concepts to other forms of signal modulation and
reception of signals.

8.1 The Case for Modulation

Consider the familiar example of radio signals which carry audio information. The audio
itself has a typical frequency range of
20Hz < faudio < 20kHz
Hence, audio has an effective bandwidth of about 20 kHz. Even if it were possible to broadcast
signals of such low frequency in the electromagnetic spectrum, there would be a multitude
of confusion resulting from the interference between competing broadcasts.
On the other hand, electromagnetic signals in the radio-frequency (RF) range, have
frequencies roughly from several hundred kHz to several hundred MHz. An audio signal
which modulates an RF “carrier” of, say, 20 Mhz, uses only the range 20.00 ± 0.02 MHz.
Another broadcast “channel” with a carrier frequency only 100 kHz removed will have give
interference with its own signal at 20.10 ± 0.02 MHz. Hence, with a carrier at much higher
frequency than the signal, many channels can co-exist with little or no interference.
We will look at several techniques for signal modulation, beginning with amplitude mod-
ulation. It is important to remember that the signals do not have to be audio, that is only a
familiar example. The signals could be any form of information which can be converted to an
electromagnetic signal. Another familiar example is the modulation of computer-generated
signals for transmission over telephone lines.

8.2 Amplitude Modulation

Figure 43 gives the general scheme. Each frequency, ωm = 2πfm , which represents informa-
tion is “mixed” with the high-frequency carrier, ωc = 2πfc , to produce an output signal of
the form
Vs (t) = A [1 + m cos ωm t] cos ωc t (45)
where A is a constant and the constant m ≤ 1 is known as the modulation index. We see
that the carrier amplitude A cos(ωc t) is modulated by the factor 1+m cos(ωm t), where m = 0
represents the limit of no modulation and m = 1 is a miximally modulated signal.
By using the identity
1
cos x cos y = [cos(x + y) + cos(x − y)]
2

48
 f + Vs
c
+

fm

Figure 43: Schematic of modulation.

we can do a “poor man’s” Fourier transform of Vs :

1
Vs (t) = A cos ωc t + Am [cos ((ωc + ωm )t) + cos ((ωc − ωm )t)] (46)
2
So we have a central carrier frequency plus two side-bands at fc ± fm .
One simple way to achieve an amplitude modulated signal is to use an amplifier for which
the input is the carrier signal and the amplifier power itself is modulated by the signal, e.g.
VCC − VEE = V0 + V1 cos ωm t, where V0 is the DC offset amd we identify m ∝ V1 /V0 .

8.3 Detection of AM
8.3.1 Heterodyne Detection
We first consider the simple, but subtle, radio receiver shown in Fig. 44. A real receiver
might include at the input an antenna followed by an LC bandpass filter, with tunable
capacitor. The filter
√ is a resonant circuit with a sharp peak at the carrier frequency of the
broadcast ωc = 1/ LC. The Q of the filter is set so that the width of the peak of the
transfer function matches the bandwidth ∆ω of the modulating signal, roughly from ωc − ωm
to ωc + ωm . With this addition, and without the amplified output, the passive “crystal”
radio receiver looks like this.
a R
IN G
OUT
∆ω
C
r

Figure 44: Simple AM receiver.

The resistor R and capacitor clearly form a low-pass filter. The cutoff frequency would
be set between ωm and ωc in order to keep the information encoded by the low-frequency
modulations, and remove the carrier. However, without the diode, the effect would be to
throw away all of the information, too, since as we saw from Eqn. 46, all of the frequencies

49
of interest are actually in a narrow band centered about the carrier frequency. Without the
diode, the system is linear, and no signal will be present at the output.
The diode is non-linear; recall its V -I curve. In order to illustrate how this works, we
assume a specific form for the response of a forward-biased diode as I = bV 2 , where b is a
constant. A resistor r is inserted between point a and ground (Fig. 44) in order to convert
this diode current to a voltage to be presented to the low-pass filter. Now let V be the linear
combination of two signals: V = V1 cos ω1 t + V2 cos ω2 t. This then gives rise to an output
current
I = bV12 cos2 ω1 t + bV22 cos2 ω2 t + 2bV1 V2 cos ω1 t cos ω2 t
Again using trigonometric identities to form the poor man’s Fourier transform, this becomes
2I/b = V12 + V22 + V12 cos 2ω1 t + V22 cos 2ω2 t + 2V1 V2 [cos((ω1 + ω2 )t) + cos((ω1 − ω2 )t)]
Therefore, from the original two frequencies, the diode has produced harmonics (twice the
original), as well as the sum and difference.
In the case of our simplified AM broadcast signal of Eqn. 46, where three frequencies
are originally present (ωc and ωc ± ωm ), the effect of the diode is easily generalized from the
steps above using the substitutions ω1 = ωc and ω2 = ωc + ωm or ω2 = ωc − ωm . We find
that the output of the diode will include DC, the first harmonics of all three frequecies, as
well as the six possible sum and difference frequencies. Of particular interest for our receiver
is the difference frequency between the carrier and the modulated carrier. For example,
ωc − (ωc − ωm ) = ωm
Therefore, we do in fact recover a Fourier component corresponding to our original modulat-
ing signal. This can then be separated from the higher frequencies using the low-pass filter
and amplifier. This represents a simple example of so-called heterodyne detection, in which
different frequencies are combined in order to extract a difference frequency.
As an aside, we note that with our example I = bV 2 , we have squared the input. When
we examine this in frequency domain (Fourier transform) and low-pass filter the result (av-
eraging), we have effectively formed the so-called power spectrum of the input, also called
the spectral power density.

8.3.2 Harmonic Distortion

Note that we intentionally introduced a non-linear element (the diode) to our system. An un-
intentional non-linearity in a circuit, for example in an audio amplifier circuit, can introduce
additional frequencies as demonstrated above. In particular, our diode with the I = bV 2 be-
havior introduced first harmonics of the original frequencies at twice the original. In general,
a non-linearity may include any number of higher-order terms: I = b1 V + b2 V 2 + b3 V 3 + · · ·,
where each additional power can generate the next higher harmonic. For example, a non-
zero b3 will generate a 2nd harmonic of the original ω at 3ω. The introduction of harmonics
of the input signal is called harmonic distortion. Since the pattern of harmonics is what
distinguishes musical instrument types to the ear, the introduction of non-linearities should
be avoided in high-fidelity audio amplifiers.

8.3.3 Homodyne Detection

An example of this technique is given in the text, pages 653 and 889. It uses a phase-locked
loop (PLL) circuit at the input of the receiver. Recall that the PLL circuit is designed

50
to produce an output which is proportional to shifts in phase of the input. Since one can
consider the modulation of the carrier to be a phase shift (by amount ωm t), the output
of the PLL can then produce a voltage signal proportional to these phase shifts, which in
turn is used to provide active rectification of the input at the frequency of the modulation.
The essential non-linear behavior of the diode discussed above is provided in this case by an
active voltage multiplier. This type of PLL circuit is actually more relevant to FM detection,
which is discussed below.

8.3.4 Superheterodyne Detection

This technique is illustrated in the text, pages 895-6. It is essentially a fancy version of our
simple heterodyne detector above. In this case, the simple passive LC bandpass filter at the
input is replaced by a local oscillator and mixer. An example is given in Figure 13.41 of
the text. Consider an input carrier of frequency 10 MHz which has amplitude modulated at
some much lower frequency. This signal is mixed with a local oscillator of fixed frequency
greater than the carrier. In the example of the text, the local oscillator has frequency tuned
to be fLO = 10.455 MHz, exactly 455 kHz greater than the carrier. As with our earlier diode
example, the mixed signal includes the difference frequency, in this case 455 kHz, which in
turn has nearby sideband frequencies which differ from 455 kHz by the audio modulation
frequencies. From this point on, the detection is carried out as in the simple heterodyne
example. One advantage here is that a relatively high-frequency carrier, which in general
will be difficult to condition using conventional electronics is effectively reduced to a more
manageable frequency, in the example from 10 MHz to 455 kHz. The other advantage is
that the band-pass tuning which follows the mixer is always centered at a constant 455 kHz.
So the tuning is accomplished by adjusting the oscillator, rather than the filter.

8.4 Other Modulation Schemes

Recall from Eqn. 45 that for AM the amplitude is modulated by varying the frequency ωm .
However, to preserve the information, the generation and receipt of the amplitude must be
linear. In addition, most noise sources will naturally appear as voltages, and hence will add
to the AM signal. On the other hand, phase and frequency modulation (FM) do not suffer
from these complications. Hence, where fidelity is important, these schemes have intrinsic
advantages. Radio broadcast by FM also has the additional advantage, by dint of historical
accident, of occupying a higher frequency band, thus allowing easy accomodation of a full
audio bandwidth. However, unlike the AM radio band, the FM band signals do not reflect
from the ionosphere, and therefore can not be transmitted over very large distances (at
night).

8.4.1 Phase Modulation

A carrier of frequency ωc is phase modulated if the resulting signal has the form

V (t) = V0 cos(ωc t + Ap cos ωm t) (47)

where V0 and Ap are constants and ωm is the modulating frequency, as before. This can be
expanded, and for Ap  1 can also be simplified:

V (t)/V0 = cos ωc t cos(Ap cos ωm t) − sin ωc t sin(Ap cos ωm t)

51
 ≈ cos ωc t − Ap sin ωc t cos ωm t
1
= cos ωc t − Ap [sin((ωc + ωm )t) + sin((ωc − ωm )t)] (48)
2
As for AM, two new sidebands have appeared, but now they are 90◦ out of phase with
respect to the carrier.

8.4.2 Frequency Modulation

The phase of a sinusoidal function, when frequency is a function of time, can in general be
expressed as Z
φ = ωdt
Now suppose the frequency is modulated by a frequency ω about some central carrier fre-
quency
ω = ωc + Af cos ωm t
where Af is a constant. Then the phase becomes

Af
φ = ωc t + sin ωm t
ωm
Here, Af is called the frequency deviation and Af /ωm is the modulation index for FM.
Carrying out steps analogous to those for Eqn. 48 gives the following expression for the FM
signal:
Af
V (t)/V0 = cos φ = cos ωc t + [cos((ωc + ωm )t) − cos((ωc − ωm )t)] (49)
2ωm
So again the Fourier spectrum is similar to what we found for AM, except now one of the
two sidebands has amplitude of opposite sign.

8.5 FM Detection
In the AM detection schemes discussed above, the diode or other non-linear element is used
to extract an output signal proportional to cos ωm t, and hence provide a reproduction of the
original modulation, for example in the form of an audio signal. For FM detection we need
to replace the diode with something which can provide a voltage output proportional to the
input frequency modulated signal. We explored such a technique in Lab 5 in the form of the
phase-locked loop circuit. The PLL scheme is reproduced in Fig. 45. (For this application,
the counter is omitted.) Recall that the signal before the VCO, labelled Vout , is proportional
to input phase shifts. This is exactly what we need to detect the phase shift introduced by
FM. All that is left is to feed Vout to a low-pass filter and amplifier, as before.
An apparent practical limitation of this technique for FM radio reception is that PLLs do
not operate at these high frequencies (∼ 100 MHz). This is overcome by using the technique
discussed above at the front-end of the superheterodyne receiver. The input is mixed using a
local oscillator and the resulting lower frequency (455 kHz in our example) modulated signal
is then input to the PLL. Another technique, called quadrature detection is briefly discusses
in the text, page 652.

52
f Phase
in Low-pass
Detector Filter

f
replica

Counter VCO
(divide by n) (V->f)

f V
out out

Figure 45: PLL schematic. Vout provides the FM signal.

53