CSE 209
Computer Architecture
Design of an ALU
Saem Hasan
Lecturer
CSE, BUET
ALU and the Processor
ALU stands for Arithmetic Logic Unit
A part of the processor or CPU
Some Terminologies Revisiting
Decoder, Encoder
2X4 4X2
Decoder Encoder
E E
Some Terminologies Revisiting
DeMUX, MUX
1X4 4X1
DeMUX MUX
A Simplified
Processor in
Operation
0000 0001 0010 0011
Simplified Processor
with Scratchpad
Memory
Simplified Processor
with Scratchpad
Memory
Simplified Processor
with Accumulator
An ALU Unit
Can perform both Arithmetic and Logic Operations
Arithmetic/Logical Operation
Which Operation/Function
Helps Function-select to add
more variants
Parallel Adder
Parallel adder
A number of full-adder circuits connected in cascade
1-bit Half Adder
1-bit Full Adder
Parallel Adders
number of 1-bit full-adders are connected in cascade to form a -bit parallel adder
Arithmetic Operations by ALU
Arithmetic Operations by ALU
What are we doing?
Keeping A fixed and changing B to generate different operations
Changes in B
Keeping B as it is
Inverting all bits of B
Changing each bit of B to 0
Changing each bit of B to 1
Let’s assume represents modified representation of and thus represents
So, following 4 combinations can be obtained
Keeping B as it is ( )
Inverting all bits of B ( )
Changing each bit of B to 0 ( )
Changing each bit of B to 1 ( )
What are we doing?
So Following 4 combinations can be obtained
Keeping B as it is ( )
Inverting all bits of B ( )
Changing each bit of B to 0 ( )
Changing each bit of B to 1 ( )
+
Function Table
Here it is clearly visible that, Y has no dependency on Cin
Modified
Function Table: Designer’s perspective
Modified
Function Table
Modified
GIVEN
GIVEN
Logic Diagram of an
independent
Arithmetic Circuit
Selection
Variables
…
Combinati 𝑛 − 𝑏𝑖𝑡
onal Parallel
Circuit adder
Design Example
Design an adder/subtractor circuit with one selection variable s and two
inputs A and B. When s=0, the circuit performs A+B. When s=1, the circuit
performs A-B by taking the 2’s complement of B.
Functions Selection
Variables
…
Combinati 𝑛 − 𝑏𝑖𝑡
onal Parallel
Circuit adder
s 𝒀𝒊 s 𝑪𝒊𝒏
0 𝐵 0 0
1 𝐵 1 1
Design Example
Designing a Logic Circuit
We shall implement three basic logical operations (AND, OR and NOT)
and an XOR operation
Designing a Logic Circuit
Let’s combine it with arithmetic operations
More Efficient Design
Use already available arithmetic circuit and incorporate logical operations
Procedure
Design the arithmetic section independently
Take the circuit, consider and determine which logic operations are
automatically generated from the arithmetic circuit
Modify the circuit to incorporate required but not automatically generated logic
operations
More Efficient Design
Use already available arithmetic circuit and incorporate logical operations
More Efficient Design
Use already available arithmetic circuit and incorporate logical operations
Incorporating remaining functions
Unresolved cases
𝑠 𝑠 𝑠 𝑋 𝑌 Automatically Obtained Required 𝐹
𝐹
1 0 0 𝐴 0 𝐹 =𝐴 𝐹 =𝐴 +𝐵
1 1 0 𝐴 𝐵 𝐹 =𝐴 ⨀𝐵 𝐹 =𝐴𝐵
Incorporating remaining functions
(A + K)
Final Boolean Functions
Combining the arithmetic and logical cases, we get the final form of the
Boolean function as:
No Matter what Cin is, always zero must be passed, otherwise the final value will be wrong. (due to the
hardware of full adder)
Let’s See Another Example
Derive the input equations (Xi, Yi and Zi) for the parallel adders to be used
in the ALU which satisfies the following functional design specification.
s2 s1 cin Required Functions
0 0 0 F = AB + C
0 0 1 F = AB + C + 1
0 1 0 F = AB
0 1 1 F = AB + 1
1 0 x F = (AB)’
1 1 x F = AB
Solution
s2 s1 cin X Y Z Required
Functions
0 0 0 AB C 0 F= AB + C
0 0 1 AB C 1 F = AB + C +1
0 1 0 AB 0 0 F = AB
0 1 1 AB 0 1 F = AB + 1
1 0 x AB 1 x F = (AB)’
1 1 x AB 0 x F = AB
Solution
X = AB
Y = s1’ C
Z = s2’ cin
Then for logical operations,
X = AB
Y = s1’ C + s2 s1’
Z = s2’ cin
Status Register
Four bits represents four status bits
C: Contains the output carry of the operation
S: Contains the sign of the result of the operation
Z: Indicates whether the -bit of the result is 0 or not
V: Indicates any overflow has occurred due to the operation
Status bits help to determine relationships among inputs
Example:
Compare the value of A with the value of B
Determine the value of bit of an input
Status Register
Comparing two unsigned numbers
Compare the value of A with the value of B
Check the status bits (mainly C and Z) after the performing the following operation
= A + B’ + 1
Comparing two signed numbers
Compare the value of A with the value of B
Check the status bits (mainly Z, V and S) after the performing the following operation
Effect of Output Carry
Subtraction er through te transfer korle output carry 1 howyar chances thake/
Overflow Flag
References
Digital Logic and Computer Design by M. Morris Mano
Chapter 9 (9.1-9.7)
Thank You
