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Computer Design & Architecture Assignment

The document outlines a group assignment for a Higher Diploma in Information Technology at the National Institute of Technology, focusing on computer design and architecture. It includes tasks related to designing digital systems such as a digital clock, smart irrigation system, car counter, and warehouse conveyor system, with specific questions about flip-flops, multiplexers, and logic diagrams. The assignment is to be submitted by February 3, 2025, and lists the names and registration numbers of the group members.

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0% found this document useful (0 votes)
44 views8 pages

Computer Design & Architecture Assignment

The document outlines a group assignment for a Higher Diploma in Information Technology at the National Institute of Technology, focusing on computer design and architecture. It includes tasks related to designing digital systems such as a digital clock, smart irrigation system, car counter, and warehouse conveyor system, with specific questions about flip-flops, multiplexers, and logic diagrams. The assignment is to be submitted by February 3, 2025, and lists the names and registration numbers of the group members.

Uploaded by

ibrahimmaulid551
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NATIONAL INSTITUTE OF TECHNOLOGY

FACULTY OF INFORMATIVE AND TECHNICAL EDUCATION(FoITE)

DEPARTMENT OF COMPUTING AND COMMUNICATION TECHNOLOGY(CCT)

PROGRAM NAME : HIGHER DIPLOMA IN INFORMATION TECHNOLOGY

MODULE NAME: COMPUTER DESIGN AND ARCHTECTURE

MUDULE CODE : ITU 07101

LECRTURE’S NAME : MIKE KAKWAYA

TASK : GROUP ASSIGNMENT

ACADEMIC YEAR : 2024/2025

STREAM : A

SUBMISSION DATE : 3rd FEB2025

NO NAMES REGISTRATION NO

1. DENIS JUMAPILI LUKIKO NIT/BIT/2024/2455

2. NASSORO AMOUR SHEKULAMBA NIT/BIT/2024/2575

3. ABDUL FIDO ABDALLAH NIT/BIT/2024/2699

4. KIJA WILSON BUCHENJA NIT/BIT/2024/2507

5. JOHN MESHACK MALOGO NIT/BIT/2024/2570

6. MOHAMED SHAIBU HUSEINI NIT/BIT/2024/2653

7. IBRAHIM MASANJA MASALU NIT/BIT/2024/2656

8. DOMA EMMANUEL FAUSTINE NIT/BIT/2024/2564

9. ASHRAF ALLY IBRAHIM NIT/BIT/2024/2586

10. ZACHARIA MARTIN MAGOMA NIT/BIT/2024/2656

Group Assignment
Answer the following questions.

[@ 2 marks]

Question 1:

A company is designing a digital clock system that displays the time in hours and minutes on

a 7-segment display. The clock needs a counter to count the seconds accurately, reset after 60

seconds, and provide input to a circuit that increments the minute counter.

Tasks:

a) Which type of flip-flop would you use to design the counter? Justify your choice.

b) How many flip-flops would you need to design a modulo-60 counter (to count from 0

to 59)? Explain your reasoning.

c) Draw a logic diagram for the modulo-60 counter, labeling all inputs, outputs, and

connections clearly.

d) Construct the state table for your modulo-60 counter, showing all possible states and

transitions.

Question 2:

A company is designing a smart irrigation system to control water distribution for different

zones of a large agricultural field. The system uses soil moisture sensors installed in multiple

zones, and the data from these sensors will determine which zone receives water at any given

time. The irrigation system requires the following:

1. A single water valve controlled by a digital circuit.

2. The system should select one of four zones (Z0, Z1, Z2, Z3) based on the priority signal

coming from the moisture sensors (S0, S1, S2, S3).

3. Each zone has a binary input signal (1 if irrigation is needed, 0 otherwise).


Answer the following questions:

a) Which type of multiplexer (e.g., 2:1, 4:1, 8:1) would you use for this system? Justify

your choice.

b) What would the select lines represent in your design? Explain.

c) Draw the logic diagram for your multiplexer-based control system

d) Write the logic expression for the multiplexer output (water valve control).

Question 3:

You are tasked with designing a sequential circuit to count the number of cars entering a garage.

The garage has a maximum capacity of sixteen cars.

a) Which type of flip-flop would you choose for the design? Justify your choice

b) How many flip-flops would you need? Explain your reasoning with an appropriate

diagram

c) Design the circuit using a logic diagram.

d) Construct the state table for your circuit.

e) Based on the state table, determine the maximum number of cars that can be counted

Question 4:

You are tasked with designing a sequential circuit that controls the flow of data in a warehouse

conveyor system. The circuit should monitor the number of items passing through and control

the system to stop when a preset limit is reached.

a)

Which type of flip-flop would you select for the design? Justify your choice.

b)

b) How would you configure the circuit to reset when it reaches the preset limit?

Explain.
c)

Draw a logic diagram for your design.

d)

Construct the state table for your circuit.

e)

How would you ensure that the circuit operates synchronously?

ANSWER

Question 1: Digital Clock System


(a) Type of Flip-Flop for the Counter

A JK Flip-Flop is ideal for designing the counter because:

• It toggles easily when J = K = 1.


• It is commonly used in synchronous counters.
• It allows for easy reset implementation.

Alternatively, D Flip-Flops can also be used in synchronous counters with combinational logic
to determine the next state.

(b) Number of Flip-Flops for Modulo-60 Counter

A Modulo-60 counter must count from 0 to 59 in binary.

• The number of flip-flops needed is determined by .


• (insufficient), but (covers 0-59).
• So, we need 6 Flip-Flops.

(c) Logic Diagram for Modulo-60 Counter


• 6 Flip-Flops (Q5, Q4, Q3, Q2, Q1, Q0) to store the count.
• AND gates to detect count 60 (111100 in binary) and reset the counter.
• A clock pulse (CLK) to increment the counter every second.

(d) State Table

Present State (Q5-Q0) Next State (Q5-Q0)


000000 (0) 000001 (1)
000001 (1) 000010 (2)
... ...
111011 (59) 000000 (0)

When the counter reaches 60 (111100), it resets to 0.

Question 2: Smart Irrigation System


(a) Type of Multiplexer

A 4:1 Multiplexer (MUX) is chosen because:

• There are 4 zones (Z0, Z1, Z2, Z3).


• The multiplexer selects one of these zones based on priority.
• A 4:1 MUX has 2 select lines (S1, S0).

(b) Select Lines

S1 S0 Selected Zone
0 0 Z0
0 1 Z1
1 0 Z2
1 1 Z3

(c) Logic Diagram for MUX-based Control System

• Inputs: Z0, Z1, Z2, Z3.


• Select Lines: S1, S0.
• Output: Controls the water valve.

(d) Logic Expression

Where:

• = Water valve control output.


• = Zone inputs.
• = Select signals.

Question 3: Car Counter for a Garage


(a) Type of Flip-Flop

A D Flip-Flop is ideal because:

• It simplifies the counter design.


• Works well in binary up-counters.
• Requires minimal logic for the next state.

(b) Number of Flip-Flops

Since the garage holds 16 cars, we need to count from 0 to 15.

• The number of flip-flops required is log₂(16) = 4 (since 2⁴ = 16).

(c) Logic Diagram

A 4-bit counter consists of:

• 4 D Flip-Flops.
• Increment logic.
• Reset mechanism when the count reaches 16.

(d) State Table

Present State (Q3-Q0) Next State (Q3-Q0)


0000 (0) 0001 (1)
0001 (1) 0010 (2)
... ...
1111 (15) 0000 (0) (Reset)

(e) Maximum Cars Counted

The maximum count is 15 cars before the counter resets.

Question 4: Warehouse Conveyor System


(a) Type of Flip-Flop

A T Flip-Flop or D Flip-Flop can be used because:

• T Flip-Flop toggles state on each item passing.


• D Flip-Flop allows easy implementation of synchronous counting.

(b) Reset Mechanism

• A comparator circuit detects when the count reaches the preset limit.
• The reset signal is triggered when the limit is reached.

(c) Logic Diagram

The system consists of:

• Flip-Flops to count items.


• Logic gates to compare the count with the preset limit.
• Control signal to stop the conveyor.

(d) State Table

Present State (Qn-Q0) Next State (Qn-Q0)


0000 (0) 0001 (1)
0001 (1) 0010 (2)
... ...
Limit Reached Reset to 0

(e) Ensuring Synchronous Operation

• All flip-flops share a common clock signal.


• Synchronous reset ensures proper operation.

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