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8051 Microcontroller Basic Notes NK Sinha

The 8051 microcontroller is an 8-bit device that integrates various components such as timers, ADC/DAC, I/O ports, and memory on a single chip, requiring only a power supply and clock signal to operate. It is primarily used in embedded systems for specific tasks, with a program memory of 4 KB ROM and 128 bytes of RAM. The architecture includes features like an accumulator, ALU, program counter, and multiple registers for efficient data handling and control operations.

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0% found this document useful (0 votes)
34 views31 pages

8051 Microcontroller Basic Notes NK Sinha

The 8051 microcontroller is an 8-bit device that integrates various components such as timers, ADC/DAC, I/O ports, and memory on a single chip, requiring only a power supply and clock signal to operate. It is primarily used in embedded systems for specific tasks, with a program memory of 4 KB ROM and 128 bytes of RAM. The architecture includes features like an accumulator, ALU, program counter, and multiple registers for efficient data handling and control operations.

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ytpremium8904
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8051 Microcontroller

Architecture
Subject: MICROPROCESSORS AND MICROCONTROLLERS Code: 3160914

N. V. SINHA, LDCE
https://sites.google.com/

N. V. SINHA, LDCE 2
• A device which integrates a number of components on a single chip
like
• Microprocessor
• Timers
• ADC/DAC
• I/O ports
• Memory etc
• Only needs power supply and clock signal to work

N. V. SINHA, LDCE 3
• An embedded product uses a microcontroller to do one task only
• In an embedded system, there is only one application software that is
typically burned into ROM.
• Examples: Washing machines, ACs, Video game player

N. V. SINHA, LDCE 4
• 8 – bit microcontroller.
• 16 bit - address lines and 8 – bit data lines.
• On chip Program memory
• ROM 4 KB
• On chip Data memory
• RAM 128 byte
• 32 bidirectional I/O lines arranged as four 8-bit port
• ( Port 0 – Port 3)
• 2 - Sixteen bit Timer/Counter ( Timer 0 and Timer 1)
• Four register Banks ( Bank 0- Bank 3)
• Direct bit and byte addressability
N. V. SINHA, LDCE 5
https://www.zseries.in

N. V. SINHA, LDCE 6
• Accumulator (A register):
• 8 – bit register used for arithmetic and logical operation to accumulate the
result.
• Several function like rotate, swap etc apply on the accumulator

• B register:
• Used with A register for multiplication and division for other instruction
• Treated as scratch pad for ACC

N. V. SINHA, LDCE 7
• ALU:
• Performs arithmetic and logical operation on 8-bit data eg. add, sub, mul, div or
AND or OR ,compliment, etc.

• Program counter (PC):


• 16 –bit register used to hold the address of an instruction (program) stored in
the memory.

• Program status word (PSW):


• Many instruction affect the status flags in order to address these flags
conveniently they can be grouped to from PSW

N. V. SINHA, LDCE 8
D7 D6 D5 D4 D3 D2 D1 D0
CY AC F0 RS1 RS0 OV -- P

D7 CY Carry: used in arithmetic, jump, rotate and boolean instructions


D6 AC Auxilary Carry: used in BCD arithmetic
D5 F0 User flag 0
RS1 RS0 Address
D4 RS1 0 0 Select register bank 0 00 – 07H
0 1 Select register bank 1 08 – 0FH
D3 RS0 1 0 Select register bank 2 10 – 17H
1 1 Select register bank 3 18 – 1FH
D2 OV Overflow: used in arithmetic instructions
D1 -- Reserved for future use
D0 P Parity: shows parity of register A (Accumulator) - 1 = Odd parity; 0 = Even parity

Bit addressable as PSW.0 to PSW.7

N. V. SINHA, LDCE 9
https://www.shcollege.ac.in
N. V. SINHA, LDCE 10
• 128 bytes of RAM are assigned address 00 to 7Fh

• Divided into three groups as follows:


1) A total of 32 bytes from locations 00 to 1F hex are set aside for register banks
and the stack

2) A total of 16 bytes from locations 20h to 2Fh are aside for bit addressable
read/write memory

3) A total 80 bytes from location 30h to 7Fh are used for read and write storage
normally called ‘scratch pad’ RAM
N. V. SINHA, LDCE 11
https://www.shcollege.ac.in
N. V. SINHA, LDCE 12
• DPTR: 16 bit register used to hold the address of data in the memory
• Can be accessed separately as lower 8 bit (DPL) and higher 8 bit (DPH)
• DPTR does not have a single internal address, instead DPH and DPL are each
assigned a separate address

• STACK: Reserved area of the memory in the RAM where temporary


information may be stored
• 8 – bit SP (Stack Pointer) holds the address of most recent stack entry -
generally called top of the stack
• Works on LIFO or FILO principle
• Default location of stack pointer is 07h
• We can change the default location by MOV SP, #XXh

N. V. SINHA, LDCE 13
Reg Hex Addr Function
A 0E0 Accumulator
B 0F0 Arithmetic
DPH 83 Addressing external memory
DPL 82 Addressing external memory
IE 0A8 Interrupt Enable Control
IP 0B8 Interrupt Priority
P0 80 Input / Output Port Latch
P1 90 Input / Output Port Latch
P2 A0 Input / Output Port Latch
P3 0B0 Input / Output Port Latch

N. V. SINHA, LDCE 14
Reg Hex Addr Function
PCON 87 Power Control
PSW 0D0 Program Status Word
SCON 98 Serial Port Control
SBUF 99 Serial Port Data Buffer
SP 27 Stack Pointer
TMOD 29 Timer / Counter Control Mode
TCON 88 Timer / Counter Control
TL0 8A Timer 0 Low Byte
TH0 8C Timer 0 High Byte
TL1 8B Timer 1 Low Byte
TH1 8D Timer 1 High Byte

N. V. SINHA, LDCE 15
8051 Clock
• Ceramic resonators - a low-cost alternative to crystal
resonators
• Due to decrease in frequency stability and accuracy, not
preferred for high-speed serial data communication with
other system
• Machine Cycle - The smallest interval of time to
accomplish any simple instruction, or part of a complex
instruction,
• made up of six states
• State - basic time interval for discrete operations of the
microcontroller such as fetching, decoding, executing,
or writing a data byte.
https://www.microcontrollergarden.blogspot.com
• Oscillator pulses define each state
N. V. SINHA, LDCE 16
8051 Clock
• Instruction may require one, two or four machine cycle to be
executed
• Instruction are fetch and executed, by the microcontroller
automatically, beginning with the instruction located at ROM
memory address 0000h at the time the microcontroller is first
reset
C  12d
Tinst 
CrystalFrequency

https://www.microcontrollergarden.blogspot.com

N. V. SINHA, LDCE 17
D7 D6 D5 D4 D3 D2 D1 D0
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0

D7 TF1 Timer 1 overflow flag


D6 TR1 Timer 1 run control bit
D5 TF0 Timer 0 overflow flag
D4 TR0 Timer 0 run control bit
D3 IE1 External interrupt 1 edge flag
D2 IT1 External interrupt 1 signal type control bit
D1 IE0 External interrupt 0 edge flag
D0 IT0 External interrupt 0 signal type control bit

Bit addressable as TCON.0 to TCON.7

N. V. SINHA, LDCE 18
D7 D6 D5 D4 D3 D2 D1 D0
Gate C / T' M1 M0 Gate C / T' M1 M0
Timer 1 Timer 0

OR gate enable bit - set to 1 by program to enable timer to run if TR1/0 in TCON is set and signal on
D7 / D3 Gate
ext INT1/0' is high, cleared to 0 to enable timer to run if TR1/0 in TCON is set
Set to 1 by program to make timer 1/0 act as a counter by counting pulses from external input pins
D6 / D2 C / T'
3.5(T1) or 3.4(T0). Cleared to 0 by program to make timer act as timer by counting internal frequency
D5 / D1 M1
Mode select bits
D4 / D0 M0

M1 M0 Mode
0 0 0
0 1 1
1 0 2
1 1 3

Bit addressable as TMOD.0 to TMOD.7


N. V. SINHA, LDCE 19
D7 D6 D5 D4 D3 D2 D1 D0
SM0 SM1 SM2 REN TB8 RB8 TI RI

D7 SM0 Serial port mode bit 0 - set / cleared by program to select mode
Serial port mode bit 0 - set / cleared by program to select mode
SM0 SM1 Mode Remarks
0 0 0 Shift register: baud f/12
D6 SM1
0 1 1 8-bit UART: baud variable
1 0 2 9-bit UART: baud f/32 or f/64
1 1 3 9-bit UART: baud variable
D5 SM2 Set / cleared by program to enable multiprocessor communication in modes 2 and 3
D4 REN Receive enable bit - set to 1 enable reception; 0 to disable
D3 TB8 Transmitted bit 8. Set / cleared by program in modes 2 and 3
D2 RB8 Received bit 8 in modes 2 and 3; stop bit in mode 1; not used in mode 0
D1 TI Transmit interrupt flag
D0 RI Receive interrupt flag

Bit addressable as SCON.0 to SCON.7


N. V. SINHA, LDCE 20
D7 D6 D5 D4 D3 D2 D1 D0
SMOD ---- ---- ---- GF1 GF0 PD IDL

Serial baud rate modify bit - set to 1 by program to double baud rateusing timer 1 for modes 1,2,3
D7 SMOD
Cleared to 0 to use timer 1 baud rate
D6 -
D5 - Not implemented
D4 -
D3 GF1 General purpose user flag bit 1 - set / cleared by program
D2 GF0 General purpose user flag bit 0 - set / cleared by program
D1 PD Power down bit - set to 1 by program to enter power down configuration for CHMOS processors
D0 IDL Idle mode bit - set to 1 by program to enter idle mode configuration for CHMOS processors

PCON is not addressable

N. V. SINHA, LDCE 21
• Interrupts are the events that temporarily suspend the main program, pass
the control to the external sources and execute their task. It then passes the
control to the main program where it had left off.

• Each interrupt can be enabled or disabled by setting bits of the IE register


and the whole interrupt system can be disabled by clearing the EA bit of the
same register.

• IE (Interrupt Enable) Register


• This register is responsible for enabling and disabling the interrupt. EA
register is set to one for enabling interrupts and set to 0 for disabling the
interrupts. Its bit sequence and their meanings are shown below:

N. V. SINHA, LDCE 22
D7 D6 D5 D4 D3 D2 D1 D0
EA --- ET2 ES ET1 EX1 ET0 EX0

D7 EA Enable interrupt - set to 1 by program to permit individual intr by resp bits ; 0 to disable all intr
D6 --- Not implemented
D5 ET2 For future use
D4 ES Enable serial port interrupt - set to 1 by program to permit serial port interrupt; 0 to disable
D3 ET1 Enable timer 1 overflow interrupt - set to 1 by program to permit timer 1 overflow interrupt; 0 to disable
D2 EX1 Enable external interrupt 1 - set to 1 by program to permit INT1'; 0 to disable
D1 ET0 Enable timer 0 overflow interrupt - set to 1 by program to permit timer 1 overflow interrupt; 0 to disable
D0 EX0 Enable external interrupt 0 - set to 1 by program to permit INT1'; 0 to disable

Bit addressable as IE.0 to IE.7

N. V. SINHA, LDCE 23
D7 D6 D5 D4 D3 D2 D1 D0
--- --- PT2 PS PT1 PX1 PT0 PX0

D7 ---
Not implemented
D6 ---
D5 PT2 For future use
D4 PS Priority of serial port intr - set / cleared by program
D3 PT1 Priority of timer 1 overflow intr - set / cleared by program
D2 PX1 Priority of external intr 1 - set / cleared by program
D1 PT0 Priority of timer 0 overflow intr - set / cleared by program
D0 PX0 Priority of external intr 0 - set / cleared by program

Priority may be 1 (highest) or 0 (lowest)


Bit addressable as PSW.0 to PSW.7

N. V. SINHA, LDCE 24
Pin Diagram of 8051

https://www.electronicshub.org

N. V. SINHA, LDCE 25
• Pins 1 to 8 − These pins are known as Port 1. This port doesn’t serve any other
functions. It is internally pulled up, bi-directional I/O port.

• Pin 9 − It is a RESET pin, which is used to reset the microcontroller to its initial
values.

• Pins 10 to 17 − These pins are known as Port 3. This port serves some
functions like interrupts, timer input, control signals, serial communication
signals RxD and TxD, etc.

• Pins 18 & 19 − These pins are used for interfacing an external crystal to get the
system clock.

• Pin 20 − This pin provides the power supply to the circuit.


N. V. SINHA, LDCE 26
• Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port. Higher order address
bus signals are also multiplexed using this port.

• Pin 29 − This is PSEN pin which stands for Program Store Enable. It is used to read a signal
from the external program memory.

• Pin 30 − This is EA pin which stands for External Access input. It is used to enable/disable the
external memory interfacing.

• Pin 31 − This is ALE pin which stands for Address Latch Enable. It is used to demultiplex the
address-data signal of port.

• Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port. Lower order address
and data bus signals are multiplexed using this port.

• Pin 40 − This pin is used to provide power supply to the circuit.


N. V. SINHA, LDCE 27
• 8051 microcontrollers have 4 I/O ports each of 8-bit, which can be
configured as input or output. Hence, total 32 input/output pins allow the
microcontroller to be connected with the peripheral devices.

• Pin configuration, i.e. the pin can be configured as 1 for input and 0 for
output as per the logic state.

• Input / Output (I/O) pin − All the circuits within the microcontroller must be
connected to one of its pins except P0 port because it does not have pull-up
resistors built-in.

• Input pin − Logic 1 is applied to a bit of the P register. The output FE


transistor is turned off and the other pin remains connected to the power
supply voltage over a pull-up resistor of high resistance.
N. V. SINHA, LDCE 28
The P0 (zero) port is characterized by two functions −
• When the external memory is used then the lower address byte (addresses A0 -
A7) is applied on it, else all bits of this port are configured as input/output.
• When P0 port is configured as an output then other ports consisting of pins with
built-in pull-up resistor connected by its end to 5V power supply, the pins of this
port have this resistor left out.
• Input Configuration:
• If any pin of this port is configured as an input, then it acts as if it “floats”, i.e. the input has
unlimited input resistance and in-determined potential.
• Output Configuration:
• When the pin is configured as an output, then it acts as an “open drain”. By applying logic 0 to
a port bit, the appropriate pin will be connected to ground (0V), and applying logic 1, the
external output will keep on “floating”.
• In order to apply logic 1 (5V) on this output pin, it is necessary to build an external
pullup resistor.

N. V. SINHA, LDCE 29
• Port 1
• P1 is a true I/O port as it doesn’t have any alternative functions as in P0, but this port
can be configured as general I/O only. It has a built-in pull-up resistor and is
completely compatible with TTL circuits.

• Port 2
• P2 is similar to P0 when the external memory is used. Pins of this port occupy
addresses intended for the external memory chip. This port can be used for higher
address byte with addresses A8 - A15. When no memory is added then this port can be
used as a general input/output port similar to Port 1.

• Port 3
• In this port, functions are similar to other ports except that the logic 1 must be applied
to appropriate bit of the P3 register.

N. V. SINHA, LDCE 30
• Pins Current Limitations
• When pins are configured as an output (i.e. logic 0), then the single
port pins can receive a current of 10mA.
• When these pins are configured as inputs (i.e. logic 1), then built-in
pull-up resistors provide very weak current, but can activate up to 4
TTL inputs of LS series.
• If all 8 bits of a port are active, then the total current must be limited to
15mA (port P0: 26mA).
• If all ports (32 bits) are active, then the total maximum current must be
limited to 71mA.

N. V. SINHA, LDCE 31

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