Computer Organization & Architecture (3140707)

S2021, S2022, S2023, W2021, W2022, W2023

4 Marks
1) Show different ways to represent fixed-point positive integers including zero.
2) Write Steps for two n digit numbers subtraction in base r.
3) Explain how (r-1)’s complement is calculated. Calculate 9’s complement of 546700.

7 Marks
Chapter – 2 Register Transfer and Micro-operations
3 Marks
1) Write the difference(s) between arithmetic shift left and logical shift left instruction. Support
your answer with proper illustration. (Answer from Darshan)
2) What is arithmetic micro operation?
3) Draw the block diagram of 4-bit combinational circuit shifter.
4) How many AND gates and Adders will be required to multiply a 5 bit number with a 3 bit
number? Also say size of adder (bits). How many bits will be there in the result?
5) Explain three state buffers.

4 Marks
1) Discuss 4-bit binary adder with neat diagram.
2) Discuss three state bus buffers with neat diagram.
3) Construct diagram of common bus system of four 4-bits registers with diagram.
4) What is the need of common bus? Draw common bus cycle.
5) Construct a 4-bit adder-subtractor circuit.

7 Marks
1) Apply J K flip-flops to design a 3-bit synchronous binary counter.
2) Apply the combinational circuits to design a 4-bit adder/subtracter circuit which performs
subtraction using 2’s complement.
3) Draw and explain working of 4 bit binary adder.
4) State and Explain any seven logic micro operation
5) Explain register transfer using block diagram and timing diagram.
Chapter – 3 Basic Computer Organization and Design
3 Marks
1) Write the name of basic computer registers with their functionalities.
2) Write sequence of microoperations to execute the following instructions:
- AND – STA
3) Draw the block diagram of a hypothetical basic computer.
4) Calculate and show the number of clock cycles required to execute BSA instruction
5) Show the working of LDA instruction using RTL.
6) List out Register for basic computer.
7) Draw and explain control unit diagram for basic computer.
8) What is difference between direct and indirect addressing mode?
9) List out names of eight main registers of basic computer with their symbolic name and
purpose.
10) Use BSA and BUN instruction with example and diagram.
11) Interpret the following instructions: INP, ISZ and LDA
12) Write down RTL statements for the fetch and decode operation of basic computer

4 Marks
1) Explain any four Arithmetic operations carried out by ALU.
2) Justify the use of STA instruction in assembly program with an example.
3) Explain register reference instruction format.
4) State various phases of instruction cycle.
5) Define RTL. Give block diagram and timing diagram of transfer of R1 to R2 when P=1.
6) Describe BUN and BSA memory reference instructions in detail.

7 Marks
1) A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code
is stored in one word of memory. The instruction has four parts: an indirect bit, an operation
code, a register code part to specify one of 64 registers, and an address part.
1. How many bits are there in operation code, the register code part and the
address part?
2. Draw the instruction word format and indicate the number of bits in each part.
3. How many bits are there in the data and address inputs of the memory?
2) List and explain Memory reference instructions in detail.
3) Explain any four input output reference instruction.
4) What is the role of sequence counter(SC) in control unit? Interpret its concept with the help
of its three inputs using diagram.
5) Which are the different phases of Instruction Cycle? Describe Register transfer for fetch
phase with its diagram.
6) Define: microinstruction; Identify different types of 16 bits instruction formats for basic
computer using figure.
7) Describe how control unit determine instruction type after the decoding using flowchart for
instruction cycle.
8) Write a program to evaluate the arithmetic statement: A*B+C*D+E i. Using an accumulator
type computer. ii. Using a stack organized computer.
9) What is interrupt? Describe interrupt cycle with neat diagram.
Chapter – 4 Assembly Language Programming
3 Marks
1) Draw flowchart of first pass assembler.
2) Differentiate assembly language and machine language.

4 Marks
1) Write assembly language program to subtract two numbers.
2) Draw the flowchart for first pass of assembler and explain the same in brief.
3) Apply BUN instruction in assembly program that needs to use a looped subroutine to check
a flag.
4) Write assembly program for the arithmetic shift-left operation on a number stored in register
B. Stop the program in case of overflow.
5) Write a program in assembly language to multiply two numbers in registers B and C in case
the processor has only ADD instruction.
6) Write assembly language program to add two numbers.
7) Write assembly language program to multiply two numbers
8) Write assembly language program to subtract one number from other number.
9) Write an Assembly level program for addition of 50 numbers.
10) Write an Assembly level program to move one block of data to another location.
11) Draw and explain flowchart for first pass of assembler.
12) Write assembly level program to subtract two given numbers.
13) Draw the flowchart of first pass of the assembler and explain working of the same

7 Marks
1) What is the fundamental difference between a subroutine call and an interrupt request?
Analyze the possibility of common memory stack for both.
2) A subroutine return address can be stored in an index register instead of a stack. Analyze the
advantages and disadvantages of both configurations.
3) Draw the flowchart of first pass of the assembler and explain working of the same.
4) Write an assembly language program to find whether the given number is prime or not.
5) Write an assembly language program to find factorial of the given number.
Chapter – 5 Microprogrammed Control Organisation
3 Marks
1) Which address sequencing capabilities are required in a control memory?
2) Discuss the importance of “control word” in a processor
3) Analyze the 20-bits microinstruction code format with 7 bit used for address.
4) What is address sequencing?
5) Sketch Microinstruction code format. Quote BR and CD field in brief. 0
6) State differences between hardwired control unit and microprogrammed control unit.
7) Define followings: 1. Control Memory 2. Control Word 3. Control Address Register
8) What is address sequencing? Explain.

4 Marks
7 Marks
1) Discuss microprogrammed control organization with neat diagram.
2) Explain using a flowchart how address of control memory is selected in microprogrammed
control unit.
3) Write the symbolic microprogram routine for the BSA instruction. Use the microinstruction
format of basic microprogrammed control unit.
Chapter – 6 Central Processing Unit
3 Marks
1) Explain register stack.
2) Summarize following addressing modes with example.
1) Implied mode 2) Register mode
3) List down six major characteristics of RISC processors.
4) Enlist the characteristics of RISC.

4 Marks
1) Explain status bit conditions with neat diagram.
2) State the differences between RISC and CISC.
3) What is difference between two address and three address instructions?
4) Criticize Three-Address Instructions and Zero address instruction with common example
5) Differentiate RISC and CISC architecture.
6) Explain register stack and memory stack.
7) Write a program to evaluate X = (a*b)/c+d in two address and three address instruction
formats.

7 Marks
1) Enlist various kinds of addressing modes. Explain any five of same and support your answer
by taking small example
2) Write two address, one address and zero address instructions program for the following
arithmetic expression: X = (A + B) * (C – D / E) + F * G
3) What addressing mode means? Explain any three addressing modes in detail with example.
Chapter – 7 Pipeline and Vector Processing
3 Marks
1) Explain Flynn’s classification for computers in brief.
2) Explain pipeline conflicts in brief
3) Summarize major hazards in pipelined execution.
4) List and explain major instruction pipeline conflicts

4 Marks
1) Write a note on SIMD array processor.
2) In certain scientific computations it is necessary to perform the arithmetic 04 2 operation (Ai
+ Bi) * (Ci + Di) with a stream of numbers. Specify pipeline configuration to carry out this
task. List the contents of all registers in the pipeline for i=1 through 4.
3) Explain arithmetic pipeline.
4) What is a data dependency conflict in instruction pipeline? Recommend solutions for data
dependency conflicts.
5) Define pipelining. For arithmetic operation (Ai *Bi + Ci) with a stream of seven numbers (i=1
to 7). Specify a pipeline configuration to carry out this task.
6) Describe pipeline conflicts.

7 Marks
1) Demonstrate four-segment instruction pipeline in detail
2) Elaborate flynn’s classification scheme with proper diagram.
3) A non-pipeline system takes to process a task. The same task can be processed in a six
segment pipeline with a clock cycle of 10ns. Determine the speedup ratio of the pipeline for
100 tasks. What is the maximum speed up that can be achieved?
4) What is the significance of pipelining in computer architecture? Write a note on instruction
pipeline.
Chapter – 8 Computer Arithmetic
3 Marks
1) Explain the non-restoring methods for dividing two numbers

4 Marks
7 Marks
1) Assume A = + 6 and B = + 7, apply Booth algorithm for multiplying A and B. Make necessary
assumptions if required.
2) Explain using flowchart the working of Booth’s multiplication algorithm of signed-2’s
complement numbers.
3) Explain booth’s multiplication algorithm with example.
4) Show the contents of registers E, AC, BR, QR and SC during the process of multiplying 11111
with 10101.
5) Draw neat and clean flowchart for divide operation. Explain with example
6) Assume a computer system uses 5 bit (1 sign + 4 Magnitude) registers and 2’s complement
representation. Perform multiplication of number 10 with the smallest number in this
system using booth algorithm. Show step-by-step multiplication process.
Chapter – 9 Input – Output Organization
3 Marks
1) Explain DMA in brief.
2) Prepare flowchart of CPU-IOP communication.
3) Briefly explain DMA.
4) Differentiate isolated I/O and memory mapped I/O.

4 Marks
1) Discuss source-initiated transfer using handshaking in asynchronous data transfer

7 Marks
1) Elaborate CPU-IOP communication.
2) Write a note on asynchronous data transfer.
3) List out modes of transfer. Formulate direct memory access technique in detail.
4) Elaborate CPU-IOP communication.
5) Which are the different ways to transfer data to and from peripheral devices? Explain any
one of them in detail.
Chapter – 10 Memory Organization
3 Marks
1) Write a brief note on memory hierarchy.
2) A RAM operates with 8-bit data bus, 2 chip select lines and 7-bit address lines. Calculate the
number of such RAM chips required to have 512 bytes of main memory.
3) Calculate the size of a ROM chip which operates using 8-bit data bus, two chip select lines
and 9-bit address bus.
4) Draw and criticize memory hierarchy in a computer system.
5) Explain memory hierarchy in brief.
6) What is the importance of virtual memory?

4 Marks
1) An address space is specified by 24 bits and the corresponding memory space by 16 bits.
How many words are there in the address space and in the memory space?
2) How many 128 x 8 RAM chips are needed to provide a memory capacity of 4096 bytes?
3) What is RAM and ROM?
4) Compare following terms:
1. Write through-cache and Write back cache.
2. Spatial locality and Temporal locality
5) What do you mean by cache memory? Justify the need of cache memory in computer
systems.
6) A 4-way set-associative cache memory unit with a capacity of 16 KB is built using a block
size of 8 words. The word length is 32 bits. The size of the physical address space is 4 GB.
How many bits for the will be required for TAG field?

7 Marks
1) Write a detailed note on associative memory.
2) Explain any two types of mapping procedures when considering the organization of cache
memory.
3) Discuss various memory hierarchies.
4) Explain the concept of Address Translation and working of the Translation Look-Aside Buffer.
5) Write a short note on virtual memory.
6) What is cache memory? Interpret direct addressing mapping with diagram.
7) Elaborate content addressable memory (CAM).
8) ) What is cache memory address mapping? Compare and contrast direct address mapping
and set-associative address mapping.
Chapter – 11 Multiprocessors
3 Marks
1) What is cache coherence? Describe.

4 Marks
1) Explain multiport memory and crossbar switch with reference to interconnection structures
in multiprocessors.

7 Marks
1) Discuss cache coherence problem in detail.
2) Discuss various Dynamic Arbitration Algorithms for Interprocessor Arbitration.
3) Discuss in brief the interconnection structures of a multiprocessor system.
4) Discuss multistage switching network with neat diagrams.
5) Elaborate cache coherence problem with its solutions.