CIRCUITS AND

6.002 ELECTRONICS

The Digital Abstraction

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Review
z Discretize matter by agreeing to
observe the lumped matter discipline

Lumped Circuit Abstraction

zAnalysis tool kit: KVL/KCL, node method,

superposition, Thévenin, Norton
(remember superposition, Thévenin,
Norton apply only for linear circuits)

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Today

Discretize value Digital abstraction

Interestingly, we will see shortly that the

tools learned in the previous three
lectures are sufficient to analyze simple
digital circuits

Reading: Chapter 5 of Agarwal & Lang

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 But first, why digital?
In the past …
Analog signal processing
R1

R2 V0
V1 +
–
+ V1 and V2
V2 – might represent the
outputs of two
sensors, for example.

By superposition,
R2 R1
V0 = V1 + V2
R1 + R2 R1 + R2

If R1 = R 2 ,
V1 + V2
V0 =
2

The above is an “adder” circuit.

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Noise Problem

add noise on
this wire
Receiver:
huh?

… noise hampers our ability to distinguish

between small differences in value —
e.g. between 3.1V and 3.2V.

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Value Discretization
Restrict values to be one of two

HIGH LOW
5V 0V
TRUE FALSE
1 0

…like two digits 0 and 1

Why is this discretization useful?

(Remember, numbers larger than 1 can be

represented using multiple binary digits and
coding, much like using multiple decimal digits to
represent numbers greater than 9. E.g., the
binary number 101 has decimal value 5.)

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Digital System
noise
VN
VS
VR
sender receiver
VN = 0V

VS VR
5V “0” “1” “0” HIGH “0” “1” “0”
5V
2.5V t 2.5V t
0V LOW 0V

With noise
VN = 0.2V VS
VS
“0” “1” “0”
“0” “1” “0” 0.2V
5V t
2.5V t 2.5V t
0V

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6.002 Fall 2000 Lecture 4

 Digital System

Better noise immunity

Lots of “noise margin”

For “1”: noise margin 5V to 2.5V = 2.5V

For “0”: noise margin 0V to 2.5V = 2.5V

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Voltage Thresholds
and Logic Values

5V

1
1
1

sender 2.5V receiver

0 0 0

0V

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6.002 Fall 2000 Lecture 4

 But, but, but …
What about 2.5V?
Hmmm… create “no man’s land”
or forbidden region
For example,
5V

1 1
VH
3V
sender forbidden receiver
region
2V
VL
0 0

0V

“1” V 5V
H

“0” 0V V
L
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6.002 Fall 2000 Lecture 4

 But, but, but …
Where’s the noise margin?
What if the sender sent 1: VH ?
Hold the sender to tougher standards!
5V
V
1 0H
1
V
IH
sender receiver
V
IL
0
0
V
0L
0V

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6.002 Fall 2000 Lecture 4

 But, but, but …
Where’s the noise margin?
What if the sender sent 1: VH ?
Hold the sender to tougher standards!
5V
V
1 0H
1
V
IH
sender Noise margins receiver
V
IL
0
0
V
0L
0V

“1” noise margin: V - V

IH 0H
“0” noise margin: VIL - V
0L
Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 0 1 0 1 sender
5V
V
0H
V
IH
V
IL
V
0L
0V t

0 1 0 1 receiver
5V
V
0H
V
IH
V
IL
V
0L
0V t

Digital systems follow static discipline: if

inputs to the digital system meet valid input
thresholds, then the system guarantees its
outputs will meet valid output thresholds.

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Processing digital signals

Recall, we have only two values —

1,0 Map naturally to logic: T, F

Can also represent numbers

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6.002 Fall 2000 Lecture 4

 Processing digital signals
Boolean Logic
If X is true and Y is true
Then Z is true else Z is false.

Z = X AND Y
X, Y, Z
Z = X • Y are digital signals
Boolean equation “0” , “1”

X AND gate
Y Z

Truth table representation:

X Y Z
0 0 0
0 1 0
1 0 0
1 1 1
Enumerate all input combinations
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6.002 Fall 2000 Lecture 4

 Combinational gate
abstraction
„ Adheres to static discipline
„ Outputs are a function of
inputs alone.

Digital logic designers do not

have to care about what is
inside a gate.

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Demo

Noise

X
Y Z

Z = X • Y
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6.002 Fall 2000 Lecture 4

 Examples for recitation

Z = X • Y
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6.002 Fall 2000 Lecture 4

 In recitation…
Another example of a gate
If (A is true) OR (B is true)
then C is true
else C is false

C = A + B Boolean equation
OR
A
B C
OR gate

More gates
B B X
Y Z
Inverter NAND
Z = X • Y

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4

 Boolean Identities
X • 1 = X
X • 0 = X
X + 1 = 1
X +0 = X
1 = 0
0 = 1
AB + AC = A • (B + C)

Digital Circuits
Implement: output = A + B • C

B
C B•C

A output

Cite as: Anant Agarwal and Jeffrey Lang, course materials for 6.002 Circuits and Electronics, Spring 2007. MIT
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6.002 Fall 2000 Lecture 4