Applied Electronics I Lecture Note 2024-12-20

Learning objectives
 Determine the dc operating point of a
BJT Biasing Circuits linear amplifier
 Analyze the common Biasing techniques
used in BJT:
 Base bias circuit,

Lecture-2  Emitter bias circuit,

 Emitter-feedback bias circuit,

 Collector-feedback bias circuit, and

 Voltage-divider biased circuit

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DC Biasing Linear Operation Provides

output bias
 A transistor must be properly biased in order to operate as an amplifier. Sinusoidal input
signal voltage load line
 DC biasing is used to establish fixed dc values for the transistor currents
and voltages called the dc operating point or quiescent point (Q-point). Provides
input bias
 Linear operation: Large
output has same shape as Biasing
input except that it is Resistors
on input &
inverted DC Q-point output
 The output voltage in this values with
no input
region is ideally a linear sinusoidal
reproduction of the input. voltage
applied
Fig.3.16: Variations in collector current and collector-to-emitter voltage as a result of a
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variation in base current.
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Applied Electronics I Lecture Note 2024-12-20

Waveform Distortion Load line points

• The end points of the load line are: • If we vary IB by varying RB, Q-point
will move up and down.
 ICsat
ICsat
IC = VCC / RC
VCE = 0 V
 VCEcutoff
VCE = VCC
IC = 0 mA

VCEcutoff
(a) Transistor is driven into Saturation because (b) Transistor is driven into Cutoff because Q- (c) Transistor is driven into both
Q-point is too close to saturation for the given point is too close to cutoff for the given input Saturation & Cutoff because input
input signal signal signal is too large • The value of RB sets the value of IB, that sets the values of VCE and IC
Fig.3.17: Graphical load line illustration of a transistor being driven into saturation and/or cutoff

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Load line points – Circuit parameters Example

• When VCC is fixed, RC varies: • When RC is fixed, VCC varies:
Determine the Q-point and find the maximum peak value of the base current for
linear operation. Assume βDC = 200.

Given: Required:
𝛽 = 200 𝐼 =?
𝑉 = 10𝑉 𝑉 =?
𝑉 = 20𝑉 𝐼 =?
𝑅 = 47𝑘 For linear

𝑅 = 330 operation

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Applied Electronics I Lecture Note 2024-12-20

Example Solution

Determine the Q-point and find the maximum peak value of the base current for
linear operation. Assume βDC = 200.
= 60.6mA
Solution:

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The common biasing techniques of BJT: 1. Base Bias

 The analysis of this circuit for the linear region is as
follow:
1. Base bias circuit,
Base-Emitter Loop:
2. Emitter bias circuit,
3. Emitter-feedback bias circuit,
4. Collector-feedback bias circuit, and
5. Voltage-divider biased circuit Fig.3.18: An npn transistor
with base bias

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Applied Electronics I Lecture Note 2024-12-20

1. Base Bias Q-Point Stability of Base Bias

Substituting the above formula for 𝐼 in :  𝐼 is dependent on 𝛽
𝐼 =𝛽 𝐼  𝛽 varies with
temperature
𝑉 − 𝑉
𝐼 =𝛽  Variation in 𝛽 causes 𝐼
𝑅
and 𝑉𝑪𝑬 to change, thus
Using KVL: Collector-Emitter Loop:
changing the Q-point of
the transistor
𝑉𝑪𝑪 − 𝐼 𝑅 − 𝑉𝑪𝑬 = 0 Fig.3.18: An npn transistor
with base bias
 Base bias circuit is
Solving for 𝑉 : extremely 𝛽 -dependent
𝑉𝑪𝑬 = 𝑉𝑪𝑪 − 𝐼 𝑅 and very unstable

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2. Emitter Bias 3. Emitter-Feedback bias

Base-Emitter Loop:
 Provides excellent bias stability in spite of changes in 𝛽 or VCC VCC
VCC  I B RB  VBE  I E RE  0
temperature
I E  I C  I B  (   1) I B
VCC  VBE BE IC

IB  RB RC
loop
RB  (   1) RE IB
VCB

Collector-Emitter Loop: VCE

VCE  VCC  I C RC  RE  and I E  I C VBE

CE
VE  I E RE IE loop
VB  VCC  I B RB
RE

VC  VCE  VE
VB  VE  VBE
Very small value, VC  VCC  I C RC
effect of 𝛽 can be neglected
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Applied Electronics I Lecture Note 2024-12-20

Example-1 Solution:
Determine the Q-point values of IC and VCE. Find IC(sat) and VCE(cut off), and
then construct the dc load line and plot the Q-point. Assume IC ≅ IE to
find IC(sat) and VCE(cut off)
Solution: Bias type: Emitter-feedback bias
𝑉

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Solution: Example-2
Given the load line on figure shown below and the defined Q-point.
Determine the required values of VCC, RC, and RB for a fixed-bias
configuration.

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Applied Electronics I Lecture Note 2024-12-20

Solution: 4. Collector-Feedback Bias

 The base resistor RB is connected to the collector rather than
to VCC
 The collector voltage VC, provides the bias for the base-
emitter junction
 The negative feedback creates an “offsetting” effect that
tends to keep the Q-point stable
 If IC tries to increase, it drops more voltage across RC, thereby
causing VC to decrease
 When VC decreases, there is a decrease in voltage cross RB,
which decreases IB Fig.19: An npn transistor
with collector-feedback bias
 The decrease in IB produces less IC which drops less voltage
across RC and thus offsets the decrease in VC

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4. Collector-Feedback Bias 4. Collector-Feedback Bias

 The analysis of the circuit for the linear region is
 The analysis of the circuit for the linear
as follow:
Considering the left-side loop region is as follow:

Right-
side loop:

Fig.19: An npn transistor Fig.19: An npn transistor

with collector-feedback bias with collector-feedback bias

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Applied Electronics I Lecture Note 2024-12-20

Q-Point Stability of Collector-Feedback Bias Example

 It is known that 𝛽 varies directly with temperature, and VBE varies Calculate the Q-point values (IC and VCE) for this circuit.
inversely with temperature.
 As the temperature goes up in a collector-feedback circuit, 𝛽 goes up and VBE Solution: Bias type: Collector-feedback bias
goes down. This increase in 𝛽 acts to increase IC.
 The decrease in VBE acts to increase IB which, in turns also acts to increase IC. As IC
tries to increase, the voltage drop across RC also tries to increase.
 This tends to reduce the collector voltage and therefore the voltage across RB,
thus reducing IB and offsetting the attempted increase in IC and the attempted
decrease in VC.
 The result is that the collector-feedback circuit maintains a relatively stable Q-
point.
 Moreover, the reverse action occurs when the temperature decreases.

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Solution: 5. Voltage-Divider Bias

 VCC is used as the single bias source.
 A dc bias voltage at the base of the transistor
can be developed by a resistive voltage divider
consisting of R1 and R2.
 There are two current paths between point A and
ground:
 one through R2 and
 the other through the base-emitter junction of the
transistor and RE. Fig.3.20: Voltage-divider bias

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Applied Electronics I Lecture Note 2024-12-20

Thevenin’s Theorem Applied to Voltage-Divider Bias Voltage-Divider Bias

The voltage at point A

with respect to ground is:
RTH

VTH
and the resistance is:
𝑅 𝑅
=
𝑅 +𝑅

Note that: 𝑉 =𝑉 Fig.3.21: Thevenin theorem

Fig.3.21: Thevenin’s theorem on voltage-divider bias on voltage-divider bias

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Stability of Voltage-Divider Bias Example-1

Determine Q-point (IC,VCE), IRC and IRL. Assume 𝛽 = 200 and IE ≅ IC.
Solution: Bias type: Voltage-divider bias
 IC is independent of 𝛽
 Therefore, the voltage-
divider bias is widely
used because reasonably
good stability is
achieved
with a single supply
voltage.

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Applied Electronics I Lecture Note 2024-12-20

Solution: Example-2
Determine the values of ICQ and VCEQ for the circuit shown in Fig.
below.
Solution: R2
VB  VCC
Bias type: Voltage-divider bias R1  R2
4.7kΩ
 10V   2.07V
22.7kΩ
VE  VB  0.7V
 2.07V  0.7V  1.37V

Because ICQ  IE (or hFE >> 1),

VE 1.37V
I CQ    1.25mA
RE 1.1kΩ
VCEQ  VCC  I CQ  RC  RE 
 10V  1.25mA  4.1kΩ   4.87V

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