DEPARTMENT OF

COMPUTER SCIENCE & ENGINEERING

UNIT-IV

Memory management techniques: -contiguous allocation, static and dynamic partitioning, non contiguous
allocation, paging, translation look aside buffer (TLB) and overheads, segmentation.

Logical and Physical Addresses

An address generated by the CPU is commonly refereed as Logical Address, whereas the address seen
by the memory unit that is one loaded into the memory address register of the memory is commonly
refereed as the Physical Address. The compile time and load time address binding generates the
identical logical and physical addresses. However, the execution time addresses binding scheme
results in differing logical and physical addresses.

The set of all logical addresses generated by a program is known as Logical Address Space, where as
the set of all physical addresses corresponding to these logical addresses is Physical Address Space.
Now, the run time mapping from virtual address to physical address is done by a hardware device
known as Memory Management Unit. Here in the case of mapping the base register is known as
relocation register. The value in the relocation register is added to the address generated by a user
process at the time it is sent to memory.

Let's understand this situation with the help of example: If the base register contains the value 1000,then an
attempt by the user to address location 0 is dynamically relocated to location 1000,an access to location 346
is mapped to location 1346.

Memory-Management Unit (MMU)

 Hardware device that maps virtual to physical address

 In MMU scheme, the value in the relocation register is added to every address generated by a user
process at the time it is sent to memory
 The user program deals with logical addresses; it never sees the real physical addresses
The user program never sees the real physical address space, it always deals with the
Logical addresses. As we have two different type of addresses Logical address in the range (0 to
max) and Physical addresses in the range(R to R+max) where R is the value of relocation register.
The user generates only logical addresses and thinks that the process runs in location to 0 to max. As it
is clear from the above text that user program supplies only logical addresses, these logical addresses
must be mapped to physical address before they are used.

Base and Limit Registers

A pair of base and limit registers define the logical address space

HARDWARE PROTECTION WITH BASE AND LIMIT

Binding of Instructions and Data to Memory

Address binding of instructions and data to memory addresses can happen at three different stages

 Compile time: If memory location known a priori, absolute code can be generated; must recompile
code if starting location changes
 Load time: Must generate relocatable code if memory location is not known at compile time.
 Execution time: Binding delayed until run time if the process can be moved during its execution
from one memory segment to another. Need hardware support for address maps (e.g., base and limit
registers)

Multistep Processing of a User Program

Dynamic Loading
 Routine is not loaded until it is called
 Better memory-space utilization; unused routine is never loaded
 Useful when large amounts of code are needed to handle infrequently occurring cases
 No special support from the operating system is required implemented through program design

Dynamic Linking
 Linking postponed until execution time
 Small piece of code, stub, used to locate the appropriate memory-resident library routine
 Stub replaces itself with the address of the routine, and executes the routine
 Operating system needed to check if routine is in processes’ memory address
 Dynamic linking is particularly useful for libraries
 System also known as shared libraries
Overlays
 Keep in memory only those instructions and data that are needed at any given time.
 Needed when process is larger than amount of memory allocated to it.
 Implemented by user, no special support needed from operating system, programming
design of overlay structure is complex.

Swapping
A process can be swapped temporarily out of memory to a backing store, and then brought back into
memory for continued execution Backing store – fast disk large enough to accommodate copies of all
memory images for all users; must provide direct access to these memory images Roll out, roll in –
swapping variant used for priority-based scheduling algorithms; lower-priority process is swapped out
so higher-priority process can be loaded and executed Major part of swap time is transfer time; total
transfer time is directly proportional to the amount of memory swapped and Modified versions of
swapping are found on many systems (i.e., UNIX, Linux, and Windows)
System maintains a ready queue of ready-to-run processes which have memory images on disk

Schematic View of Swapping

MEMORY ALLOCATION

 The main memory must accommodate both the operating system and the various user processes.
We need to allocate different parts of the main memory in the most efficient way
 possible.
 The main memory is usually divided into two partitions: one for the resident operating
 system, and one for the user processes. We may place the operating system in either low
 memory or high memory. The major factor affecting this decision is the location of the
 interrupt vector. Since the interrupt vector is often in low memory, programmers usually
 place the operating system in low memory as well.
 There are following two ways to allocate memory for user processes:
 1. Contiguous memory allocation
2. Non contiguous memory allocation

Contiguous Allocation

 Main memory usually into two partitions:

 Resident operating system, usually held in low memory with interrupt vector
 User processes then held in high memory Relocation registers used to protect user processes from
each other, and from changing operating-system code and data
 Base register contains value of smallest physical address
 Limit register contains range of logical addresses – each logical address must be less than the limit
register
 MMU maps logical address dynamically
 Multiple-partition allocation
 Hole – block of available memory; holes of various size are scattered throughout memory When a
process arrives, it is allocated memory from a hole large enough to accommodate it.

Hardware Support for Relocation and Limit Registers

Contiguous memory allocation is one of the efficient ways of allocating main memory to the
processes. The memory is divided into two partitions. One for the Operating System and another for
the user processes. Operating System is placed in low or high memory depending on the interrupt
vector placed. In contiguous memory allocation each process is contained in a single contiguous
section of memory.

Memory protection
Memory protection is required to protect Operating System from the user processes and user processes
from one another. A relocation register contains the value of the smallest physical address for example
say 100040. The limit register contains the range of logical address for example say 74600. Each
logical address must be less than limit register. If a logical address is greater than the limit register,
then there is an addressing error and it is trapped. The limit register hence offers memory protection.

The MMU, that is, Memory Management Unit maps the logical address dynamically, that is at run
time, by adding the logical address to the value in relocation register. This added value is the physical
memory address which is sent to the memory.

The CPU scheduler selects a process for execution and a dispatcher loads the limit and relocation
registers with correct values. The advantage of relocation register is that it provides an efficient way
to allow the Operating System size to change dynamically.

Memory allocation

There are two methods namely, multiple partition method(MFT) and a general fixed partition
method(MVT). In multiple partition method, the memory is divided into several fixed size partitions.
One process occupies each partition. This scheme is rarely used nowadays. Degree of
multiprogramming depends on the number of partitions. Degree of multiprogramming is the number
of programs that are in the main memory. The CPU is never left idle in multiprogramming. This was
used by IBM OS/360 called MFT. MFT stands for Multiprogramming with a Fixed number of Tasks.

Generalization of fixed partition scheme is used in MVT. MVT stands for Multiprogramming with a
Variable number of Tasks. The Operating System keeps track of which parts of memory are available
and which is occupied. This is done with the help of a table that is maintained by the Operating
System. Initially the whole of the available memory is treated as one large block of memory called a
hole. The programs that enter a system are maintained in an input queue. From the hole, blocks of
main memory are allocated to the programs in the input queue. If the hole is large, then it is split into
two, and one half is allocated to the arriving process and the other half is returned. As and when
memory is allocated, a set of holes in scattered. If holes are adjacent, they can be merged.
Now there comes a general dynamic storage allocation problem.

The following are the solutions to the dynamic storage allocation problem.

 First fit: The first hole that is large enough is allocated. Searching for the holes
starts from the beginning of the set of holes or from where the previous first fit
search ended.
 Next Fit:
 Best fit: The smallest hole that is big enough to accommodate the incoming
process is allocated. If the available holes are ordered, then the searching can be
reduced.
 Worst fit: The largest of the available holes is allocated.

Note: Solve Example based on fixed partition and variable partition using above algo.
Example:

First and best fits decrease time and storage utilization. First fit is generally faster.

Fragmentation
The disadvantage of contiguous memory allocation is fragmentation. There are two types of
fragmentation, namely, internal fragmentation and External fragmentation.

Internal fragmentation

When memory is free internally, that is inside a process but it cannot be used, we call that fragment
as internal fragment. For example say a hole of size 18464 bytes is available. Let the size of the
process be 18462. If the hole is allocated to this process, then two bytes are left which is not used.
These two bytes which cannot be used forms the internal fragmentation. The worst part of it is that
the overhead to maintain these two bytes is more than two bytes.

External fragmentation
All the three dynamic storage allocation methods discussed above suffer external fragmentation.
When the total memory space that is got by adding the scattered holes is sufficient to satisfy a
request but it is not available contiguously, then this type of fragmentation is called external
fragmentation.

The solution to this kind of external fragmentation is compaction. Compaction is a method by which
all free memory that are scattered are placed together in one large memory block. It is to be noted
that compaction cannot be done if relocation is done at compile time or assembly time. It is possible
only if dynamic relocation is done, that is relocation at execution time.

One more solution to external fragmentation is to have the logical address space and physical address
space to be non contiguous. Paging and Segmentation are popular non contiguous allocation
methods.
Example for internal and external fragmentation

Paging
A computer can address more memory than the amount physically installed on the system. This extra
memory is actually called virtual memory and it is a section of a hard that's set up to emulate the
computer's RAM. Paging technique plays an important role in implementing virtual memory. Paging
is a memory management technique in which process address space is broken into blocks of the same
size called pages (size is power of 2, between 512 bytes and 8192 bytes). The size of the process is
measured in the number of pages.
Similarly, main memory is divided into small fixed-sized blocks of (physical) memory called frames
and the size of a frame is kept the same as that of a page to have optimum utilization of the main
memory and to avoid external fragmentation.

Paging Hardware
Address Translation
Page address is called logical address and represented by page number and the offset.
Logical Address = Page number + page offset
Frame address is called physical address and represented by a frame number and the offset.
Physical Address = Frame number + page offset
A data structure called page map table is used to keep track of the relation between a page
of a process to a frame in physical memory.

Paging Model of Logical and Physical Memory

Paging Example

32-byte memory and 4-byte pages

Free Frames

When the system allocates a frame to any page, it translates this logical address into a physical
address and creates entry into the page table to be used throughout execution of the program. When a
process is to be executed, its corresponding pages are loaded into any available memory frames.
Suppose you have a program of 8Kb but your memory can accommodate only 5Kb at a given point in
time, then the paging concept will come into picture. When a computer runs out of RAM, the
operating system (OS) will move idle or unwanted pages of memory to secondary memory to free up
RAM for other processes and brings them back when needed by the program.
This process continues during the whole execution of the program where the OS keeps removing idle
pages from the main memory and write them onto the secondary memory and bring them back when
required by the program.

Implementation of Page Table

 Page table is kept in main memory

 Page-table base register (PTBR) points to the page table
 Page-table length register (PRLR) indicates size of the page table
 In this scheme every data/instruction access requires two memory accesses. One for the page
table and one for the data/instruction.
 The two memory access problem can be solved by the use of a special fast-lookup
hardware cache called associative memory or translation look-aside buffers (TLBs)
 Typically, the number of entries in a TLB is between 32 and 1024.

 Paging Hardware With TLB

 The TLB contains only a few of the page table entries. When a logical address is generated by the
CPU, its page number is presented to the TLB. If the page number is found, its frame number is
immediately available and is used to access memory. The whole task may take less than 10
percent longer than it would if an unmapped memory reference were used.
 If the page number is not in the TLB (known as a TLB miss), a memory reference to the page
table must be made. When the frame number is obtained, we can use it to access memory.

Hit Ratio
 Hit Ratio: the percentage of times that a page number is found in the associative registers.
 For example, if it takes 20 nanoseconds to search the associative memory and 100 nanoseconds to
access memory; for a 98-percent hit ratio, we have
Effective memory-access time = 0.98 x 120 + 0.02 x 220
= 122 nanoseconds.

Memory Protection (Valid or invalid bit in a page table)

 Memory protection implemented by associating protection bit with each frame
 Valid-invalid bit attached to each entry in the page table:
 “valid” indicates that the associated page is in the process’ logical address space, and is thus a
legal page
 “invalid” indicates that the page is not in the process’ logical address space
 Valid (v) or Invalid (i) Bit In A Page Table.
 Pay attention to the following figure. The program extends to only address 10,468, any
reference beyond that address is illegal. However, references to page 5 are classified as valid,
 so accesses to addresses up to 12,287 are valid. This reflects the internal fragmentation of
paging.

Shared Pages
Shared code
 One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers,
window systems).
 Shared code must appear in same location in the logical address space of all processes

Private code and data

 Each process keeps a separate copy of the code and data.

 The pages for the private code and data can appear anywhere in the logical address space

Shared Pages Example

Advantages and Disadvantages of Paging
Here is a list of advantages and disadvantages of paging −
 Paging reduces external fragmentation, but still suffers from internal fragmentation.
 Paging is simple to implement and assumed as an efficient memory management
technique.
 Due to equal size of the pages and frames, swapping becomes very easy.
 Page table requires extra memory space, so may not be good for a system having
small RAM.

Segmentation
 Memory-management scheme that supports user view of memory A program is a
collection of segments
 A segment is a logical unit such as:
o main program
o Procedure
o function method
o object
o local variables, global variables
o common block
o stack
o symbol table
o arrays
 Segmentation is a memory management scheme that supports this user view of memory.
 A logical address space is a collection of segments. Each segment has a name and a
length.
 The addresses specify both the segment name and the offset within the segment.
 The user therefore specifies each address by two quantities such as segment name and an offset.
For simplicity of implementation, segments are numbered and are referred to by a segment
number, rather than by a segment name.

User’s View of a Program

Segmentation Architecture
 Logical address consists of a two tuple:
<segment-number offset>,
 Segment table – maps two-dimensional physical
 Segment table – maps two-dimensional physical addresses; each table entry has:
 Base – contains the starting physical address where the segments reside in
memory.
 Limit – specifies the length of the segment.
 Segment-table base register (STBR) points to the segment table’s location in
memory Segment-table length register (STLR) indicates number of segments used
by a program; segment number s is legal if s < STLR
 Protection
 With each entry in segment table associate:
 validation bit = 0 illegal segment
 read/write/execute privileges
 Protection bits associated with segments; code sharing occurs at segment level
 Since segments vary in length, memory allocation is a dynamic storage-
allocation problem A segmentation example is shown in the following diagram

Segmentation Hardware
Example of Segmentation

 When the user program is compiled by the compiler it constructs the segments.
 The loader takes all the segments and assigned the segment numbers.
 The mapping between the logical and physical address using the segmentation technique is
shown in above figure.
 Each entry in the segment table as limit and base address.
 The base address contains the starting physical address of a segment where the limit
address specifies the length of the segment.
 The logical address consists of 2 parts such as segment number and offset.
 The segment number is used as an index into the segment table. Consider the below
example is given below.