Circuit Implementation

Asst. Prof. Mohanad Alayedi

Department of Software Engineering
Haliç University
[email protected]

CEN203, Fall 2024

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 1

 Overview

➢ Two-level circuits
➢ Multi-level circuits
➢ Nand and Nor implementation
– Nand circuits
– Nor circuits
➢ XOR circuits

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 2

 Circuit Levels?

➢ Two-level
– Drawing a line from any input to any output if the line passes
through at most two gates it is called a two- level circuit.
– Any standard SOP or POS Boolean expressions can be
implemented with two-level circuits.
➢ Multi-level
– Drawing a line from any input to any output if the line passes
through more than two gates it is called a multi-level circuit.
– It is possible to implement mult-level circuits as two- level
circuits.

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 3

 Circuit Examples

Two-level Multi-level

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 Why Multi-Level Circuits?

➢ Implementation cost can be reduced.

➢ Unavailabality of multi-input gates
– AND/OR gates with more than 4-inputs not
feasible
➢ Example
– F = AB + CD + CE G=9
– F = AB + C(D + E) G=8

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 Multi-level Circuit Example

➢ X = ADF + AEF + BDF + BEF + CDF + CEF + G

– Reduced sum-of-products form – already simplified
– 6 x 3-input AND gates + 1 x 7-input OR gate (may not exist!)
– Cost: G = 25 (19 literals plus 6 expressions)
➢ X = (A + B + C) (D + E) F + G
– Factored form – not written as two-level S-o-P
– 1 x 3-input OR gate, 2 x 2-input OR gates, 1 x 3-input AND gate
– Cost: G = 10 (7 literals plus 3 expressions)
A
B
C
X
D
E
F
G
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 NAND and NOR Implementation

➢ Digital circuits constructed with NAND and NOR gates

– Easier to fabricate
➢ Rules and procedures have been developed for the conversion from Boolean
functions (AND, OR, and NOT) into equivalent NAND and NOR logic diagrams.

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 7

 NAND Circuit

➢ Universal gate
– Can implement AND, OR

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 8

 Conversion to NAND

➢ A convenient way to implement a Boolean function

with NAND gates is to
1) obtain the simplified Boolean function in terms of Boolean
operators and
2) then convert the function to NAND logic.
➢ The conversion of an algebraic expression from AND, OR,
and NOT to NAND can be done by simple circuit
manipulation techniques that change AND–OR diagrams
to NAND diagrams.

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 9

 Two Views of the NAND Gate

➢ To facilitate the conversion to NAND logic, it is convenient to

define an alternative graphic symbol for the gate. Two
equivalent graphic symbols for a 3-input NAND gate are

➢ The AND-invert symbol has been defined previously and

consists of an AND gate followed by a bubble (a)
➢ Alternatively, it is possible to represent a NAND gate by an OR
gate that is preceded by a bubble in each input.

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 Two-level implementation

➢ The implementation of Boolean functions with NAND gates requires

that the functions be in sum-of- products form
➢ Example :
F = AB +CD = ((AB)'(CD)')'

F = AB+CD

F = ((AB)'(CD)')'

F = ((AB)')'+((CD)')'

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 Two-level Implementation Example

➢ F (x, y, z) = (1, 2, 3, 4, 5, 7)

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 Two-level Implementation Procedure
➢ The procedure described in the previous example indicates that a
Boolean function can be implemented with two levels of NAND
gates. The procedure for obtaining the logic diagram from a Boolean
function is as follows:
1. Simplify the function and express it in sum-of-products form.
2. Draw a NAND gate for each product term of the expression that
has at least two literals. The inputs to each NAND gate are the
literals of the term. This procedure produces a group of first-level
gates.
3. Draw a single gate using the AND-invert or the invert-OR graphic
symbol in the second level, with inputs coming from outputs of
first- level gates.
4. A term with a single literal requires an inverter in the first level.
However, if the single literal is complemented, it can be
connected directly to an input of the second level NAND gate.
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 Multi-level NAND Circuits

➢ The most common procedure in the design of multilevel circuits is to express

the Boolean function in terms of AND, OR, and NOT operations.
➢ The function can then be implemented with AND and OR gates.
➢ After that, if necessary, it can be converted into an all-NAND circuit.

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 Multi-level NAND Circuits Example

➢ F = A (CD + B) + BC'

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 Multi-Level NAND Circuits Example

➢ F = A (CD + B) + BC'

Gates have at most two inputs!

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 Multi-Level NAND Circuit Implementation Procedure

➢ The general procedure for converting a multilevel AND–OR

diagram into an all-NAND diagram is as follows:
1. Convert all AND gates to NAND gates with AND- invert
graphic symbols.
2. Convert all OR gates to NAND gates with invert-OR graphic
symbols.
3. Check all the bubbles in the diagram. For every bubble that is
not compensated by another small circle along
the same line, insert an inverter (a one- input NAND gate) or
complement the input literal.

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 Example 01

➢ F = (((AB)C) + D) + E

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 Example 02

➢ F = (AB' + A'B)(C + D')

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 Example 02:

F = (AB' + A'B)(C + D')

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 NOR Implementation

➢ The NOR operation is the dual of the NAND operation.

➢ Therefore, all procedures and rules for NOR logic are the
duals of the corresponding procedures and rules
developed for NAND logic.

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 21

 NOR Circuit

➢ Universal gate
– Can implement AND, OR

CEN203, Fall 2024 © 2024, Dr. Mohanad Alayedi (Haliç University) 22

 Two Views of NOR Gate

➢ To facilitate the conversion to NOR logic, it is convenient to define

an alternative graphic symbol for the gate. Two equivalent graphic
symbols for a 3-input NOR gate are

➢ The OR-invert symbol has been defined previously and consists of

an OR gate followed by a bubble (a)
➢ Alternatively, it is possible to represent a NOR gate by an AND gate
that is preceded by a bubble in each input.
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 Two-Level Implementation

➢ The implementation of Boolean functions with NOR gates requires

that the functions be in product-of- sums form
➢ Example :
F = (A+B)(C+D)E = ((A+B)'+(C+D)'+E')'

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 Example

➢ F = (AB' + A'B)(C + D')

(a) AND-OR implementation

(b) NOR implementation

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 Multi-level NOR Circuit Implementation Procedure

➢ The general procedure for converting a multilevel AND–OR diagram

into an all-NOR diagram is as follows:
1. Convert all OR gates to NOR gates with OR-invert graphic
symbols.
2. Convert all AND gates to NOR gates with invert-AND graphic
symbols.
3. Check all the bubbles in the diagram. For every bubble that is
not compensated by another small circle along the same line,
insert an inverter (a one- input NOR gate) or complement the
input literal.

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 Exclusive-OR Function

➢ Exclusive-OR (XOR) denoted by the symbol 

is a logical operation that performs
x  y = xy' + x'y
➢ The XOR is equal to 1 if only x is equal to 1 or if only y is equal to 1,
but not when both are equal to 1 or when both are equal to 0.

XOR gate symbol

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 XOR Identities

• The following apply to XOR operation

x0=x
x  1 = x'
xx=0
x  x' = 1
x  y' = x'  y = (x  y)‘ (exclusive-NOR)
xy=yx (commutative)
(x  y)  z = x  (y  z) (associative)

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 XOR Implementation

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 Odd Function

➢ The exclusive-OR operation with three or more variables can be

converted into an ordinary Boolean function by replacing the  symbol
with its equivalent Boolean expression.
➢ For example, the three-variable case can be converted to a Boolean
expression as follows:

ABC = (AB'+ A'B)C' + (AB + A'B')C

= AB'C' + A'BC' + ABC + A'B'C
= (1,2,4,7)

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 XOR as an Odd Function

A  B  C = (1,2,4,7)
➢ The Boolean function derived from the three-variable exclusive-OR
operation is expressed as the logical sum of four minterms whose
binary numerical values are
001, 010, 100, and 111
➢ Each of these binary numbers has an odd number of 1’s
➢ The remaining four minterms not included in the function are 000,
011, 101, and 110, and they have an even number of 1’s in their
binary numerical values.

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 Odd and Even Functions on K-map

➢ The definition of an odd function can be clarified by plotting it in a

k-map

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 Logic Diagram of Odd and Even Functions

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