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Note - Applied Digital Logic Design - Module 2

The document provides class notes on Applied Digital Logic Design, focusing on Boolean algebra, its operations, laws, and applications in digital circuits. It explains key concepts such as Boolean expressions, canonical forms, and the realization of these expressions using logic gates. Additionally, it includes tables summarizing operations and laws, along with examples and circuit diagrams for practical understanding.
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0% found this document useful (0 votes)
9 views33 pages

Note - Applied Digital Logic Design - Module 2

The document provides class notes on Applied Digital Logic Design, focusing on Boolean algebra, its operations, laws, and applications in digital circuits. It explains key concepts such as Boolean expressions, canonical forms, and the realization of these expressions using logic gates. Additionally, it includes tables summarizing operations and laws, along with examples and circuit diagrams for practical understanding.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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BRAINWARE UNIVERSITY

School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Boolean Algebra
Boolean algebra is the mathematics of digital logic. A basic knowledge of Boolean algebra is indispensable to the
study and analysis of logic circuits. In the last chapter, Boolean operations and expressions in terms of their
relationship to NOT, AND, OR, NAND, and NOR gates were introduced.
Rules and properties of Boolean Algebra
1. Boolean variables takes only two values, logic 1 and logic 0, called binary numbers.
2. Basic operations of Boolean algebra are complement of a variable, ORing and ANDing of two or more variables.
3. Mathematical description of Boolean operations using variables is called Boolean expression.
4. Complement of variable is represented by an over-bar (-).
Example: , Y is the output variable
5. ORing of variables is represented by a plus symbol (+)
Example:𝑌 = 𝐴 + 𝐵, Y is the output variable
6. ANDing of variables is represented by a dot symbol (.)
Example:𝑌 = 𝐴. 𝐵, Y is the output variable
7. Boolean operations are different from binary operations.
Example : 1+1=10 in Binary Addition
1+1=1 in Boolean algebra.
Table 1. shows the complement operation of a variable, Table 2 summarized the OR operation
and Table 3, summarized the AND operation of two variables.

Table 1: Complement of variable A

Table 2: OR operation on A and B

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Table 3: AND operation on A and B


Boolean Laws:
Law-1: Commutative law
The sequence of changing the variables does not effect on the result even after changing their sequence while
performing OR/AND operations of Boolean expression.
A. B = B. A and
A+B=B+A
Law-2: Associative law
The order of operations on variables is independent.
A.(B. C) = (A. B). C and
A + (B + C) = (A + B) + C
Law-3: Distributive Laws
𝐴. (𝐵 + 𝐶) = 𝐴. 𝐵 + 𝐴. 𝐶
𝐴 + 𝐵𝐶 = (𝐴 + 𝐵)(𝐴 + 𝐶)
Law-4: AND Laws
𝐴. 0 = 0
𝐴. 1 = 𝐴
𝐴. 𝐴 = 𝐴
𝐴. 𝐴 = 0
Law-5: OR Laws
𝐴+0=𝐴
𝐴+1=1
𝐴+𝐴=𝐴
𝐴+𝐴=1
Law-6: Inversion/Complement/NOT Laws
(0)’= 1
(1)’= 0
((𝐴)’)’= 𝐴
Law-7: Absorption Law
𝑨(𝑨 + 𝑩) = 𝑨
𝑨 + 𝑨𝑩 = 𝑨
𝑨 + 𝑨̅𝑩 = 𝑨 + 𝑩

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design


Law-8: Demargon's Laws
De-Morgan's First Law
Statement: Sum of the complement of two or more variables is equal to the product of the complement of their
variables.

Proof:
consider three variables for the proof shown in Table 4

Table 4: De-Morgan's First Law


De-Morgan's Second Law
Statement: Product of the complement of two or more variables is equal to the sum of the
complement of their variables.

Proof:
consider three variables for the proof shown in Table 5

Table 5: De-Morgan's Second Law

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Table 6: Basic Rules

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

5. 𝐘 = (𝐀 + 𝐂)(𝐀𝐃 + 𝐀𝐃̅) + 𝐀𝐂 + 𝐂
Solution

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

11. If 𝐅 = 𝐀̅ + 𝐁, 𝐀 = 𝐘 + 𝐗 and 𝐁 = 𝐗̅ + 𝐘, then 𝐅 =?


Solution:

Realization of Boolean expressions using logic gates.


Logic gate is the basic building block of any digital circuits. The logic gates may have one or more inputs and only

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design


one output. The relationship between input and output is based on a certain logic, which is same as Boolean
operations, such as AND, OR and NOT.
Based on the Boolean operations, the gates are named as AND gate, OR gate and NOT gate. These three gates
are called basic gates, and some more gates can be derived by using the basic gates, they are named as NAND
gate, NOR gate, EXOR gate and XNOR gate. NAND and NOR gates are called universal gates, because by using
only the NAND gates /NOR gates we can realize all basic gates even all Boolean expression. Logic gates, its truth
table, expression and symbols are summarized in the Table 7 as follows.

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Table: Some available ICs

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Realize the following Boolean expression using basic gates.


Y = AB + BC + AC
The circuit diagram is given figure1.

Figure 1: Circuit diagram using basic gates


The same circuit using NAND gate.

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Figure 2: Circuit diagram using NAND gate only.

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Canonical and Standard Forms


The relationship between Boolean variables and output variable is called Boolean expression, the Boolean
expressions can be represented in two different forms, they are,
1. Sum of Products (SOP) form and
2. Product of Sums (POS) form • Minterms and Maxterms
Definitions
Literal: A variable or its complement
Product term: literals connected by •
Sum term: literals connected by +
Minterm: a product term in which all the variables appear exactly once, either complemented or
uncomplemented.
Maxterm: a sum term in which all the variables appear exactly once, either complemented or uncomplemented.
Canonical form: Boolean functions expressed as a sum of Minterms or product of Maxterms are said to be in
canonical form.
Sum of Product (SOP) form
The Boolean Expressions in which the product of input variables are summed together for output
high. Example: Consider a truth table shown in table 8.

Table 8

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design


The Boolean expression for Y is
Y = A̅ B̅C + A̅ BC̅ + AB̅ C̅ + AB̅ C + ABC − − − (1)
NOTE: A = 0 is represented as A and ̅̅̅ A = 1 will be represented as A
Expression (1) is a standard or canonical sum of product form, which is directly derived from the truth table.
NOTE:
1. Canonical SOP form to minimal SOP form and vice versa can also be derived using truth table.
2. Each product terms of SOP form is called minterms.
3. Canonical SOP form of Boolean expressions can also be written using decimal equivalent of
input variables for the output high.
Example: for the Boolean expression (1), the output is high for ABC=001, ABC=010 ABC=100,
ABC=101 and ABC=111.
The decimal equivalent of ABC=001 is '1', ABC=010 is '2', ABC=100 is '4', ABC=101 is '5' and
ABC=111 is '7'
Therefore, Y can also be expressed as
Y(A, B, C) = (m1, m2, m4, m5, m7)
OR
Y(A, B, C) = ∑ m(1,2,4,5,7)
Product of Sum (POS) form
The Boolean Expressions in which the Sum of input variables are multiplied together for output low.
Example: Consider a truth table shown in table 9.

Table 9
The Boolean expression for Y is
Y = (A + B + C)(A + B̅ + C̅)(A̅ + B̅ + C) − − − (1)
NOTE: A = 0 is represented as A and A = 1 will be represented as A ̅
Expression (1) is a standard or canonical Products of sum form, which is directly derived from the truth table.
NOTE:
1. Canonical POS form to minimal POS form and vice versa can also be derived using truth table.
2. Each Sum terms of POS form is called maxterm.
3. Canonical POS form of Boolean expressions can also be written using decimal equivalent of
input variables for the output high.
Example: for the Boolean expression (1), the output is low for ABC=000, ABC=011 and

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design


ABC=110.
The decimal equivalent of ABC=000 is '0', ABC=011 is '3', and ABC=110 is '6'
Therefore, Y can also be expressed as

Truth Table notation for Minterms and Maxterms


• Minterms and Maxterms are easy to denote using a truth table.
Example: Assume 3 variables x,y,z (order is fixed)

Table:10
Conversion between Canonical Forms
Consider a Truth table for f1(a,b,c) at right. The canonical sum-of-products form for f1 is
f1(a,b,c) = m1 + m2 + m4 + m6
= a’b’c + a’bc’ + ab’c’ + abc’
The canonical product-of-sums form for f1 is
f1(a,b,c) = M0 • M3 • M5 • M7
= (a+b+c)•(a+b’+c’)• (a’+b+c’)•(a’+b’+c’).
Observe that: mj = Mj’
Conversion of SOP from standard to canonical form
Example-1.
Express the Boolean function F = A + B’C as a sum of minterms.
Solution: The function has three variables: A, B, and C. The first term A is missing two variables; therefore,
A = A(B + B’) = AB + AB’
This function is still missing one variable, so
A = AB(C + C’) + AB’ (C + C’)

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design


= ABC + ABC’ + AB’C + AB’C’
The second term B’C is missing one variable; hence,
B’C = B’C(A + A’) = AB’C + A’B’C
Combining all terms, we have
F = A + B’C
= ABC + ABC’ + AB’C + AB’C’+ A’B’C
But AB’C appears twice, and according to theorem (x + x = x), it is possible to remove one of those
occurrences. Rearranging the minterms in ascending order, we finally obtain
F = A’B’C + AB’C + AB’C + ABC’ + ABC
= m1 + m4 + m5 + m6 + m7
When a Boolean function is in its sum‐of‐minterms form, it is sometimes convenient to express the
function in the following brief notation:
F(A, B, C) = ∑m (1, 4, 5, 6, 7)
Example-2.
Express the Boolean function F = xy + x’z as a product of maxterms.
Solution: First, convert the function into OR terms by using the distributive law:
F = xy + x’z = (xy + x’)(xy + z)
= (x + x’)(y + x’)(x + z)(y + z)
= (x’+ y)(x + z)(y + z)
The function has three variables: x, y, and z. Each OR term is missing one variable; therefore,
x’+ y = x’ + y + zz’ = (x’ + y + z)(x’ + y + z’)
x + z = x + z + yy’ = (x + y + z)(x + y’ + z)
y + z = y + z + xx’ = (x + y + z)(x’ + y + z)
Combining all the terms and removing those which appear more than once, we finally obtain
F = (x + y + z)(x + y’ + z)(x’ + y + z)(x’ + y + z)
F= M0M2M4M5
A convenient way to express this function is as
follows: F(x, y, z) = πM(0, 2, 4, 5)
The product symbol, π, denotes the ANDing of maxterms; the numbers are the indices of the maxterms of the
function.

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Karnaugh Map Method


A Karnaugh map is a graphical representation of the logic system. It can be drawn directly from either minterm
(sum-of-products) or maxterm (product-of-sums) Boolean expressions. Drawing a Karnaugh map from the truth
table involves an additional step of writing the minterm or maxterm expression depending upon whether it is
desired to have a minimized sum-of-products or a minimized product of-sums expression.
NOTE:
Number of cells in K-map = number of possible cases
No. of possible cases=2𝑁
N is the number of input variables.
Example: Number of input variables=2, then the number of cells in K-map is 4.
NOTE: K-maps can take wither POS form or SOP form, in SOP form 1's are need to be grouped and in POS form
0's are need to be grouped.
NOTE: Only adjacent cells will be considered for grouping, diagonal cells should not be grouped.
NOTE: grouping can be done using 2 variables, 4 variables, 8 variables, 16 variables etc.., highest priority for
grouping maximum variables in the above denomination. Variables are 0's for POS form and 1's for SOP form.
Procedure:
1. Select the number of cells according to the number of input variables.
2. Identify whether the given problem is SOP or POS form, minterms for SOP form and maxterms for POS form.
NOTE: In SOP form, fill the cells by 1's at corresponding minterms and otherwise fill with 0's.
NOTE: In POS form, fill the cells by 0's at corresponding maxterms and otherwise fill with 1's.
NOTE: In POS form, take the complement of the output variable to get the resultant expression.
3. group the terms in the form of rectangular, the total number of terms is 2, 4, 8, etc.., try to cover as many
elements as you can in one group.
4. from the groups, find the Product terms for SOP from and sum terms for POS form.

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

Maxterm/Minterm Corresponding to each cell of K-Map

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)


BRAINWARE UNIVERSITY
School of Engineering
Department of Computer Science & Engineering – Cyber Security & Data Science
398, Ramkrishnapur Road, Barasat, North 24 Parganas, Kolkata - 700 125

[BES 00018] Class Note Applied Digital Logic Design

2024-25 Prepared by: Faculty of CSE-CS&DS Department (Brainware University, Barasat)

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