IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO.

11, NOVEMBER 2011 3183

Switched-Inductor Quasi-Z-Source Inverter

Minh-Khai Nguyen, Student Member, IEEE, Young-Cheol Lim, Member, IEEE, and Geum-Bae Cho

Abstract—This paper deals with a new family of high boost To overcome limitations in traditional inverters, Peng [4]
voltage inverters called switched-inductor quasi-Z-source invert- proposed the Z-source inverter (ZSI) for single-stage power
ers (SL-qZSIs). The proposed SL-qZSI is based on the well-known conversion with buck–boost abilities. Both power switches in
qZSI topology and adds only one inductor and three diodes. In com-
parison to the SL-ZSI, for the same input and output voltages, the a leg can be turned on at the same time and dead time can
proposed SL-qZSI provides continuous input current, a common be eliminated. This significantly reduces the output waveform
ground with the dc source, reduced the passive component count, distortion and improves reliability. Work on ZSIs has focused
reduced voltage stress on capacitors, lower shoot-through current, on modeling and control [5]–[7], a pulsewidth modulation
and lower current stress on inductors and diodes. In addition, the (PWM) strategy [8]–[11], applications [12]–[15], and other Z-
proposed SL-qZSI can suppress inrush current at startup, which
might destroy the devices. This paper presents the operating prin- network topologies [16]–[26]. In [16]–[18], a class of quasi-ZSIs
ciples, analysis, and simulation results, and compares them with (qZSIs) to overcome the shortcomings of the classical ZSI has
those of the SL-ZSI. To verify the performance of the proposed con- been proposed. qZSIs have advantages, such as reducing passive
verter, a laboratory prototype was constructed with 48 Vd c input component ratings and improving input profiles.
and an ac output line-to-line voltage of 120 Vrm s . The simula- In [27]–[29], the focus is on improving the boost factor of
tion and experimental results verified that the converter has high
step-up inversion ability. the ZSI. For instance, [27] and [28] add inductors, capacitors,
and diodes to the Z-impendence network to produce a high dc-
Index Terms—Boost inversion ability, quasi-Z-source inverter link voltage for the main power circuit from a very low input
(qZSI), switched-inductor, Z-source inverter (ZSI).
dc voltage. In [29], two inductors of the impedance Z-network
are replaced by a transformer with a turn ratio of 2:1 to obtain
I. INTRODUCTION high voltage gain. These topologies suit solar cell and fuel cell
applications that can require high voltage gain to match the
OLTAGE- and current-source inverters [1], [2] find wide
V use in industry for ac motor drives, uninterruptible power
supplies, distributed power systems, and hybrid electric vehi-
source voltage difference.
Applying switched-capacitor, switched-inductor, hybrid
switched-capacitor/switched-inductor structures, voltage-lift
cles. However, the traditional voltage- and current-source invert-
techniques, and voltage multiplier cells [30]–[32] to dc–dc con-
ers have major problems. A traditional voltage-source inverter
version provides the high boost in cascade and transformerless
cannot have an ac output voltage higher than the dc source volt-
structures with high efficiency and high power density. A suc-
age and can only provide buck dc–ac power conversion. Shoot
cessful combination of the ZSI and switched-inductor structure,
through, generated by both power switches in a leg, is forbidden
called the switched-inductor ZSI (SL-ZSI) [27], provides strong
in a voltage-source inverter. A current-source inverter cannot
step-up inversion to overcome the boost limitation of the clas-
have an ac output voltage lower than the dc source voltage;
sical ZSI [4].
therefore, it provides only voltage boost dc–ac power conver-
This paper applies the switched-inductor structure to the con-
sion and it cannot tolerate an open circuit. For applications,
tinuous input current quasi-Z-source topology to create a new
where both buck and boost voltage are demanded, an additional
type of inverter called an SL-qZSI. Compared with the SL-ZSI,
dc–dc converter that acts as both a voltage- and current-source
the proposed SL-qZSI improves input current, reduces the pas-
inverter, performs two-stage power conversion with high cost
sive component count, and improves reliability. Moreover, the
and low efficiency [3].
shoot-through current, voltage stress on capacitors, and current
stress on inductors and diodes in the proposed SL-qZSI are lower
Manuscript received September 6, 2010; revised January 4, 2011 and March than in the SL-ZSI for the same input and output voltages. The
1, 2011; accepted March 30, 2011. Date of current version November 18, 2011. proposed SL-qZSI avoids the inrush current at startup, which
This work was supported by the Grant of the Korean Ministry of Education, may destroy the devices. The operating principles, analysis, and
Science and Technology (The Regional Core Research Program/Biohousing
Research Institute), and in part by the Ministry of Knowledge Economy, Ko- simulation results are compared with those of the SL-ZSI. A
rea Institute for Advancement of Technology, and Honam Leading Industry laboratory prototype with a three-phase resistive load R, based
Office through the Leading Industry Development for Economic Region. Rec- on a TMS320F2812 DSP, verified the converter operation. We
ommended for publication by Associate Editor P. C. Loh.
M.-K. Nguyen is with the Department of Electrical and Electronic Engi- also performed a participative simulation integral manufactur-
neering, Nguyen Tat Thanh University, Ho Chi Minh City, Vietnam (e-mail: ing (PSIM) simulation.
[email protected], [email protected]).
Y.-C. Lim is with the Department of Electrical Engineering, Chonnam Na-
tional University, Gwangju 500-757, Korea (e-mail: [email protected]).
G.-B. Cho is with the Department of Electrical Engineering, Chosun Univer-
II. INTRODUCTION TO ZSI TOPOLOGIES
sity, Gwangju 501-759, Korea (e-mail: [email protected]). The two-port impedance network of the original ZSI topology
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. [4], as shown in Fig. 1(a), couples the inverter main circuit to the
Digital Object Identifier 10.1109/TPEL.2011.2141153 dc voltage source. It consists of inductors (L1 and L2 ) and two

0885-8993/$26.00 © 2011 IEEE

3184 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

Fig. 2. SL-ZSI with discontinuous input current and without a common ground
[27].

Fig. 1. (a) Original ZSI [4] and (b) continuous input current qZSI with a
common ground [16].

capacitors (C1 and C2 ) connected in an X shape. An additional

shoot-through zero state is added to the switching states to boost
voltage. When the input voltage is large enough to produce the
Fig. 3. Startup inrush current of the SL-ZSI.
desired ac voltage, the shoot-through zero state is not used and
the ZSI operates as a buck inverter—just like a conventional
voltage-source inverter. In the classical ZSI, the ground of the dc decoupling capacitor bank at the front end to eliminate current
source is not the same as that of the converter and current drawn discontinuity and protect the energy source; and 4) it cannot
from the source is discontinuous. This is a limitation in some suppress the inrush current and the resonance introduced by
applications, and a decoupling capacitor bank at the front end is Z-source inductors and capacitors at startup, and the resulting
sometimes used to avoid the current discontinuity and protect the voltage and current spike can destroy the devices.
energy source. qZSIs [16]–[18] overcome the problems in the The startup inrush current problem of the SL-ZSI occurs
classical ZSI. Fig. 1(b) shows that the continuous input current because the initial voltage across the Z-source capacitors is
qZSI shares a common ground with the dc source. The qZSI zero—a huge inrush current flows to the diode Din , Z-source
places a lower voltage stress on capacitors. The ratio between capacitors and charges the capacitors immediately to Vdc /2, as
the dc-link voltage across the inverter bridge, VPN and the input shown in Fig. 3. Then, the Z-source inductors and capacitors
dc voltage Vdc (the boost factor of the classical ZSI and qZSI) resonate, generating the current and voltage spikes.
can be expressed as follows:
VPN 1 1 III. PROPOSED SL-qZSI
B= = = (1)
Vdc 1 − 2(T0 /T ) 1 − 2D Fig. 4 shows the proposed SL-qZSI. It consists of three in-
where T0 is the interval of the shoot-through state during switch- ductors (L1 , L2 , and L3 ), two capacitors (C1 and C2 ), and four
ing period T and D = T0 /T is the duty cycle of each cycle. diodes (D1n , D1 , D2 , and D3 ). The combination of L2 –L3 –
The SL-ZSI [27] obtains high voltage-conversion ratios with a D1 –D2 –D3 acts as a switched-inductor cell. Fig. 4 shows that
very short shoot-through state, which improves the main circuit the proposed topology provides inrush current suppression, un-
output power quality. Fig. 2 shows the SL-ZSI topology. The like the SL-ZSI topology, because no current flows to the main
boost factor of this inverter [27] is increased to: circuit at startup; however, the inductors and capacitors in the
proposed switched-inductor qZSI still resonate. Compared with
1 + (T0 /T ) 1+D
B= = . (2) a conventional continuous-current qZSI, the proposed inverter
1 − 3(T0 /T ) 1 − 3D adds only three diodes and one inductor, and the boost factor
increases from 1/(1 − 2D) to (1+D)/(1 − 2D − D2 ).
Despite this increase in boost inversion, the SL-ZSI has sev-
eral drawbacks: 1) it adds six diodes and two inductors, com-
A. Circuit Analysis
pared with the classical ZSI, which increases size, cost, and loss;
2) it does not share a dc ground point between the source and Like the classical ZSI, the proposed SL-qZSI has extra shoot-
converter; 3) the input current is discontinuous, and it requires a through zero states besides the traditional six active and two zero
NGUYEN et al.: SWITCHED-INDUCTOR QUASI-Z-SOURCE INVERTER 3185

Fig. 4. Proposed SL-qZSI with continuous input current and a common

ground.

Fig. 6. Comparison of the boost ability of different topologies. (1): Proposed

switched-inductor quasi-Z-source inverter, SL-qZSI; (2) classical Z-source in-
verter, ZSI [4]; and (3) switched-inductor Z-source inverter, SL-ZSI [27].

Applying the volt-second balance principle to L2 and L3 from

(4), (5), and (8) obtains:
Fig. 5. Operating states: (a) nonshoot-through and (b) shoot-through state. −D
VL 2 non = VL 3 non = VC 1 + VC 2 (9)
1−D
2D
states. Thus, the operating principles of the proposed inverter VC 2 = VC 1 . (10)
1−D
are similar to those of the classical ZSIs. For the purpose of
analysis, the operating states are simplified into shoot-through Applying the volt-second balance principle to L1 from (3),
and nonshoot-through states. Fig. 5 shows the equivalent circuits (7), and (10), we get
⎧
of the proposed SL-qZSI. ⎪ 1−D
⎪
⎨ VC 1 = 1 − 2D − D2 Vdc
In the nonshoot-through state, as shown in Fig. 5(a), the pro-
posed inverter has six active states and two zero states of the (11)
⎪
⎪ 2D
inverter main circuit. During the nonshoot-through state, Din ⎩ VC 2 = Vdc .
and D1 are on, while D2 and D3 are off. L2 and L3 are con- 1 − 2D − D2
nected in series. The capacitors C1 and C2 are charged, while The peak dc-link voltage cross the inverter main circuit is
the inductors L1 , L2 , and L3 transfer energy from the dc voltage expressed in (6) and can be rewritten as follows:
source to the main circuit. The corresponding voltages across 1+D
L2 and L3 in this state are VL 2 non and VL 3 non , respectively. VPN = VC 1 + VC 2 = Vdc = BVdc . (12)
1 − 2D − D2
We get
The boost factor of the proposed inverter B is defined by

VL 1 = VC 1 − Vdc (3) 1+D 1 + (T0 /T )

B= = . (13)
1 − 2D − D 2 1 − 2(T0 /T ) − (T0 /T )2
VL 2 = VL 2 non = VC 2 − VL 3 non (4)
Fig. 6 shows the boost factor versus duty cycle for different
VL 3 = VL 3 non = VC 2 − VL 2 non (5) topologies, where curves 1, 2, and 3 are drawn by (13), (1), and
VPN = VC 1 + VC 2 . (6) (2), respectively. The boost ability of the proposed SL-qZSI is
higher than that of the classical ZSI [4], and lower than that of
the SL-ZSI [27].
In the shoot-through state, as shown in Fig. 5(b), the inverter side
is shorted by both the upper and lower switching devices of any B. PWM Control for the Proposed SL-qZSI
phase leg. During the shoot-through state, Din and D1 are off,
while D2 and D3 are on. L2 and L3 are connected in parallel. Three basic PWM control methods, simple, maximum [8],
The capacitors C1 and C2 are discharged, while inductors L1 , and constant boost control [9], work with the proposed SL-
L2 , and L3 store energy, obtaining qZSI. These methods are presented in detail in [8] and [9]. The
maximum boost control method serves as an example for the
analysis, simulation, and experiment in this paper. Maximum
VL 1 = −VC 2 − Vdc (7)
boost control turns all traditional zero states into shoot-through
VL 2 = VL 3 = −VC 1 . (8) states to obtain the largest possible duty cycle.
3186 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

Fig. 8. Simplified and unified equivalent circuit of impedance-type power

inverters (i.e., the proposed switched-inductor qZSI, switched-inductor ZSI,
and classical ZSI).

TABLE I
CURRENT AND VOLTAGE STRESSES IN THE SAME M AND V d c CASE

Fig. 7. Voltage conversion ratios versus the modulation index for different
topologies using the maximum boost control method. (1) Proposed switched-
inductor quasi-Z-source inverter, SL-qZSI. (2) Classical Z-source inverter, ZSI
[4]. (3) Switched-inductor Z-source inverter, SL-ZSI [27].

When using the maximum boost control method [8], the aver-
age duty cycle of the shoot-through state (D), as defined in [8],
is
√
T0 2π − 3 3M
D= = . (14)
T 2π
where M is the modulation index.
Substituting (14) into (13), we get the equivalent boost factor
√
1+D 8π 2 − 6 3π · M
B= 2 = √ . (15)
1 − 2D − D −8π 2 + 24 3π · M − 27M 2
The peak value of the phase voltage from the inverter output
can be expressed by
MV PN MBV dc
v̂ph = = . (16)
2 2
and voltage, respectively. Il and Vl are the average current and
The voltage gain (MB) is defined by voltage during a switching cycle in the steady state.
√
v̂ph 8π 2 M − 6 3πM 2 Using the steady-state analysis method in [6] for Fig. 8, we
G= = MB = √ . (17) obtain the voltage and current stresses on the main components,
Vdc /2 −8π 2 + 24 3πM − 27M 2
such as the passive power switch, Din , L, C, and dc link. Using
Fig. 7 shows the voltage conversion ratios versus modulation the maximum boost control method [8], we get the peak value of
indices of different topologies under maximum boost control. the phase voltage v̂ph from the inverter output. Table I compares
Compared with the classical ZSI [4] and using the same mod- the governing equations of the proposed SL-qZSI, the SL-ZSI,
ulation index, the proposed SL-qZSI provides higher voltage and the classical ZSI for the same M and Vdc . Table I shows
boost inversion. Thus, for the same voltage conversion ratio, the that the voltage and current stresses of the proposed SL-qZSI
proposed inverter uses a higher modulation index to improve are lower than those of the SL-ZSI for the same M and Vdc .
the inverter output quality; however, the voltage boost inversion where Ish is the peak shoot-through current across the main
of the proposed SL-qZSI is lower than that of the SL-ZSI [27]. power circuit during the shoot-through state.
When the proposed SL-qZSI replaces a SL-ZSI [27] in a
C. Stress Comparisons with Other ZSI Topologies particular case, Vdc and v̂ph are usually fixed. If we guar-
Differing control and load conditions provide varied stresses antee that the duty cycle in the proposed SL-qZSI is p, the
 be (3 − 3p −
2
of impedance-type power inverters. For comparison, the pro- corresponding
 duty cycle in the SL-ZSI should
posed SL-qZSI, the SL-ZSI, and the classical ZSI are simpli- 9p + 8p − 2p − 8p + 9/2 1 − 2p − p ) to produce the
4 3 2 2

fied, as shown in Fig. 8. The ac side circuit is represented by its same v̂ph from the same Vdc , when using maximum boost con-
simplified equivalent dc load [6]. An inductive load impedance trol. Table II gives the resulting voltage and current stresses of
(Zl = Rl + sLl ) connects directly in parallel with active switch the SL-ZSI and the proposed SL-qZSI. The proposed inverter
S in Fig. 8, where il and vl are the instantaneous load current incurs lower voltage stress on capacitors, lower current stress on
NGUYEN et al.: SWITCHED-INDUCTOR QUASI-Z-SOURCE INVERTER 3187

TABLE II
CURRENT AND VOLTAGE STRESSES FOR THE SAME V d c , v̂ p h , AND R l

Fig. 10. Equivalent circuit of SL-qZSI with two isolated sources.

(a) Nonshoot-through and (b) shoot-through states.

The circuit analysis of the SL-qZSI with two isolated dc

sources is similar to that done in Section III-A. Fig. 10 shows
the equivalent circuits of the SL-qZSI with two isolated dc
sources. In the nonshoot-through state, as shown in Fig. 10(a),
we obtain
VC 1 − Vdc VL 2 + VL 3 = VC 2 − Vdc
VL 1 =
2 2
VPN = VC 1 + VC 2 (18)
IC 1 = Iin1 − ii IC 2 = IL 2 − ii = IL 3 − ii Iin2 = IL 2 .
(19)

In the shoot-through state, as shown in Fig. 10(b), we get

−VC 2 − Vdc −VC 1 − Vdc
VL 1 = VL 2 = VL 3 = (20)
2 2
IC 1 = −Iin2 = −IL 2 − IL 3 IC 2 = −Iin1 . (21)
State-space averaging of equations from (18) to (21), we
obtain
⎧
⎪
⎪ VC 1 = 1 + D2 Vdc
Fig. 9. SL-qZSI with two isolated dc sources. ⎪
⎪
⎪
⎪ 1 − 2D − D 22
⎪
⎪
⎪
⎪ 1 + 2D − D2 Vdc
⎪
⎪
inductors, and lower shoot-through current in comparison with ⎪
⎪ V C 2 =
⎪
⎪ 1 − 2D − D2 2
the SL-ZSI [27] for the same Vdc , v̂ph , and Rl and eliminates ⎪
⎪
⎪
⎪
three diodes and one inductor; thus, it has a less power loss or ⎨V = V + V = 1+D
Vdc = BVdc
PN C1 C2
higher efficiency. 1 − 2D − D2
⎪
⎪
Where VC 1 P , VC 2 P , VPN P , IL P , ID in P , and Ish P are ⎪
⎪ M VPN M BVdc
⎪
⎪
the Voltage of C1 and C2 , the peak dc-link voltage, inductor cur- ⎪
⎪
v̂ph = =
⎪
⎪ 2 2
rent, diode Din current, and shoot-through current, respectively, ⎪
⎪
⎪
⎪ Iin1 = Iin2 = (1 + D) IL 2
of the proposed switched-inductor qZSI. ⎪
⎪
⎪
⎪
⎪
⎪ 1−D
⎩ IL 2 = IL 3 = ii . (22)
D. Embedded ZSI with Two Isolated DC Sources [26] 1 − 2D − D2
The embedded ZSI developed in [26] is built by inserting dc Comparing (22) with (16) shows that one- and two-source SL-
sources into the X-shaped impedance network. Because the dc qZSIs produce the same output voltage gain; however, the C1
sources directly connect to the inductors of impedance network, voltage of the one-source SL-qZSI in Fig. 4 is lower than that
the dc input current in embedded ZSI flows smoothly compared of two-source SL-qZSI in Fig. 9, whereas the C2 voltage of
to that in a traditional ZSI [4]. The embedded ZSI assumes the the one-source inverter is higher than that of the two-source
two sources can produce the same voltage gain as the traditional inverter. The average dc input current of the two inverters is
ZSI. The proposed SL-qZSI can be implemented in the embed- the same; however, the dc input current Iin2 that connects to
ded ZSI [26] that operates with either one or two dc sources. the switched-inductor cell of the two-source inverter, as shown
Fig. 9 shows the proposed SL-qZSI with two isolated dc sources. in Fig. 9, contains more ripple. In the nonshoot-through state,
3188 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

Fig. 11. Simulation results using maximum boost control. (a) SL-ZSI with M = 0.9179 and (b) proposed SL-qZSI with M = 0.8262. From top to bottom: output
line-to-line voltage: v a b ; capacitor voltages: V C 1 , V C 2 ; dc-link voltage: V P N ; input current: Iin ; inductor current: IL 2 ; and shoot-through current: I_shoot.

Iin2 = IL 2 ; in the shoot-through state, Iin2 = 2IL 2 . Thus, the TABLE III
SIMULATION PARAMETERS OF THE SL-ZSI AND THE PROPOSED SL-qZSI
average of Iin2 is (1 + D)IL 2 .

IV. SIMULATION RESULTS

To verify the advantages of the proposed SL-qZSI shown in
Fig. 4, PSIM simulation compares it with the SL-ZSI presented
in [27]. We selected the simulation parameters L1 = L2 = L3 =
1 mH, C1 = C2 = 1000 μF, Lf = 1 mH, Cf = 20 μF, and R =
10 Ω/phase. The initial C1 and C2 values for both inverters were
set to 0 V, the switching frequency was 10 kHz, the input was
48 Vdc , and the output line-to-line voltage was 120 Vrm s . Max-
imum boost control was used. In the simulation, all components
are ideal. Table III provides a list of the simulation parameters
for both inverters.
When using the maximum boost control method for the SL-
ZSI, as shown in [27], M = 0.9179 to produce the output line-
to-line voltage of 120 Vrm s from the 48 V input dc voltage.
Thus, we get D = 0.2409, B = 4.45, G = 4.082, VPN = 215 V,
and VC 1 = VC 2 = 132 V for the SL-ZSI. respectively. From Figs. 11(a) and 12(a) for the SL-ZSI, we
To produce the output line-to-line voltage of 120 Vrm s from can see that capacitor voltage is boosted to 132 V in the steady
the 48 V input dc voltage with maximum boost control for the state, the peak dc-link voltage VPN is boosted to 218 V, the peak
proposed SL-qZSI, according to (17), M = 0.8262. Thus, from shoot-through current I_shoot is 112 A, and huge inrush current
(11)–(17), we obtain D = 0.3167, B = 4.94, G = 4.082, VPN = occurs at startup. The capacitor voltage immediately charges
237 V, VC 1 = 123 V, and VC 2 = 114 V for the proposed SL- from 0 to 24 V and the resonance of the Z-network capacitors
qZSI. and inductors starts. The voltage spikes and current spikes at
Figs. 11 and 12 show the simulation results for the SL-ZSI startup may destroy the devices. From Figs. 11(b) and 12(b) for
and the proposed SL-qZSI when M = 0.9179 and M = 0.8262, the proposed SL-qZSI, the C1 and C2 voltage are boosted to
NGUYEN et al.: SWITCHED-INDUCTOR QUASI-Z-SOURCE INVERTER 3189

Fig. 12. Simulation results for enlarged waveforms in the steady state in Fig. 8. (a) SL-ZSI with M = 0.9179 and (b) proposed SL-qZSI with M = 0.8262.
From top to bottom: capacitor voltages: V C 1 , V C 2 ; dc-link voltage: V P N ; input current: Iin ; inductor current: IL 2 ; and shoot-through current: I_shoot.

122 and 113 V in steady state, respectively, peak VPN is boosted

to 235 V, peak I_shoot is 88 A, and the huge inrush current and
resonance also appear, although they are smaller than that in the
SL-ZSI. The inrush current in the proposed SL-qZSI appears due
to the resonance of the quasi-Z-source inductors and capacitors;
however, the inrush current of the proposed SL-qZSI is lower
than that of the SL-ZSI. As shown in Fig. 11, C1 and C2 in
the SL-ZSI are initially at 24 V, but have no initial value in the
SL-qZSI, as the initial voltage across the Z-source capacitors
is zero and the huge inrush current flows to the diode Din , C1 ,
C2 , and charges the capacitors immediately to 24 V, as shown
in Fig. 3, in the SL-ZSI. Here, C1 and C2 have no initial value
because no current flows to the main circuit at startup. Thus, the
simulation results agree with the theoretical analysis.
As shown in Figs. 11 and 12, producing the same output
line-to-line voltage of 120 Vrm s from the 48 V input dc voltage Fig. 13. Experimental voltage waveforms of the proposed inverter when M =
creates lower capacitor voltage stress and a lower peak shoot- 0.8262, V d c = 48 V. From top to bottom: input dc voltage: V d c (50 V/div.); C 2
voltage: V C 2 (100 V/div.); C 1 voltage: V C 1 (100 V/div.); output line-to-line
through current in the proposed SL-qZSI, compared with the SL- voltage: v a b (250 V/div.). Time: 4 ms/div.
ZSI. However, the peak dc-link voltage (VPN ) in the proposed
inverter is higher than that in the SL-ZSI. This is due to its use
of a lower modulation index (M ). As discussed in [8] and [9],
the ripple in the shoot-through duty cycle produces ripple in V. EXPERIMENTAL VERIFICATIONS
the current through the inductor, as well as in the voltage across We constructed a laboratory prototype based on a
the capacitor. Thus, a small oscillation develops from VC 1 , VC 2 , TMS320F2812 DSP to verify the properties of the proposed
VPN , Iin , IL 2 , and I_shoot. The proposed SL-qZSI uses a higher SL-qZSI. The prototype used the same parameters as in the
shoot-through duty cycle, and Vc 1 and Vc 2 produce significant simulation. To reduce the current in the power circuit, the ex-
oscillation. periment used a 150 Ω/phase resistive load.
3190 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 11, NOVEMBER 2011

Fig. 14. Experimental results on voltage and current stresses of the proposed inverter when M = 0.8262, V d c = 48 V. (a) Time: 2 ms/div. (b) Time: 10 μs/div.
From top to bottom: input current: Iin (5 A/div.); inductor L 2 current: IL 2 (5 A/div.); shoot-through current: I_shoot (10 A/div.); dc-link voltage: V P N (100 V/div.).

VI. CONCLUSION
This paper proposed an SL-qZSI with the following main
characteristics: high boost voltage inversion ability, continuous
input current, and it shares the dc source ground point. Com-
pared with the SL-ZSI, for the same input and output voltage, the
proposed SL-qZSI offers reduced passive component count, re-
duced voltage stress on capacitors, lower shoot-through current,
and lower current stress on inductors and diodes. In addition,
the proposed SL-qZSI can suppress the startup inrush current,
which may destroy the devices.
The experimental results for dc 48 V input and ac 120 Vrm s
line-to-line output verified the high step-up inversion ability;
the simulation and experimental results show that the proposed
inverter has high boost inversion ability. The proposed SL-qZSI
is applicable for fuel cells or photovoltaic applications, where a
Fig. 15. Experimental results of the proposed SL-qZSI without boost when
M = 1, D = 0, V d c = 196 V. From top to bottom: input dc voltage: V d c
low input voltage is inverted to a high ac output voltage.
(100 V/div.); capacitor C 2 voltage: V C 2 (10 V/div.); capacitor C 1 voltage: V C 1
(100 V/div.); and output line-to-line voltage: v a b (250 V/div.). Time: 4 ms/div.
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[2] F. Gao, P. C. Loh, R. Teodorescu, and F. Blaabjerg, “Diode-assisted buck-
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SL-qZSI without boost, which are similar to the traditional volt- source inverter,” IEEE Trans. Power Electron., vol. 22, no. 2, pp. 498–507,
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[6] J. B. Liu, J. G. Hu, and L. Y. Xu, “Dynamic modeling and analysis of Z-
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[7] P. C. Loh, C. J. Gajanayake, D. M. Vilathgamuwa, and F. Blaabjerg,
compared with the classical ZSI. The shoot-through current, “Evaluation of resonant damping techniques for Z-source current-type
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NGUYEN et al.: SWITCHED-INDUCTOR QUASI-Z-SOURCE INVERTER 3191

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IEEE Trans. Power Electron., vol. 22, no. 3, pp. 1005–1013, May 2007. Minh-Khai Nguyen (S’09) was born in Vietnam in
[12] F. Z. Peng, A. Joseph, J. Wang, M. Shen, L. Chen, Z. Pan, E. O. Rivera, 1982. He received the B.S. degree in electrical and
and Y. Huang, “Z-source inverter for motor drives,” IEEE Trans. Power electronics engineering from Ho Chi Minh University
Electron., vol. 20, no. 4, pp. 857–863, Jul. 2005. of Technology, Ho Chi Minh City, Vietnam, in 2005,
[13] Y. Huang, M. Shen, F. Z. Peng, and J. Wang, “Z-source inverter for and the M.S. and Ph.D. degrees in electrical engineer-
residential photovoltaic systems,” IEEE Trans. Power Electron., vol. 21, ing from Chonnam National University, Gwangju,
no. 6, pp. 1776–1782, Nov. 2006. Korea, in 2007 and 2010, respectively.
[14] F. Z. Peng, M. Shen, and K. Holland, “Application of Z-source inverter for Since 2010, he has been a Lecturer at Nguyen Tat
traction drive of fuel cell-battery hybrid electric vehicles,” IEEE Trans. Thanh University, Ho Chi Minh. In 2011, he was a
Power Electron., vol. 22, no. 3, pp. 1054–1061, May 2007. Visiting Researcher at the Biohousing Research In-
[15] S. M. Dehghan, M. Mohamadian, A. Yazdian, and F. Ashrafzadeh, “A stitute, Chonnam National University. His current re-
dual-input–dual-output Z-source inverter,” IEEE Trans. Power Electron., search interests include switched reluctance motor drives, power quality, and
vol. 25, no. 2, pp. 360–368, Feb. 2010. Z-source converters.
[16] J. Anderson and F. Z. Peng, “Four quasi-Z-source inverters,” in Proc.
IEEE PESC’08, Jun. 2008, pp. 2743–2749.
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reduced Z-source capacitor voltage stress and soft-start capability,” IEEE
Trans. Power Electron., vol. 24, no. 2, pp. 409–415, Feb. 2009.
[18] M. K. Nguyen, Y. G. Jung, and Y. C. Lim, “Single-phase ac-ac converter
based on quasi-Z-source topology,” IEEE Trans. Power Electron., vol. 25, Young-Cheol Lim (M’85) was born in Chonnam,
no. 8, pp. 2200–2210, Aug. 2010. Korea, in 1953. He received the B.S. degree in electri-
[19] K. You and M. F. Rahman, “Analytical model of conduction and switching cal engineering from Chonnam National University,
losses of matrix-Z-source converter,” J. Power Electron., vol. 9, no. 2, Gwangju, Korea, in 1975, and the M.S. and Ph.D. de-
pp. 275–287, Mar. 2009. grees from Korea University, Seoul, Korea, in 1977
[20] P. C. Loh, F. Gao, P. C. Tan, and F. Blaabjerg, “Three-level ac–dc–ac Z- and 1990, respectively.
source converter using reduced passive component count,” IEEE Trans. Since 1981, he has been a Professor at Chonnam
Power Electron., vol. 24, no. 7, pp. 1671–1681, Jul. 2009. National University, where he was the Director of
[21] P. C. Loh, F. Gao, F. Blaabjerg, and S. W. Lim, “Operational analysis the Research Center for High-Quality Electric Com-
and modulation control of three-level Z-source inverters with enhanced ponents and Systems from 1998 to 2007. He is the
output waveform quality,” IEEE Trans. Power Electron., vol. 24, no. 7, coauthor of three books. He has authored or coau-
pp. 1767–1775, Jul. 2009. thored more than 200 published technical papers. His current research interests
[22] M. K. Nguyen, Y. G. Jung, and Y. C. Lim, “Single-phase Z-source ac-ac include power electronics, control instruments, and neurofuzzy control.
converter with wide range output voltage operation,” J. Power Electron., Prof. Lim was the President of the Korea Institute of Power Electronics
vol. 9, no. 5, pp. 736–747, Sep. 2009. (KIPE) in 2009. He has been engaged with various academic societies, such
[23] M. K. Nguyen, Y. G. Jung, Y. C. Lim, and Y. M. Kim, “A single-phase as the KIPE, the Korean Institute of Electrical Engineers, and the Institute of
Z-source buck–boost matrix converter,” IEEE Trans. Power Electron., Control, Automation, and Systems Engineers, Korea. He has received a number
vol. 25, no. 2, pp. 453–462, Feb. 2010. of awards, including 2000 KIPE Best Paper Award and 2001 KIPE Academic
[24] H. Cha, F. Z. Peng, and D. W. Yoo, “Distributed impedance network (Z- Award.
network) dc-dc converter,” IEEE Trans. Power Electron., vol. 25, no. 11,
pp. 2722–2733, Nov. 2010.
[25] S. M. D. Dehnavi, M. Mohamadian, A. Yazdian, and F. Ashrafzadeh,
“Space vectors modulation for nine-switch converters,” IEEE Trans.
Power Electron., vol. 25, no. 6, pp. 1488–1496, Jun. 2010.
[26] F. Gao, P. C. Loh, F. Blaabjerg, and C. J. Gajanayake, “Operational analysis
and comparative evaluation of embedded Z-source inverters,” in Proc. Guem-Bae Cho was born in Chonnam, Korea, in
IEEE-PESC’08, 2008, pp. 2757–2763. 1954. He received the B.S. and M.S degrees in elec-
[27] M. Zhu, K. Yu, and F. L. Luo, “Switched-inductor Z-source inverter,” trical engineering from Chosun University, Gwangju,
IEEE Trans. Power Electron., vol. 25, no. 8, pp. 2150–2158, Aug. 2010. Korea, in 1980 and 1982, respectively, and the Ph.D.
[28] C. J. Gajanayake, F. L. Luo, H. B. Gooi, P. L. So, and L. K. Siow, “Extended degree from Kunkuk University, Seoul, Korea, in
boost Z-source inverters,” IEEE Trans. Power Electron., vol. 25, no. 10, 1995.
pp. 2642–2652, Oct. 2010. Since 1985, he has been a Professor in the Depart-
[29] W. Qian, F. Z. Peng, and H. Cha, “Trans-Z-source inverters,” in Proc. ment of Electrical Engineering, Chosun University,
IEEE IPEC-Sapporo2010, Jun. 2010, pp. 1874–1881. where he is currently the Dean of Chosun University
[30] B. Axelrod, Y. Berkovich, and A. Ioinovici, “Switched-capacitor/ College of Engineering. He has authored or coau-
switched-inductor structures for getting transformerless hybrid dc-dc thored more than 100 published technical papers. His
PWM converters,” IEEE Trans. Circ. Syst. I: Fundamental Theory Appl., research interests include power electronics, analysis and control of motor, and
vol. 55, no. 2, pp. 687–696, Mar. 2008. power converter for photovoltaic power system.
[31] M. Zhu, F. L. Luo, and Y. He, “Remaining inductor current phenomena Prof. Cho was the Vice President of the Korea Institute of Power Electronics
of complex dc-dc converters in discontinuous conduction mode: General in 2008. He has been engaged in various academic societies such as the KIPE,
concepts and case study,” IEEE Trans. Power Electron., vol. 23, no. 2, the Korean Institute of Electrical Engineers, and the Korean Solar Energy Soci-
pp. 1014–1019, Mar. 2008. ety, Korea.