III Semester

Course 7: Computer Organization

UNIT – I

Register Transfer Language and Micro Operations: Introduction- Functional units, computer
registers, register transfer language, register transfer, bus and memory transfers, arithmetic, logic
and shift micro-operations, arithmetic logic shift unit.

Basic Computer Organization and Design: Instruction codes, instruction cycle.Register reference
instructions, Memory – reference instructions, input – output and interrupt.

UNIT – II

CPU and Micro Programmed Control: Central Processing unit: Introduction, instruction formats,
addressing modes.Control memory, address sequencing, design of control unit - hard wired
control, micro programmed control.

UNIT – III

Memory Organization: Memory hierarchy, main memory, auxiliary memory, associative memory,
cache Memory and mappings and virtual memory

UNIT – IV

Input-Output Organization: Peripheral Devices, input-output interface, asynchronous

datatransfer,modes of transfer- programmed I/O, priority interrupt, direct memory access, Input –
Output Processor (IOP).

UNIT – V

Computer Arithmetic and Parallel Processing: Data representation- fixed point, floating point,

addition and subtraction, multiplication and division algorithms.

Parallel Processing-Parallel Processing, Pipelining, Arithmetic Pipeline, Instruction Pipeline.

UNIT – I Register Transfer Language and Micro Operations:

Introduction :
Computer Organization is the way in which a system has to structure and It is operational units
and the interconnections between them that achieve the architectural specifications, It is the
realization of the abstract model, and It deals with How to implement the system
OR
Computer Organization is concerned with the way the hardware components operate and the way
they are connected together to form the computer system.
The various components are assumed to be in place and the task is to investigate the
organizational structure to verify that the computer parts operate as intended.

Functional Unit
A computer in its simplest form comprises five functional units namely
1. Input Unit,
2. Output Unit.
3. Memory Unit,
4. Arithmetic & Logic Unit
5. Control Unit.

The functional units of a computer System.

Input Unit: Computer accepts encoded information through input unit. The
standard input device is a keyboard. Whenever a key is pressed, keyboard
controller sends the code to CPU/Memory.
Examples include Mouse, Joystick, Tracker ball, Light pen, Digitizer, Scanner etc.
Memory Unit: Memory unit stores the program instructions (Code), data
and results of computations etc.
Memory unit is classified as:
• Primary /Main Memory
• Secondary /Auxiliary Memory
Primary /Main Memory:
Primary memory is a semiconductor memory that provides access at high speed.
Run time program instructions and operands are stored in the main memory.
Main memory is classified again as ROM and RAM.
ROM :ROM holds system programs and firmware routines such as BIOS, POST, I/O
Drivers that are essential to manage the hardware of a computer.
RAM :RAM is termed as Read/Write memory or user memory that holds run time program
instruction and data. While primary storage is essential, it is volatile in nature and
expensive. Additional requirement of memory could be supplied as auxiliary memory
at cheaper cost.
Secondary memory/Auxiliary Memory
Secondary memory is used when a large amount of data and programs have to be stored for a
longterm basis. It is also known as the Non-volatile memory form of memory, means the data is
stored permanently irrespective of shut down. The most common examples of secondary memory
are magnetic disks, magnetic tapes, and optical disks.
Arithmetic and logic unit: ALU consist of necessary logic circuits like adder,
comparator etc., to perform operations of addition, multiplication, comparison of two
numbers etc.
Output Unit: Computer after computation returns the computed results, error
messages, etc. via output unit. The standard output device is a video monitor,
LCD/TFT monitor. Other output devices are printers, plotters etc.
Control Unit: Control unit co-ordinates activities of all units by issuing control signals.
Control signals issued by control unit govern the data transfers and then appropriate operations
take place. Control unit interprets or decides the
operation/action to be performed.
The operations of a computer can be summarized as follows:
1. A set of instructions called a program reside in the main memory of computer.
2. The CPU fetches those instructions sequentially one-by-one from the main memory,
decodes them and performs the specified operation on associated data operands in
ALU.
3. Processed data and results will be displayed on an output unit.
4. All activities pertaining to processing and data movement inside the computer
machine are governed by control unit.

Computer registers:

Computer registers are high-speed memory storing units. It is an element of the computer processor. It can
carry any type of information including a bit sequence or single data. A register should be 32 bits in length
for a 32-bit instruction computer.
Registers can be numbered relies upon the processor design and language rules.
The instructions in a computer are saved in memory locations and implemented one after another at a
time.
It is necessary to provide a register in the control unit for storing the instruction code after it is read from
memory.
The computer needs processor registers for manipulating data and a register for holding a memory
address.
These requirements dictate the register configuration shown in Figure 2.4.
  The data register (DR) holds the operand read from memory. It holds 16 bits.
 The accumulator (AC) register is a general purpose processing register.
 The instruction read from memory is placed in the instruction register (IR).
 The temporary register (TR) is used for holding temporary data during the processing.
 The memory address register (AR) has 12 bits. The address register holds the address of the
instruction that is to be implemented next from the memory
 The program counter (PC) also has 12 bits and it holds the address of the next instruction to be
read from memory after the current instruction is executed.
 Instruction words are read and executed in sequence unless a branch instruction is encountered. A
branch instruction calls for a transfer to a non-consecutive instruction in the program.
 Two registers are used for input and output.
 The input register (INPR) receives an 8-bit character from an input device.
 The output register (OUTR) holds an 8-bit character for an output device.

REGISTER TRANSFER LANGUAGE: (OR)REGISTER TRANSFER:

 A digital system is an interconnection of digital hardware modules.

 The modules are registers, decoders, arithmetic elements, and control logic.
 The various modules are interconnected with common data and control paths to form a digital
computer system.
  Digital modules are best defined by the registers they contain and the operations that are
performed on the data stored in them.
 The operations executed on data stored in registers are called microoperations.
 A microoperation is an elementary operation performed on the information stored in one or more
registers.
 The result of the operation may replace the previous binary information of a register or may be
transferred to another register.
Examples of microoperations are shift, count, clear, and load.
The internal hardware organization of a digital computer is best defined by specifying:
1. The set of registers it contains and their function.
2. The sequence of microoperations performed on the binary information stored in the registers.
3. The control that initiates the sequence of microoperations.
REGISTER TRANSFER:
1. Information transfer from one register to another is designated in symbolic form by means of a
replacement operator.
2. The statement R2← R1 denotes a transfer of the content of register R1 into register R2.
3. It designates a replacement of the content of R2 by the content of R1.
4. By definition, the content of the source register R 1 does not change after the transfer.
5. If we want the transfer to occur only under a predetermined control condition then it can be shown
by an if-then statement. if (P=1) then R2← R1
6. P is the control signal generated by a control section.
7. We can separate the control variables from the register transfer operation by specifying a Control
Function.
8. Control function is a Boolean variable that is equal to 0 or 1.
9. Control function is included in the statement as P: R2← R1
10. Control condition is terminated by a colon implies transfer operation be executed by the hardware
only if P=1.
11. Every statement written in a register transfer notation implies a hardware construction for
implementing the transfer.
The block diagram that depicts the transfer from R1 to R2.

12. P may go back to 0 at time t+1; otherwise, the transfer will occur with every clock pulse
transition while P remains active.
13. Even though the control condition such as P becomes active just after time t, the actual transfer
does not occur until the register is triggered by the next positive transition of the clock at time t +1.
 The basic symbols of the register transfer notation are listed in below table
BUS AND MEMORY TRANSFERS:
 A digital system composed of many registers, and paths must be provided to transfer information
from one register to another. The number of wires connecting all of the registers will be excessive if
separate lines are used between each register and all other registers in the system.
 A bus structure, on the other hand, is more efficient for transferring information between registers
in a multi-register configuration system.
 A bus consists of a set of common lines, one for each bit of register, through which binary
information is transferred one at a time. Control signals determine which register is selected by the
bus during a particular register transfer.
 The following block diagram shows a Bus system for four registers. It is constructed with the help of
four 4 * 1 Multiplexers each having four data inputs (0 through 3) and two selection inputs (S0 and
S1).
 We have used labels to make it more convenient for you to understand the input-output
configuration of a Bus system for four registers. For instance, output 1 of register A is connected to
input 0 of MUX1.
  The two selection lines S0 and S1 are connected to the selection inputs of all four multiplexers. The
selection lines choose the four bits of one register and transfer them into the four-line common
bus.
 When both of the select lines are at low logic, i.e. S1S0 = 00, the 0 data inputs of all four
multiplexers are selected and applied to the outputs that forms the bus. This, in turn, causes the
bus lines to receive the content of register A since the outputs of this register are connected to the
0 data inputs of the multiplexers.
 Similarly, when S1S0 = 01, register B is selected, and the bus lines will receive the content provided
by register B.
 The following function table shows the register that is selected by the bus for each of the four
possible binary values of the Selection lines.

 A bus system can also be constructed using three-state gates instead of multiplexers.
 The three state gates can be considered as a digital circuit that has three gates, two of which are
signals equivalent to logic 1 and 0 as in a conventional gate. However, the third gate exhibits a high-
impedance state.
 The most commonly used three state gates in case of the bus system is a buffer gate.
 The graphical symbol of a three-state buffer gate can be represented as:

The following diagram demonstrates the construction of a bus system with three-state buffers.
  The outputs generated by the four buffers are connected to form a single bus line.
 Only one buffer can be in active state at a given point of time.
 The control inputs to the buffers determine which of the four normal inputs will communicate with
the bus line.
 A 2 * 4 decoder ensures that no more than one control input is active at any given point of time.

MEMORY TRANSFER:

Most of the standard notations used for specifying operations on memory transfer are stated below.

o The transfer of information from a memory unit to the user end is called
a Read operation.
o The transfer of new information to be stored in the memory is called
a Write operation.
o A memory word is designated by the letter M.
o We must specify the address of memory word while writing the memory transfer
operations.
o The address register is designated by AR and the data register by DR.
o Thus, a read operation can be stated as:

1. Read: DR ← M [AR]

o The Read statement causes a transfer of information into the data register (DR)
from the memory word (M) selected by the address register (AR).
o And the corresponding write operation can be stated as:

1. Write: M [AR] ← R1

o The Write statement causes a transfer of information from register R1 into the
memory word (M) selected by address register (AR).
Arithmetic Micro-operations:
Arithmetic Micro-operations:
The basic arithmetic micro-operations are
I. Addition
II. Subtraction
III. Increment
IV. Decrement
V. Shift
The arithmetic Micro-operation defined by the statement below specifies the add micro-operation.
R3 ← R1 + R2
It states that the contents of R1 are added to contents of R2 and sum is transferred to R3.
To implement this statement hardware requires 3 registers and digital component that performs addition
Subtraction is most often implemented through complementation and addition.
The subtract operation is specified by the following statement
R3 ← R1 + R2’ + 1
instead of minus operator, we can write as
R2’ is the symbol for the 1’s complement of R2
Adding 1 to 1’s complement produces 2’s complement
Adding the contents of R1 to the 2's complement of R2 is equivalent to R1-R2.

Logic Micro-operations:
Logic microoperations specify binary operations for strings of bits stored in registers.
These operations consider each bit of the register separately and treat them as binary variables.
For example, the exclusive-OR microoperation with the contents of two registers RI and R2 is symbolized by
the statement P: R1←R1⊕R2
It specifies a logic microoperation to be executed on the individual bits of the registers provided that the
control variable P = 1.
It determines a logic micro-operation to be implemented on the single bits of the registers supported that
the control variable P = 1.
Consider that each register has four bits. Let the content of R1 be 1010 and the content of R2 be 1100.
The exclusive-OR micro-operation stated above represent the following logic computation –
010 Content of R1
1100 Content of R2
0110 Content of R1 after P = 1

The content of R1, after the implementation of the micro-operation, is similar to the bit-by-bit exclusive-OR
operation on pairs of bits in R2 and previous values of R1.
List of Logic Microoperations:
There are 16 different logic operations that can be performed with two binary variables.
They can be determined from all possible truth tables obtained with two binary variables as shown in Table
4-5.

The 16 Boolean functions of two variables x and y are expressed in algebraic form in the first column of
Table 4-6.
 The 16 logic microoperations are derived from these functions by replacing variable x by the binary
content of register A and variable y by the binary content of register B.
 The logic micro-operations listed in the second column represent a relationship between the binary
content of two registers A and B.
List of some applications:
Selective set: The selective set operation sets to 1 the bits in register A where there are corresponding 1's
in register B. it does not affect bit positions that have 0's in B. the following numerical example clarifies this
operation:

1010 A Before
1100 B (Logic operand)
------
1110 A After
Selective complement: The selective complement operation complements bits in A where there are
corresponding 1's in B. It does not affect bit positions that have 0's in B.

1010 A Before
1100 B (Logic operand)
------
0110 A After
Selective clear: The selective clear operation clears to 0 the bits in A only where there are
corresponding 1's in B.
1010 A Before
1100 B (Logic operand)
------
0010 A After
Masking: The mask operation is similar to the selective-clear operation except that the bits of A are cleared
only where there are corresponding 0's in B. The mask operation is an AND micro operation as seen from
the following numerical example:
1010 A Before
1100 B (Logic operand)
------
1000 A After
Inserting: The insert operation inserts a new value into a group of bits. The is done by
first masking the bits and then ORing them with the required value. For example, suppose
that an A register contains eight bits, 01101010. To replace the four leftmost bits by the
value 1001 we first mask the four unwanted bits:
0110 1010 A Before
0000 1111 B (Logic operand)
------
0000 1010 A After
and then insert the new value:
0110 1010 A Before
1001 0000 B (Logic operand)
------
1001 1010 A After
Shift Microoperations:
 Shift microoperations are used for serial transfer of data.
 The contents of a register can be shifted to the left or the right.
 During a shift-left operation the serial input transfers a bit into the rightmost position.
 During a shift-right operation the serial input transfers a bit into the leftmost position.
 There are three types of shifts: logical, circular, and arithmetic.
The symbolic notation for the shift microoperations is shown in Table 4-7

Logical Shift:
 A logical shift is one that transfers 0 through the serial input.
 The symbols shl and shr for logical shift-left and shift-right microoperations.
 The microoperations that specify a 1-bit shift to the left of the content of register R and a 1-bit shift
to the right of the content of register R shown in table 4.7.
 The bit transferred to the end position through the serial input is assumed to be 0 during a logical
shift.

Circular Shift:
 The circular shift (also known as a rotate operation) circulates the bits of the register around the
two ends without loss of information.
 This is accomplished by connecting the serial output of the shift register to its serial input.
 We will use the symbols cil and cir for the circular shift left and right, respectively.
Arithmetic Shift:
 An arithmetic shift is a microoperation that shifts a signed binary number to the left or right.
 An arithmetic shift-left multiplies a signed binary number by 2.
 An arithmetic shift-right divides the number by 2.
 Arithmetic shifts must leave the sign bit unchanged because the sign of the number remains the
same
 when it is multiplied or divided by 2.

 Arithmetic Logic Shift Unit (ALSU) is a member of the Arithmetic Logic Unit (ALU) in a computer
system. It is a digital circuit that performs logical, arithmetic, and shift operations.
 Rather than having individual registers calculating the micro operations directly, the computer
deploys a number of storage registers which is connected to a common operational unit known as
an arithmetic logic unit or ALU.
 Now, to implement the micro operation, the contents of specified registers are allocated in the
inputs of the common Arithmetic Logic Unit.
 The Arithmetic Logic Unit performs an operation that leads as a result and gets transferred to a
destination register.
 Arithmetic Logic Unit may be a combinatory circuit in order that the complete register transfer
operation from the supply registers through the ALU and into the destination register is performed
throughout one clock pulse amount. Sometimes, the shift micro operations are performed in a
separate unit, but sometimes it is made as a part of full ALU.

One stage of ALSU

We can combine and make one ALU with common selection variables by adding arithmetic, logic, and shift
circuits. We can see the, One stage of an arithmetic logic shift unit in the diagram above. Some particular
micro operations are selected through the inputs S1 and S0.
4 x 1 multiplexer at the output chooses between associate arithmetic output between Ei and a logic output
in Di. The data in the multiplexer are selected through inputs S3 and S2 and the other two data inputs to
the multiplexer obtain the inputs Ai – 1 for the shr operation and Ai + 1 for the shl operation.
Note: The output carry Ci + 1 of a specified arithmetic stage must be attached to the input carry Ci of the
next stage in the sequence.
The circuit whose one stage is given in the below diagram provides 8 arithmetic operations, 4 logic
operations, and 2 shift operations, and Each operation is selected by the 5 variables S3, S2, S1, S0, and Cin.
The below table shows the 14 operations perform by the Arithmetic Logic Unit:
The first 8 are arithmetic operations which are selected by S3 S2 = 00
The next 4 are logic operations which are selected by S3 S2 = 01
The last two are shift operations which are selected by S3 S2 = 10 & 11

Function table of ALSU