BASIC COMPUTER ORGANISATION AND DESIGN
COMPUTER REGISTERS
Registers are a type of computer memory used to quickly accept, store, and
transfer data and instructions that are being used immediately by the CPU. The
registers used by the CPU are often termed as Processor registers.
A processor register may hold an instruction, a storage address, or any data (such
as bit sequence or individual characters).
The computer needs processor registers for manipulating data and a register for
holding a memory address. The register holding the memory location is used to
calculate the address of the next instruction after the execution of the current
instruction is completed.
Following is the list of some of the most common registers used
in a basic computer:
Register Symbol Number of bits Function
Data register DR 16 Holds memory operand
Address register AR 12 Holds address for the memory
Accumulator AC 16 Processor register
Instruction register IR 16 Holds instruction code
Program counter PC 12 Holds address of the instruction
Temporary register TR 16 Holds temporary data
Input register INPR 8 Carries input character
Output register OUTR 8 Carries output character
The following image shows the register and memory configuration for a basic
computer.
The Memory unit has a capacity of 4096 words, and each word contains
16 bits.
The Data Register (DR) contains 16 bits which hold the operand read
from the memory location.
The Memory Address Register (MAR) contains 12 bits which hold the
address for the memory location.
The Program Counter (PC) also contains 12 bits which hold the address
of the next instruction to be read from memory after the current
instruction is executed.
The Accumulator (AC) register is a general purpose processing register.
The instruction read from memory is placed in the Instruction register
(IR).
The Temporary Register (TR) is used for holding the temporary data
during the processing.
The Input Registers (IR) holds the input characters given by the user.
The Output Registers (OR) holds the output after processing the input
data.
COMPUTER INSTRUCTIONS Computer instructions are a set of machine
language instructions that a particular processor understands and executes. A
computer performs tasks on the basis of the instruction provided.
An instruction comprises of groups called fields. These fields include:
The Operation code (Opcode) field which specifies the operation to be
performed.
The Address field which contains the location of the operand, i.e.,
register or memory location.
The Mode field which specifies how the operand will be located.
A basic computer has three instruction code formats which are:
1. Memory - reference instruction
2. Register - reference instruction
3. Input-Output instruction
Memory - reference instruction
In Memory-reference instruction, 12 bits of memory is used to specify an address
and one bit to specify the addressing mode 'I'.
Register - reference instruction
The Register-reference instructions are represented by the Opcode 111 with a 0
in the leftmost bit (bit 15) of the instruction.
Note: The Operation code (Opcode) of an instruction refers to a group of bits that
define arithmetic and logic operations such as add, subtract, multiply, shift, and
compliment.
A Register-reference instruction specifies an operation on or a test of the AC
(Accumulator) register.
Input-Output instruction
Just like the Register-reference instruction, an Input-Output instruction does not
need a reference to memory and is recognized by the operation code 111 with a
1 in the leftmost bit of the instruction. The remaining 12 bits are used to specify
the type of the input-output operation or test performed.
Note
o The three operation code bits in positions 12 through 14 should be equal
to 111. Otherwise, the instruction is a memory-reference type, and the bit
in position 15 is taken as the addressing mode I.
o When the three operation code bits are equal to 111, control unit inspects
the bit in position 15. If the bit is 0, the instruction is a register-reference
type. Otherwise, the instruction is an input-output type having bit 1 at
position 15.
Instruction Set Completeness
A set of instructions is said to be complete if the computer includes a sufficient
number of instructions in each of the following categories:
Arithmetic, logical and shift instructions
A set of instructions for moving information to and from memory and
processor registers.
Instructions which controls the program together with instructions that
check status conditions.
Input and Output instructions
Arithmetic, logic and shift instructions provide computational capabilities for
processing the type of data the user may wish to employ.
A huge amount of binary information is stored in the memory unit, but all
computations are done in processor registers. Therefore, one must possess the
capability of moving information between these two units.
Program control instructions such as branch instructions are used change the
sequence in which the program is executed.
Input and Output instructions act as an interface between the computer and the
user. Programs and data must be transferred into memory, and the results of
computations must be transferred back to the user.
TIMING AND CONTROL
The Control Unit is classified into two major categories:
1. Hardwired Control
2. Microprogrammed Control
Hardwired Control
The Hardwired Control organization involves the control logic to be implemented
with gates, flip-flops, decoders, and other digital circuits.
The following image shows the block diagram of a Hardwired Control
organization.
A Hard-wired Control consists of two decoders, a sequence counter, and
a number of logic gates.
An instruction fetched from the memory unit is placed in the instruction
register (IR).
The component of an instruction register includes; I bit, the operation
code, and bits 0 through 11.
The operation code in bits 12 through 14 are coded with a 3 x 8
decoder.
The outputs of the decoder are designated by the symbols D0 through
D7.
The operation code at bit 15 is transferred to a flip-flop designated by
the symbol I.
The operation codes from Bits 0 through 11 are applied to the control
logic gates.
The Sequence counter (SC) can count in binary from 0 through 15.
Micro-programmed Control
The Microprogrammed Control organization is implemented by using the
programming approach.
In Microprogrammed Control, the micro-operations are performed by executing
a program consisting of micro-instructions.
The following image shows the block diagram of a Microprogrammed Control
organization.
The Control memory address register specifies the address of the micro-
instruction.
The Control memory is assumed to be a ROM, within which all control
information is permanently stored.
The control register holds the microinstruction fetched from the memory.
The micro-instruction contains a control word that specifies one or more
micro-operations for the data processor.
While the micro-operations are being executed, the next address is
computed in the next address generator circuit and then transferred into
the control address register to read the next microinstruction.
The next address generator is often referred to as a micro-program
sequencer, as it determines the address sequence that is read from control
memory.
INSTRUCTION CYCLE
A program residing in the memory unit of a computer consists of a sequence of
instructions. These instructions are executed by the processor by going through a
cycle for each instruction.
In a basic computer, each instruction cycle consists of the following phases:
1. Fetch instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory.
4. Execute the instruction.
Input-Output Configuration
In computer architecture, input-output devices act as an interface between the
machine and the user.
Instructions and data stored in the memory must come from some input device.
The results are displayed to the user through some output device.
The following block diagram shows the input-output configuration for a basic
computer.
The input-output terminals send and receive information.
The amount of information transferred will always have eight bits of an
alphanumeric code.
The information generated through the keyboard is shifted into an input
register 'INPR'.
The information for the printer is stored in the output register 'OUTR'.
Registers INPR and OUTR communicate with a communication interface
serially and with the AC in parallel.
The transmitter interface receives information from the keyboard and
transmits it to INPR.
The receiver interface receives information from OUTR and sends it to
the printer serially.
Design of a Basic Computer
A basic computer consists of the following hardware components.
1. A memory unit with 4096 words of 16 bits each
2. Registers: AC (Accumulator), DR (Data register), AR (Address register), IR
(Instruction register), PC (Program counter), TR (Temporary register), SC
(Sequence Counter), INPR (Input register), and OUTR (Output register).
3. Flip-Flops: I, S, E, R, IEN, FGI and FGO
Note: FGI and FGO are corresponding input and output flags which are
considered as control flip-flops.
1. Two decoders: a 3 x 8 operation decoder and 4 x 16 timing decoder
2. A 16-bit common bus
3. Control Logic Gates
4. The Logic and Adder circuits connected to the input of AC.
MEMORY REFERENCE INSTRUCTIONS
Memory reference instructions are those commands or instructions which are in
the custom to generate a reference to the memory and approval to a program to
have an approach to the commanded information and that states as to from
where the data is cache continually. These instructions are known as Memory
Reference Instructions.
There are seven memory reference instructions which are as follows :
AND
The AND instruction implements the AND logic operation on the bit collection
from the register and the memory word that is determined by the effective
address. The result of this operation is moved back to the register.
ADD
The ADD instruction adds the content of the memory word that is denoted by the
effective address to the value of the register.
LDA
The LDA instruction shares the memory word denoted by the effective address to
the register.
STA
STA saves the content of the register into the memory word that is defined by the
effective address. The output is next used to the common bus and the data input
is linked to the bus. It needed only one micro-operation.
BUN
The Branch Unconditionally (BUN) instruction can send the instruction that is
determined by the effective address. They understand that the address of the
next instruction to be performed is held by the PC and it should be incremented
by one to receive the address of the next instruction in the sequence. If the
control needs to implement multiple instructions that are not next in the
sequence, it can execute the BUN instruction.
BSA
BSA stands for Branch and Save return Address. These instructions can branch a
part of the program (known as subroutine or procedure). When this instruction is
performed, BSA will store the address of the next instruction from the PC into a
memory location that is determined by the effective address.
ISZ
The Increment if Zero (ISZ) instruction increments the word determined by
effective address. If the incremented cost is zero, thus PC is incremented by 1. A
negative value is saved in the memory word through the programmer. It can
influence the zero value after getting incremented repeatedly. Thus, the PC is
incremented and the next instruction is skipped.
INPUT AND OUTPUT INTERRUPT
An interrupt I/O is a process of data transfer in which an external device or a
peripheral informs the CPU that it is ready for communication and requests the
attention of the CPU.
I/O Configuration
The terminals send and receive serial information. Each portion of serial data has
eight bits of alphanumeric code, where the leftmost bit is continually 0. The serial
data from the input register is transferred into the input register INPR. The output
register OUTR can save the serial data for the printer. These two registers interact
with the Accumulator (AC) in parallel and with a communication interface in a
serial structure.
The Input/Output configuration is displayed in the figure. The transmitter
interface gets serial data from the keyboard and sends it to INPR. The receiver
interface gets data from OUTR and transfers it to the printer serially.
The input/output registers include eight bits. The FGI is a 1-bit input flag, which is
a control flip-flop. The flag bit is set to 1 when new data is accessible in the input
device and is cleared to 0 when the data is approved through the device.
When a key is clicked on the keyboard, the alphanumeric code equivalent to the
key is shifted to INPR and the input flag FGI is set to 0. The data in INPR cannot
be modified considering the flag is set. The device tests the flag bit; if it is 1, the
data from INPR is sent in parallel into AC, and FGI is cleared to 0.
The output register OUTR works equivalent to the input register INPR.
The flow of data by the OUTR is the opposite of INPR. Therefore, the output flag
FGO is set to 1 originally. The device tests the flag bit; if it is 1, the data from AC
is sent in parallel to OUTR, and FGO is cleared to 0. The new data cannot be
loaded into OUTR when the FGO is 0 because this condition denotes that the
output device is in the procedure of printing a character.
Input Register
The INPR input register is a register that includes eight bits and influences
alphanumeric input data. The 1-bit input flag FGI is a control flip-flop. When new
data is accessible in the input device, the flag bit is set to 1. It is cleared to 0 when
the data is approved by the device. The flag is needed to synchronize the timing
rate difference between the input device and the computer.
The process of data transfer is as follows −
The input flag FGI is set to 0. When a user clicks any key on the keyboard,
an 8-bit alphanumeric code is transferred into INPR and the input flag FGI
is set to 1.
The device tests the flag bit. If the bit is 1, thus the data from INPR is
transferred to AC and together FGI is cleared to 0.
Then the flag is cleared, new data can be transferred into INPR by
introducing another key.
Output Register
The working of the output register OUTR is equivalent to that of the input
register INPR, therefore the control of data flow is in the opposite.
The procedure of data transfer is as follows −
The output flag FGO is set to 1.
The device tests the flag bit. If the bit is 1, the data from AC is shared to
OUTR and concurrently FGO is cleared to 0.
After that, the output device receives the coded 8-bit data and prints the
matching character.
After this operation is done, the output device sets the FGO to 1.
COMPLETE COMPUTER DESCRIPTION
The complete computer description includes both, the instruction cycle and
the interrupt cycle. Interrupt cycle, because there may arise a case of I/O
operation anytime during normal operation. Instruction cycle, because in
absence of interrupts, the CPU is always busy with stored program instructions.
A flip flop R is used as a condition to determine the type of operation. When
R=0, the instruction cycle continues. Similarly when R=1, the computer goes
through an interrupt cycle.
Here it must be noted that an interrupt is signaled by IEN and R is just to
make it sure that another interrupt does not get entertained while
processing of an interrupt.
DESIGN OF BASIC COMPUTER
A basic computer consists of the following hardware components:
A memory unit of 4096 X 16 bits
Nine Registers- PC, AR, IR, DR, AC, TR, INPR, OUTR and SC
Five Flip-Flops- I, R, IEN, FGI and FGO
Two decoders- a 3 to 8 operation decoder and a 4 to 16 timing decoder
A 16-bit common bus
Control Logic Gates
Arithmetic and Logic Unit connected to AC
Consider the following diagram:COMPLETE COMPUTER DESCRIPTION
DESIGN OF ACCUMULATOR LOGIC
