Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

BACHELOR OF COMPUTER APPLICATIONS

SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

Unit 1: Introduction to Computers 1

Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 1
Introduction to Computers

Table of Contents
SL Topic Fig No / Table / SAQ / Page No
No Graph Activity
1 Introduction - -
4
1.1 Learning Objectives - -
2 Digital and Analog Systems - -
5-7
2.1 Digital and Analog Signals - -
3 Block diagram of a computer hardware 1 - 7-10
4 Generation of Computers - -

4.1 First Generation Computers (1940s- - -

1950s)
4.2 Second Generation Computers (1950s- - -
1960s)
4.3 Third Generation Computers (1960s- - -
11-15
1970s)
4.4 Fourth Generation Computers (1970s- - -
1980s)
4.5 Fifth Generation Computers (1980s- - -
Present)
4.6 Sixth Generation and Beyond (Future - -
Trends)
5 Types of Computers - -

5.1 Based on Size and Processing Power: - -

Supercomputers, Mainframe Computers,
Minicomputers
16-23
5.2 Based on Purpose and Functionality: - -
Personal Computers (PCs), Workstations
5.3 Embedded Systems and IoT Devices - -

5.4 Mobile Devices and Wearables - -

6 Summary - - 24

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7 Self-Assessment Questions - 1 25-26

8 Terminal Questions - - 27
9 Answers - - 27

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1. INTRODUCTION
Computers are now a crucial part of our worldwide community, going beyond country lines,
languages, and different ways of life. From tiny devices, we can hold in our hands to
incredibly strong supercomputers, these extraordinary machines have changed how we talk,
learn, do our jobs, and enjoy ourselves. While we go through this course, you'll see that
knowing about computers is like having a common language that lets you connect with the
world in new and amazing ways. In this unit, students will understand the parts of computers
and digital systems and build a strong base to understand digital signals, look into the pieces
that make computers work, learn about the history of computing, and understand the
different kinds of computers in our world. This knowledge will help students use technology
better and give them opportunities to learn more and create new things.

1.1 Learning Objectives

At the end of this unit, students will be able to
❖ Recall the fundamental definition of a computer.
❖ Differentiate between digital and analog signals.
❖ Describe the basic functions of a computer's hardware and software.
❖ Recall the main characteristics of each computer generation.
❖ Categorize different types of computers.

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

2. DIGITAL AND ANALOG SYSTEMS

An electronic system is a collection of interconnected electronic components that work together
to perform specific functions. These components use electrical signals to process, transmit,
and control information. An electronic system can be designed to operate using either digital
or analog signals, or even a combination of both, depending on the intended application and
requirements.

Analog System:
An analog system is a system that processes, transmits or represents information using
continuous and varying physical quantities. In an analog system, signals can take on a wide
range of values within a certain range. These systems handle tasks involving smoothly
changing data, such as sound, images, and physical measurements. Analog systems are
prevalent in applications like audio devices, radio communication, and analog watches.

Digital System:
A digital system is a system that processes, transmits or represents information using
discrete and distinct values, typically represented as binary digits (0s and 1s). In a digital
system, information is broken down into individual units, making it suitable for precise
calculations, storage, and efficient data manipulation. Digital systems are essential in
modern computing, telecommunications, and electronics, where information is encoded in
binary format to enable efficient processing, transmission, and storage.

Digital and analog signals play a crucial role in making these systems function.

Signals are like messages that carry information from one place to another. They can be sound,
light, or even data that flows through electronic devices.

Electronic systems act as the workforce, while signals serve as their communication medium,
enabling devices to interact and carry out tasks. This interplay lays the foundation for our
technological universe, ensuring that the devices we depend on operate smoothly.

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Types of Signals:

Signals

Analog Digital

Digital Signals and Analog Signals are the two important types of signals that are used to
carry information.

2.1 Digital and Analog Signals

Digital Signals:
Digital signals are discrete, binary representations of information using two distinct
states: 0 and 1. These signals are used by computers and other digital devices to process,
store, and transmit data. Digital signals are less susceptible to noise and interference, making
them more reliable for long-distance communication.

Analog Signals:
Analog signals are continuous waveforms that vary smoothly over time. They represent
information using a range of values. Examples of analog signals include sound waves, radio
waves, and natural phenomena like temperature and pressure. Analog signals can carry a
wide range of data but are more prone to degradation over long distances.

Differences between Digital and Analog Signals

Aspect Digital Signals Analog Signals

Uses continuous values
Representation Uses discrete values (0s and 1s) within a range
Limited precision due to High precision due to
Precision discrete values continuous variation
Noise
More resistant to noise and More susceptible to noise
Resistance interference and interference
Less prone to degradation over Prone to degradation over
Signal Quality long distances long distances

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Can represent a limited range Can represent a wide range

Data Capacity of data values of data values
Audio, video, natural
Digital devices, computers, phenomena, older
Applications modern communication technology

3. BLOCK DIAGRAM OF A COMPUTER HARDWARE

Fig 1: Block Diagram of Computer Hardware

Figure 1 shows the block diagram of a computer system. A block diagram of a computer
displays a structural representation of a computer system.

A Computer system is a combination of three components:

• Input Unit
• CPU
• Output Unit

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Input Unit
CPU Output Unit

i. Input Unit: "Every piece of information that enters the computer is directed through
its input unit. This input unit encompasses various tools such as a mouse, keyboard,
scanner, and more. Essentially, each of these tools serves as an intermediary
connecting users and the computer.

The information destined for processing undergoes entry via the input unit. The computer
welcomes this information in binary code, the raw form. It then undertakes data processing,
ultimately generating the expected outcomes.

The input unit boasts three primary functions:

a. Receive the data that needs processing from the user.
b. Transform the provided data into a format that the machine can understand.
c. Afterward, transfer the converted data into the computer's primary memory. This
process serves the essential role of establishing a link between the user and the
computer, facilitating seamless communication between the two parties.
ii. Central Processing Unit (CPU): The Central Processing Unit (CPU), often referred to
as the computer's brain, functions similarly to the human brain. Just as the human
brain oversees all activities, the CPU governs all operations.

CPU manages both mathematical and logical calculations within the computer.

The CPU comprises two units, namely – ALU (Arithmetic Logic Unit) and CU (Control Unit).
Both units work in sync. The CPU processes the data.

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Two Units of CPU

ALU (Arithmetic
CU (Control Unit)
and Logic Unit)

a. ALU – Arithmetic Logic Unit: The Arithmetic Logic Unit consists of two components:
arithmetic and logic.

This unit carries out two main tasks.

i. Information is inputted through the input unit into the main memory. It then conducts
fundamental mathematical operations, such as addition, subtraction, multiplication,
and division.
ii. These operations encompass various calculations needed for the data. Subsequently,
the results are sent back to storage.

Additionally, this unit is accountable for executing logical functions like AND, OR, and
comparisons (Equal to, less than, etc.). It manages activities such as combining, arranging,
and choosing data from the provided dataset.

b. Control Unit: The control unit, as its name implies, serves as the controller of all tasks
and operations within the computer system. These activities occur within the
computer's internal domain.

The memory unit conveys a series of commands to the control unit. Subsequently, the control
unit translates these commands. These instructions are later transformed into control
signals. These control signals help in prioritizing and scheduling activities. Thus, the control
unit coordinates the tasks inside the computer in sync with the input and output units.

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c. Memory Unit: All information that requires processing or has undergone processing
is kept within the memory unit. The memory unit functions as a central repository for
all data, dispatching it to the appropriate sections of the computer whenever necessary.

The memory unit works in sync with the CPU, leading to faster data retrieval and processing.
This results in tasks being executed with enhanced efficiency and speed.

The two types of Computer memory are:

a. Primary Memory
b. Secondary Memory
a. Primary Memory: Primary memory is a kind of memory that cannot store a vast
amount of data. It is primarily used for storing recent information, which is temporary
in nature. This data might be erased once power is cut off, earning it the titles of
"temporary memory" or "main memory."

One specific type of primary memory is RAM, which stands for Random Access Memory.
This memory is directly accessible by the CPU and serves both reading and writing tasks. For
data to undergo processing, it must first be moved to the RAM and then forwarded to the
CPU.

b. Secondary Memory: It serves the purpose of long-term storage. This is because

primary memory only retains temporary data and isn't intended for prolonged use.
Secondary memory is often referred to as "permanent memory" or "auxiliary
memory." An illustration of secondary memory is the hard disk. Importantly, data
stored in secondary memory remains even in the event of a power outage, ensuring
its persistence.
iii. Output: The output unit is responsible for delivering processed information to the
user after the computer has worked on it. Tools like printers, monitors, and projectors
are all categorized as part of the output unit. The output unit showcases data either
as a digital copy or a physical copy. The printer generates the physical copy, while
the monitor handles the display aspect. The output unit takes in binary-format data
from the computer and transforms it into a format that is understandable to the user.

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4. GENERATION OF COMPUTERS
The concept of "generation of computers" refers to the different phases or stages in the
development of computer technology. Each generation represents a significant advancement
in the design, architecture, and capabilities of computers. These advancements are typically
driven by improvements in electronic components, manufacturing processes, and innovative
ideas.

There are generally considered to be five generations of computers:

• First Generation Computers (1940s-1950s)
• Second-Generation Computers (1950s-1960s)
• Third-Generation Computers (1960s-1970s)
• Fourth Generation Computers (1970s-1980s)
• Fifth Generation Computers (1980s-Present)

Third Fifth
First Second Generation Fourth
Generation
Generation Generation Computers Generation
Computers
Computers Computers Computers
(1960-70) (1980-
(1940-50) (1950-60) (1970-80)
Present)

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4.1 First Generation Computers (1940s-1950s):

The first generation of computers marked the initial steps in the evolution of modern
computing technology. These computers were massive, often filling entire rooms, and were
characterized using vacuum tubes for processing and memory.

Key Features:
• Vacuum Tubes: Computers of this era relied on vacuum tubes to process and store
data. Vacuum tubes were fragile, generated a lot of heat, and were prone to frequent
failures.
• Limited Processing Power: These computers had very limited processing power
compared to modern standards. They could perform basic arithmetic and data
processing tasks.
• Enormous Size: Due to the size of vacuum tubes and other components, first-
generation computers were massive and required specialized environments to operate.
• High Energy Consumption: Vacuum tubes consumed a significant amount of
electricity, leading to high energy costs and heat generation.
• Punched Cards: Input and output were often handled using punched cards, which
contained holes representing data or instructions.

Examples of First-Generation Computers: ENIAC (Electronic Numerical Integrator and

Computer), UNIVAC I (Universal Automatic Computer I), EDVAC (Electronic Discrete
Variable Automatic Computer).

First-generation computers laid the foundation for subsequent generations of computing

technology. They showcased the potential of electronic data processing and inspired further
innovations that led to smaller, faster, and more powerful computers in the years to come.

4.2 Second-Generation Computers (1950s-1960s):

During this era, computers transitioned from using vacuum tubes to transistors for their
internal circuitry. This shift brought about notable improvements in terms of size, speed,
energy efficiency, and reliability. Transistors were more compact, generated less heat, and
required less power than vacuum tubes. This enabled the creation of smaller and more
efficient computing systems.

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Characteristics:
o Transistors: Transistors replaced vacuum tubes as the primary electronic component.
These solid-state devices were more reliable and contributed to the reduction in the
size of computers.
o Smaller Size: Second-generation computers were significantly smaller compared to
their predecessors. This made them more practical for various applications and
allowed them to fit into more constrained spaces.
o Faster Processing: The use of transistors led to improved processing speeds, making
computations faster and more efficient.

Examples: IBM 1401, UNIVAC II, CDC 1604

Second-generation computers were more compact, efficient, and reliable phase. The use of
transistors paved the way for further advancements in subsequent generations, ultimately
leading to the evolution of modern computing systems.

4.3 Third-Generation Computers (1960s-1970s)

During the third generation of computers, significant advancements were made in terms of
technology, design, and capabilities. These computers marked a transition from vacuum
tubes to integrated circuits (ICs), leading to smaller size, increased processing power,
improved reliability, and the ability to support high-level programming languages.

Key Features:
o Integrated Circuits (ICs): The development and use of integrated circuits brought
multiple transistors, resistors, and capacitors onto a single chip of semiconductor
material. This allowed for more compact and efficient designs.
o High-Level Programming Languages: Third-generation computers introduced high-
level programming languages like COBOL, FORTRAN, and BASIC. These languages made
programming more user-friendly and closer to human language.
o Time-Sharing Operating Systems: Time-sharing operating systems enabled multiple
users to interact with a single computer simultaneously, improving resource utilization
and enabling real-time interaction.

Examples of Third-Generation Computers: IBM System/360, DEC PDP-8, CDC 6600

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These third-generation computers were smaller, more reliable, and more powerful than
their predecessors. They played a crucial role in advancing scientific research, business
operations, and computer technology. The introduction of integrated circuits paved the way
for further miniaturization and led to the development of subsequent generations of
computers.

4.4 Fourth Generation Computers (1970s-1980s):

This generation saw the emergence of microprocessors, which are tiny chips that contain
thousands of transistors on a single integrated circuit. Microprocessors brought about a new
era of smaller and more powerful computers, enabling personal computing and enhancing
various applications.

Key Developments:
o Microprocessors: The introduction of microprocessors led to computers becoming
much smaller, more energy-efficient, and faster in processing data.
o Personal Computers (PCs): The fourth generation witnessed the rise of personal
computers, making computing accessible to individuals at home and in offices.
o Graphical User Interfaces (GUIs): GUIs allowed users to interact with computers using
visual elements like icons, windows, and mouse pointers, making computing more
user-friendly.
o Software Development: High-level programming languages became more prevalent,
making software development easier and enabling a broader range of applications.

Examples of Fourth Generation Computers: Apple II (1977), IBM PC (1981), Commodore

64 (1982), Apple Macintosh (1984), IBM AT (1984).

The Fourth Generation of computers brought computing power to the masses through
smaller and more user-friendly systems.

4.5 Fifth Generation Computers (1980s-Present)

Fifth-generation computers represent the current era of computing technology. This
generation is characterized by remarkable advancements in miniaturization, processing
power, and the integration of various technologies.

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Key Features:
▪ Microprocessors: Fifth-generation computers continue to harness the power of
microprocessors, which are incredibly small yet highly efficient chips that process
information at astonishing speeds.
▪ VLSI Technology: Very Large-Scale Integration (VLSI) technology enables the
fabrication of microchips with an immense number of transistors on a single piece of
silicon. This has contributed to the creation of powerful yet compact computing
devices.
▪ Parallel Processing: Fifth-generation computers often employ parallel processing,
where multiple tasks are executed simultaneously, enhancing speed and efficiency.
• Artificial Intelligence (AI): AI is a hallmark of this generation. Computers are now
capable of understanding human language, recognizing patterns, learning from data,
and even making decisions.
• Integration of Technologies: Computers now seamlessly integrate various
technologies such as high-resolution displays, touch interfaces, sensors, and wireless
communication.

Examples: Personal Computers, Smartphones, Tablets, Supercomputers, AI Assistants,

Embedded Systems.

Fifth-generation computers showcase a fusion of high-speed processing, miniaturization, AI

capabilities, and the integration of technologies. These computers are deeply integrated into
our lives, enhancing productivity, communication, and creativity in ways that were once
unimaginable.

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5. TYPES OF COMPUTERS
The types of Computers are categorised based on:
i. Size and Processing Power like Supercomputers, Mainframe Computers, and
Minicomputers.
ii. Purpose and Functionality like Personal Computers (PCs) and Workstations.
iii. Embedded Systems and IoT Devices
iv. Mobile Devices and Wearables

5.1 Based on Size and Processing Power

Based on Size and Processing Power the types of computers are Supercomputers, Mainframe
Computers, and Minicomputers.

a. Supercomputers: Supercomputers are incredibly powerful computers designed for

performing complex calculations and simulations at very high speeds. They are used
for scientific research, weather forecasting, and simulations that require immense
computational power. Supercomputers are the giants of the computing world, both in
terms of physical size and processing power.

Characteristics:
• High Performance: Supercomputers are designed for unparalleled performance,
enabling them to solve complex scientific, engineering, and research problems
efficiently.
• Parallel Processing: They often employ parallel processing, where multiple
processors or cores work together to tackle a problem simultaneously, further
enhancing their computational speed.
• Large-Scale Simulations: Supercomputers excel at running simulations and modeling
scenarios that require extensive calculations, such as weather forecasting, molecular
dynamics, and astrophysics simulations.
• Data-Intensive Tasks: They handle data-intensive tasks like processing and analyzing
large datasets, making them valuable for fields such as genomics, climate modeling, and
particle physics.

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• High Energy Consumption: Due to their immense processing power, supercomputers

consume a significant amount of energy and require advanced cooling systems to
prevent overheating.
• Cutting-Edge Technology: Supercomputers often pioneer the use of new technologies,
from advanced processors to specialized hardware accelerators like GPUs (Graphics
Processing Units).
• Scientific Research: They play a crucial role in advancing scientific research by
allowing researchers to explore complex phenomena, perform simulations, and analyze
massive amounts of data.
• Applications: Supercomputers are used in diverse fields such as weather prediction,
drug discovery, nuclear simulations, aerospace engineering, and cryptography.
b. Mainframe Computers
Mainframes are large and robust computers that manage vast amounts of data and support
multiple users simultaneously. They are commonly used in organizations for critical
applications like financial transactions and large-scale data processing.

Characteristics:
• High Processing Capacity: Mainframes are optimized for high processing capabilities,
enabling them to handle complex calculations, data processing, and transaction
processing for large-scale operations.
• Reliability and Redundancy: Mainframes are known for their high levels of reliability
and redundancy. They are built with redundant components and backup systems to
ensure minimal downtime and data loss.
• Scalability: Mainframes can be scaled up by adding more processors, memory, and
storage to accommodate growing workloads and user demands.
• Secure and Controlled Access: Mainframes offer robust security features to protect
sensitive data. Access to resources and data is tightly controlled, making them suitable
for applications with strict security requirements.
• Centralized Management: Mainframes allow centralized management of resources,
applications, and data. This makes it easier to monitor and maintain large-scale
operations.

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• Batch Processing: Mainframes excel at batch processing, where a series of tasks are
executed without the need for direct user interaction. This is commonly used for
processing large volumes of data, such as payroll calculations.
• Data Handling: Mainframes are used for critical data processing tasks, such as
handling financial transactions, managing customer records, and processing large-
scale data analytics.
c. Minicomputers: Minicomputers are smaller than mainframes but larger than personal
computers. They offer moderate processing power and are suitable for medium-sized
businesses or departments within large organizations.

Characteristics:
• Processing Power: Mini computers provide moderate processing power, making them
suitable for tasks that require more computational strength than personal computers
can offer.
• Multi-User Capability: They support multiple users simultaneously, making them
useful for departments within organizations where several users need to access and
process data concurrently.
• Memory and Storage: Mini computers have greater memory and storage capacity
compared to personal computers, allowing them to handle more complex applications
and larger datasets.
• Reliability and Redundancy: Like mainframes, minicomputers often feature
redundancy and reliability features to minimize downtime. This is important for
organizations that rely on uninterrupted data processing.
• Cost-Effectiveness: Minicomputers provide a balance between processing power and
cost, making them a cost-effective choice for businesses and institutions that require
more capability than personal computers but don't need the scale of mainframes.
• Networking Capabilities: Minicomputers can be integrated into local area networks
(LANs) to facilitate data sharing and communication among multiple users.
• Applications: They are used for tasks such as database management, scientific
simulations, engineering design, and other operations that demand more resources
than personal computers can deliver.

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5.2. Based on Purpose and Functionality

Personal Computers and workstations are the computers that are categorised based on
Purpose and Functionality.

a. Personal Computers: Personal computers (PCs) are versatile computing devices

designed for individual use. They serve a wide range of purposes and offer various
functionalities that cater to both work and leisure activities.

Characteristics:
• Multitasking: PCs can run multiple applications simultaneously, allowing users to
switch between tasks like web browsing, document editing, and multimedia playback.
• Software Compatibility: PCs support a vast range of software applications, from
productivity tools like word processors and spreadsheets to creative software and
entertainment applications.
• Customizability: Users can customize their PCs by adding hardware components such
as memory, storage, and graphics cards to suit their needs and preferences.
• Connectivity: PCs offer various connectivity options, including USB ports, Wi-Fi,
Ethernet, and Bluetooth, enabling users to connect to the internet, external devices, and
networks.
• Operating Systems: PCs run different operating systems, such as Windows, macOS,
and Linux, each offering a unique user interface and software ecosystem.
• Productivity: PCs are widely used for tasks like word processing, data analysis,
programming, graphic design, and video editing.
• Entertainment: PCs provide access to a wide range of entertainment options, including
streaming videos, playing games, listening to music, and browsing the internet.
• Storage: PCs come with varying amounts of internal storage, and users can add
external storage devices to accommodate documents, media files, and applications.
• Upgradability: Users can upgrade components like RAM, storage, and graphics cards
to enhance performance and accommodate changing needs.
• User Interface: PCs feature graphical user interfaces (GUIs) that make them user-
friendly and accessible to individuals with various levels of technical expertise.

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• Portability: PCs come in different form factors, including desktops and laptops,
offering a range of portability options based on user's preferences and requirements.
b. Workstations: Workstations are specialized computers designed to provide high-
performance capabilities for specific tasks, often used by professionals in fields like
design, engineering, and content creation.

Characteristics:
Workstations have distinct characteristics that set them apart from standard personal
computers:
• Performance: Workstations are equipped with high-performance processors, ample
RAM, and advanced graphics cards to handle demanding tasks smoothly.
• Reliability: They are built for reliability, featuring components designed to withstand
continuous operation and heavy workloads.
• Expandability: Workstations often offer multiple expansion slots, allowing users to
add extra memory, storage, and specialized hardware components.
• Optimized Graphics: Advanced graphics capabilities, such as professional-grade GPUs,
ensure smooth rendering and manipulation of high-resolution graphics.
• Ergonomics: Many workstations are designed with ergonomic features, like multiple
monitor support and comfortable input devices, to enhance productivity during long
work hours.
• Operating Systems: Workstations commonly run specialized operating systems like
Windows Pro, Linux distributions, or macOS, tailored for professional applications.
• Security: Workstations may include enhanced security features to protect sensitive
data, which is crucial in professional environments.

5.3. Embedded Systems and IoT Devices

Embedded Systems: Embedded systems are specialized computers integrated into other
devices or systems to control specific functions or tasks. They are designed to perform
dedicated functions and are often hidden within the device they control.

Characteristics:
• Dedicated Functionality: Embedded systems are designed for a specific purpose, such
as controlling the temperature in a thermostat or managing the engine in a car.

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• Compact Size: They are usually compact and have minimal physical components to fit
within the host device.
• Real-time Operation: Many embedded systems operate in real-time, meaning they
must respond quickly to inputs or changes in their environment.
• Energy Efficiency: They are optimized for low power consumption, as they often run
on batteries or other limited power sources.
• Cost-Effectiveness: Embedded systems are cost-effective because they are designed for
specific tasks and don't require the full capabilities of a general-purpose computer.

IoT Devices (Internet of Things):

IoT devices are everyday objects that are embedded with sensors, processors, and
communication capabilities, allowing them to connect to the internet and exchange data.
Characteristics:
• Connectivity: IoT devices can connect to the internet or other devices, enabling them
to communicate and share data.
• Sensors and Actuators: They often have built-in sensors to collect data from the
environment and actuators to perform actions based on that data.
• Data Exchange: IoT devices gather and transmit data, contributing to the overall data
ecosystem and enabling data-driven decisions.
• Remote Control: Many IoT devices can be controlled and monitored remotely through
mobile apps or web interfaces.
• Ubiquity: IoT devices are found in various aspects of life, from smart home devices like
thermostats and doorbell cameras to industrial sensors used in manufacturing and
agriculture.

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5.4. Mobile Devices and Wearables

Smartphones

Mobile Devices

Tablet

New Generation
Devices
Smart Watches

Wearables Fitness Tracker

AR Glasses

Mobile Devices:
Mobile devices are a subset of personal computers that are designed for portability and
convenience. They enable users to perform a wide range of tasks while on the go. The main
categories of mobile devices include smartphones and tablets.

Characteristics of Smartphones:
• Portable and pocket-sized.
• Equipped with high-resolution touch screens.
• Can make calls, send texts, browse the internet, and run various apps.
• Incorporate cameras for photos and videos.
• Typically run on operating systems like iOS or Android.

Characteristics of Tablets are:

• Larger than smartphones, with screen sizes ranging from 7 to 12 inches.
• Suitable for browsing, reading, multimedia consumption, and light productivity tasks.
• Touch screen interface for navigation and interaction.
• Run operating systems similar to those found in smartphones.

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Wearables:
Wearables are a category of computers that are worn on the body and often serve specific
purposes related to health, fitness, communication, or convenience. They are a part of the
emerging Internet of Things (IoT) ecosystem.

Characteristics of Smartwatches are:

• Worn on the wrist like traditional watches.
• Display notifications, time, health data, and often support app functionality.
• Can track fitness metrics, heart rate, and sleep patterns.
• May offer features like GPS, contactless payments, and music playback.

Characteristics of Fitness Trackers are:

• Focus on health and fitness monitoring.
• Track steps, distance, calories burned, and sleep patterns.
• Usually have a compact and lightweight design.
• Sync with smartphone apps to provide detailed activity insights.

Characteristics of Augmented Reality (AR) Glasses are:

• Glasses-like devices that overlay digital information onto the real world.
• Used for applications like navigation, hands-free information display, and interactive
experiences.
• Enable users to see both the physical environment and digital content simultaneously.

Key Characteristics of Mobile Devices and Wearables:

• Portability: Designed to be carried or worn conveniently.
• Connectivity: Usually have wireless capabilities for internet access and data exchange.
• Integration: Often include sensors such as accelerometers, gyroscopes, and GPS for
enhanced functionality.
• User Interface: Utilize touch screens, buttons, and voice commands for interaction.
• App Ecosystem: Rely on app stores to provide a wide range of software applications
and services.

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6. SUMMARY
In the tech world, signals are like messengers for communication. Digital signals use 0s and
1s to send info quickly. Analog signals are smooth waves that show different values. Both are
important for electronic communication and handling data.

Computer parts make digital systems work. The main part, the brain (CPU), does math and
tasks. Memory holds data for a bit, and storage keeps data long-term. Input tools like
keyboards help you use computers, and output tools like screens show results. All these parts
work together to make tech run.

Computers have changed over time. The first used vacuum tubes and the second had smaller
transistors. The third used circuits and the fourth had microprocessors. Now, fifth-gen
computers are super-fast, and smart, and use new tech like IoT.

Different types of computers do different jobs. PCs are for regular stuff like writing and
surfing. Workstations handle tricky graphics and simulations. Servers manage networks,
supercomputers are super powerful, and mainframes handle lots of data. Smartphones and
tablets are portable, and wearables like smartwatches track health. All these computer types
make our digital world go round.

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7. SELF-ASSESSMENT QUESTIONS

SELF-ASSESSMENT QUESTIONS – 1

1. Which type of signal uses discrete values of 0s and 1s to represent

information?
a) Digital Signal
b) Analog Signal
c) Binary Signal
d) Continuous Signal
2. Which hardware component of a computer is responsible for performing
arithmetic and logical operations?
a) RAM
b) Hard Drive
c) CPU (Central Processing Unit)
d) GPU (Graphics Processing Unit)
3. Which hardware component is used to temporarily store data that the CPU
is currently processing?
a) RAM (Random Access Memory)
b) Hard Drive
c) CPU
d) Motherboard
4. What was the primary technology used in the first generation of computers?
a) Transistors
b) Microprocessors
c) Vacuum Tubes
d) Integrated Circuits

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5. The second generation of computers saw an advancement in which

component that replaced vacuum tubes?
a) Transistors
b) Integrated Circuits
c) Microprocessors
d) Memory Cards
6. Which type of computer is known for its ability to perform complex
simulations and calculations at incredibly high speeds?
a) Personal Computer (PC)
b) Mainframe Computer
c) Supercomputer
d) Microcontroller
7. Which of the following is an example of an analog signal?
a) Digital clock display
b) Volume level of a song on a smartphone
c) Binary code in a computer program
d) Website URL
8. What is the primary purpose of RAM (Random Access Memory) in a
computer?
a) Long-term data storage
b) Running the operating system
c) Storing user files
d) Temporary data storage for active programs

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8. TERMINAL QUESTIONS
1. Differentiate between Analog and Digital Signals.
2. With a neat diagram briefly explain the computer hardware components.
3. Elucidate the generation of computers.
4. Explicate the different types of computers.
5. Explain the characteristics of any two Mobile devices and wearables.

9. ANSWERS
Self-Assessment Answers
1. Digital Signal
2. CPU (Central Processing Unit)
3. RAM (Random Access Memory)
4. Vacuum Tubes
5. Integrated Circuits
6. Supercomputer
7. Volume level of a song on a smartphone
8. Temporary data storage for active programs

Terminal Answers
1. Refer to section 2.1
2. Refer to section 3
3. Refer to Section 4
4. Refer to Section 5
5. Refer to Section 5.4

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BACHELOR OF COMPUTER APPLICATIONS

SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Unit 2
Memory and Storage Devices

Table of Contents
SL Topic Fig No / Table / SAQ / Page No
No Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Overview of Memory - 1 4-5
3 Types of Memory - 2

3.1 Primary Memory - -

3.2 Secondary memory 1 - 6-14

3.3 Cache Memory - -

3.4 Flash Memory - -

4 Traditional and Modern Storage Devices 2 3

4.1 Traditional: HDD - -

4.2 Optical Storage: CD, DVD, Blu-ray 3, 4 - 15-31

4.3 Modern: SSD - -

4.4 Removable Storage Devices - -

5 Summary - - 32-33
6 Terminal Questions - - 34
7 Answers - - 34-35

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1. INTRODUCTION
Memory and storage devices are fundamental components of computer systems, each
serving distinct purposes in storing and retrieving digital information.

Memory in a computer is like its short-term, working brain. It is a temporary storage

location for programs and data so that the central processor unit (CPU) can access them
quickly. Memory can be separated into Random Access Memory (RAM) and Read-Only
Memory (ROM). RAM is volatile, which means it loses its contents when the computer is
turned off or restarted. RAM is essential for running applications and the operating system
because it provides fast and easy access to data that the CPU (Central Processing Unit) needs
to perform tasks. ROM is like a computer's permanent memory. It stores the computer's
crucial stuff to start up and do basic things. You can't change or erase what's in ROM easily.
It's like a computer's rulebook that can't be rewritten. Examples of ROM include the
computer's startup instructions (BIOS) and the special software in game consoles.

Storage devices are like a computer's long-term memory or permanent storage. These
devices store data and programs even when the computer is powered off. Storage devices
include hard drives (HDDs) and solid-state drives (SSDs). HDDs use spinning disks to read
and write data, while SSDs use flash memory, offering faster data access and durability.
Additionally, storage can be external, like USB drives, or internal, integrated within the
computer.

The key differences between memory and storage devices are speed and persistence.
Memory is much faster but temporary, while storage is slower but non-volatile, ensuring
data is retained even after the computer is shut down.

1.1 Learning Objectives

At the end of this unit, students will be able to
❖ Define the terms "memory" and "storage device."
❖ Differentiate between RAM and ROM in terms of volatility and purpose.
❖ List common types of storage devices used in computing.
❖ Describe the primary function of RAM in a computer system.

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2. OVERVIEW OF MEMORY
Memory is a crucial component in computing, serving as the digital workspace where data
and instructions are stored and accessed by computers and digital systems. It plays a
fundamental role in operating everything from personal computers and smartphones to
large-scale servers and supercomputers. Two primary types of memory are prevalent in the
computing world: RAM (Random Access Memory) and ROM (Read-Only Memory).

RAM, often referred to as "primary" or "main" memory, is a computer's quick-access, volatile

memory. It is a temporary storage location for data actively processed by the computer's
central processing unit (CPU). This includes running applications, the operating system, and
various temporary files. RAM is prized for speed, allowing for rapid data retrieval and
manipulation. However, it is volatile, meaning its contents are erased when the computer is
powered off or restarted.

On the other hand, ROM, or Read-Only Memory, is a non-volatile memory that retains data even
when the power is turned off. ROM stores firmware and software essential for the computer's
startup and basic operations. Unlike RAM, the data stored in ROM is typically read-only,
making it resistant to accidental modifications. Examples of ROM include the BIOS (Basic
Input/Output System) in a computer, firmware in devices like game consoles, and embedded
system code.

Memory's primary functions encompass data storage, program execution, and the efficient
functioning of an operating system. It enables computers to load and execute programs,
manage hardware resources, and provide users with a seamless computing experience.
Additionally, memory plays a pivotal role in system performance, with the amount and speed
of RAM directly impacting a computer's multitasking capabilities and data access speeds.
Moreover, RAM is a mediator between storage devices (such as hard drives or SSDs) and the
CPU, temporarily caching frequently used data to expedite processing and reduce latency.

Roles of Memory:
• Data Storage: Memory stores digital data, which the CPU can access and process. RAM
temporarily holds actively used data, while ROM contains critical instructions for the
computer's operation.

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• Program Execution: When you run a program or application on your computer, it is

loaded into RAM. The CPU can then access and execute the program's instructions
directly from RAM, much faster than fetching data from storage devices like hard
drives.
• Operating System Functionality: When you start your computer, the operating
system is loaded into RAM. This allows it to manage hardware resources efficiently and
provide a user interface. RAM plays a crucial role in ensuring the smooth operation of
the OS.
• System Performance: The amount and speed of RAM can significantly impact a
computer's performance. More RAM allows for smoother multitasking and faster data
access, while faster RAM enhances overall system speed.
• Data Exchange: RAM acts as a bridge between storage devices (like hard drives or
SSDs) and the CPU. It caches frequently used m storage, reducing the time it takes for
the CPU to access that data.

SELF-ASSESSMENT QUESTIONS – 1

1. What is the primary function of computer memory?

a) Execute instructions
b) Store and retrieve data
c) Control input devices
d) Display output
2. Which of the following is considered volatile memory?
a) RAM
b) ROM
c) Hard Drive
d) Flash Drive

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3. TYPES OF MEMORY
Several types of memory are used in computing, each serving a specific purpose within a
computer system. Here are the main types of memory:
• Primary Memory
• Secondary memory
• Cache Memory
• Flash Memory

3.1 Primary Memory

Primary memory, also known as main memory or RAM (Random Access Memory), is a
fundamental component of a computer's hardware architecture. It is a type of volatile
computer memory that provides high-speed storage for data and program instructions
actively used by the central processing unit (CPU) during computer operations.

Properties of Primary Memory:

1. Volatile: Primary memory is volatile, i.e., its contents are lost when the computer is
powered off or restarted. This characteristic is essential for its role as temporary
storage.
2. High-Speed Access: Primary memory offers rapid data access and retrieval, making it
ideal for storing data that the CPU needs to work with quickly.
3. Directly Accessible: The CPU can directly access and interact with data stored in primary
memory, enabling efficient program execution and data manipulation.

Characteristics of Primary Memory:

1. Limited Capacity: Primary memory has a relatively limited storage capacity compared
to secondary storage devices like hard drives or SSDs. This limitation necessitates
careful management of the data stored in RAM.
2. Speed: Primary memory is high-speed, with read and write speeds that significantly
surpass those of secondary storage devices. This speed ensures that the CPU can
quickly access data and execute instructions.
3. Temporary Storage: Data stored in primary memory is temporary and volatile. It serves
as a workspace for the CPU to perform immediate tasks, and its contents are typically
overwritten as new data is processed.

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Types of Primary Memory:

There are two primary types of primary memory:

Primary
Memory

RAM ROM

a. Random Access Memory (RAM): RAM, which stands for Random Access Memory, is a
crucial component of a computer's hardware architecture. It is a type of volatile
computer memory that provides high-speed, temporary storage for data and program
instructions actively used by the central processing unit (CPU) during computer
operations. RAM serves as the computer's working memory, allowing it to access and
manipulate data quickly.

There are two primary types of primary memory:

RAM

DRAM SRAM

1. DRAM (Dynamic Random Access Memory): DRAM is the most common type of primary
memory in modern computers. It stores data as electrical charges in capacitors and
requires periodic refreshing to maintain data integrity. DRAM is known for its speed
but is less power-efficient than other types.
2. SRAM (Static Random Access Memory): SRAM is faster and more power-efficient than
DRAM but is more expensive to manufacture. It uses flip-flops to store data and does
not require refreshing. SRAM is often used in cache memory due to its high speed.
b. Read Only Memory (ROM):

While ROM is often associated with non-volatile memory, it can be considered primary
memory because it stores firmware and software essential for a computer's operation, such
as the BIOS (Basic Input/Output System).

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Advantages of Primary Memory:

1. High Speed: The primary advantage of primary memory is its speed. It allows the CPU
to access data and execute instructions quickly, leading to faster program execution
and improved system performance.
2. Direct Access: Primary memory is directly accessible by the CPU without requiring time-
consuming mechanical or electronic processes, as seen in secondary storage devices.
3. Critical for Multitasking: More primary memory enables efficient multitasking, as the
computer can seamlessly store and switch between multiple running applications and
data sets.

Disadvantages of Primary Memory:

1. Limited Capacity: Primary memory has a limited storage capacity compared to
secondary storage, meaning it can only hold a certain amount of data at a given time.
This limitation may lead to the need for careful resource management.
2. Volatility: The volatile nature of primary memory means that data is lost when the
computer is powered off or restarted. Therefore, it cannot be used for permanent data
storage.
3. Cost: High-capacity primary memory modules can be expensive, and increasing RAM
capacity often involves upgrading hardware, which can be costly.

3.2 Secondary Memory

Secondary memory, or auxiliary memory or storage, is a crucial component in a computer's
hardware configuration. It is a non-volatile form of computer memory used for long-term data
storage and retention, distinct from primary memory (RAM) that provides temporary, high-
speed storage. Some are Floppy disks, Fixed (hard) disks, Optical disks, etc.

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Fig 1: Secondary Memory Devices

Properties of Secondary Memory:

1. Non-Volatile: One of the primary properties of secondary memory is its non-volatile
nature, meaning it retains data even when the computer is powered off or restarted.
This makes it suitable for long-term data storage.
2. Large Capacity: Secondary memory typically offers larger storage capacities than
primary memory (RAM). It can store vast amounts of data, including operating systems,
software applications, documents, multimedia files, etc.
3. Slower Access: Secondary memory is slower regarding data access and retrieval than
primary memory. The access times are affected by factors such as the storage medium's
speed and technology.

Characteristics of Secondary Memory:

1. Long-Term Storage: Secondary memory is used for the permanent or semi-permanent
storage of data, as opposed to primary memory, which stores data temporarily during
active computer operations.
2. Multiple Storage Devices: There are various types of secondary memory devices, each
with its own characteristics and use cases. These include hard disk drives (HDDs),
solid-state drives (SSDs), optical discs (e.g., CDs, DVDs, Blu-rays), USB flash drives, and
network-attached storage (NAS).

Advantages of Secondary Memory:

1. Large Storage Capacity: Secondary memory devices offer ample storage space for
various types of data, from documents to multimedia files.
2. Data Retention: Data stored in secondary memory is preserved even when the
computer is turned off, making it suitable for long-term storage and backup.
3. Diverse Options: There is a wide range of secondary memory devices, allowing users to
select the storage solution that best suits their needs.

Disadvantages of Secondary Memory:

1. Slower Access Times: Secondary memory is slower than primary memory (RAM),
leading to longer loading times for applications and data retrieval.

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2. Higher Cost per Gigabyte: High-capacity, high-speed secondary memory devices, such
as SSDs, can be relatively expensive compared to traditional HDDs.
3. Physical Vulnerability: Some secondary memory devices, like HDDs, are susceptible to
physical damage due to their mechanical components, making them less reliable in
certain situations.

Examples of Secondary Memory:

• Hard Disk Drives (HDDs): These are commonly found in desktop and laptop computers.
• Solid-State Drives (SSDs): Often used in modern laptops and desktops for improved
performance.
• Optical Discs: Examples include CDs, DVDs, and Blu-ray discs for storing media and
software.
• USB Flash Drives: Portable, compact storage devices for data transfer and backups.
• Network-Attached Storage (NAS): Specialized storage devices used in homes and offices
for shared data access and backup.

3.3 Cache Memory

Cache memory is a high-speed volatile computer memory that serves as a buffer between the
central processing unit (CPU) and the slower main memory (RAM). It stores frequently
accessed data, instructions, and program segments, aiming to expedite CPU operations by
providing rapid access to this commonly used information.

Properties of Cache Memory:

1. High-Speed Access: Cache memory is designed for extremely fast read and write
operations. It operates at speeds that are comparable to or even faster than the CPU's
processing speed.
2. Small Capacity: Cache memory has a relatively limited storage capacity compared to
main memory (RAM). It holds a subset of data from RAM that is likely to be accessed
soon.
3. Volatile: Like main memory, cache memory is volatile, which means its contents are lost
when the computer is powered off or restarted.

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Characteristics of Cache Memory:

1. Hierarchy: Computer systems often have multiple levels of cache, including L1 (Level
1), L2 (Level 2), and sometimes L3 (Level 3) caches. The L1 cache is the closest to the
CPU and typically the smallest but fastest, while the L3 cache, if present, is larger but
farther away from the CPU.
2. Automatic Management: Cache memory is managed automatically by both hardware
and software. Cache management algorithms determine what data to store in the cache
and when to replace it.

Types of Cache Memory:

1. L1 Cache: L1 cache, also known as primary cache, is the smallest and closest to the CPU.
It provides the fastest access to frequently used data and instructions.
2. L2 Cache: L2 cache, often referred to as secondary cache, is larger than L1 cache and is
situated between L1 cache and RAM in terms of both capacity and speed.
3. L3 Cache: Some systems have an additional level of cache known as L3 cache. L3 cache
is larger than L2 cache but slightly slower in terms of access speed. It serves as a shared
cache for multiple CPU cores in multi-core processors.

Advantages of Cache Memory:

1. Speed Enhancement: Cache memory significantly improves CPU performance by
reducing the time the CPU spends waiting for data to be fetched from slower main
memory (RAM).
2. Efficient Data Access: By storing frequently used data in cache, the CPU can access this
data more quickly, leading to faster program execution and improved overall system
responsiveness.
3. Power Efficiency: Cache memory helps reduce power consumption because it allows the
CPU to access data more rapidly, minimising idle periods and power-intensive memory
accesses.

Disadvantages of Cache Memory:

1. Limited Capacity: Cache memory has limited capacity compared to main memory,
which means it can only hold a subset of data. This limitation can result in cache

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"misses," where the required data is not present in the cache, leading to slower access
times.
2. Cost: High-speed cache memory is more expensive to manufacture than standard RAM,
contributing to the overall cost of computer systems.

Examples of Cache Memory:

• CPU Cache: Most modern CPUs, including those in desktops, laptops, and servers, have
dedicated cache memory at various levels, such as L1, L2, and L3 caches.
• Web Browsers: Web browsers often use cache memory to store frequently accessed
web page elements (images, scripts, stylesheets) to reduce load when revisiting
websites.
• Operating System Cache: Operating systems may employ cache memory to store
frequently accessed system files and data, enhancing overall system performance.

3.4 Flash Memory

Flash memory is a type of non-volatile computer storage that can be electrically erased and
reprogrammed. It is a semiconductor memory that retains data even when the power is turned
off. Flash memory is widely used in various electronic devices, including USB drives, solid-
state drives (SSDs), memory cards, and mobile devices.

Properties of Flash Memory:

1. Non-Volatile: Flash memory is non-volatile, meaning it retains data without power. This
property is essential for long-term data storage.
2. Electrically Erasable: Unlike other forms of non-volatile memory, flash memory can be
erased and reprogrammed electrically, making it flexible for data changes.
3. Fast Read Access: Flash memory offers fast read access times, making it suitable for
quick data retrieval.

Characteristics of Flash Memory:

1. Block-Based Storage: Flash memory is organised into blocks, each of which can be
independently read, erased, or programmed. This block-based structure affects how
data is managed and stored in flash memory.
2. Limited Write Cycles: Flash memory has a finite number of write/erase cycles before it
wears out. Modern flash memory is designed with wear-levelling algorithms to

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distribute write/erase cycles evenly across memory cells, extending the lifespan of the
device.

Types of Flash Memory:

1. NAND Flash: NAND flash memory is the most common type of flash memory used in
storage devices like SSDs, USB drives, and memory cards. It is known for its high
capacity and relatively lower cost per gigabyte.
2. NOR Flash: NOR flash memory is commonly used for firmware storage, such as BIOS in
computers and firmware in embedded systems. It offers faster random-access times
but is less dense and more expensive than NAND flash.

Advantages of Flash Memory:

1. Speed: Flash memory provides quick read access times, which leads to faster boot-up
times and application loading.
2. Durability: Flash memory is robust and durable because it has no moving parts, making
it less susceptible to physical damage.
3. Low Power Consumption: Flash memory consumes less power compared to traditional
hard disk drives (HDDs), making it ideal for battery-powered devices.
4. Compact Form Factor: Flash memory is available in small form factors, making it
suitable for compact devices like smartphones and tablets.

Disadvantages of Flash Memory:

1. Limited Write Cycles: Flash memory has a finite number of write/erase cycles before it
wears out. This can be a concern in high-write-intensive applications.
2. Cost: Flash memory tends to be more expensive per gigabyte than HDDs for high-
capacity storage.
3. Performance Degradation: Over time, flash memory cells can wear out, leading to
decreased performance and the need for wear-levelling algorithms.

Examples of Flash Memory:

1. Solid-State Drives (SSDs): SSDs use NAND flash memory to store data, providing faster
data access and better durability than traditional HDDs.
2. USB Drives: USB flash drives, or thumb drives, are popular portable storage devices
that use flash memory for data storage.

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3. Memory Cards: Compact flash (CF), Secure Digital (SD), and microSD cards are common
flash memory formats used in cameras, smartphones, and other portable devices.
4. Embedded Systems: Flash memory stores firmware in smartphones, tablets, GPS
devices, and gaming consoles.

SELF-ASSESSMENT QUESTIONS – 2

3. Which memory type is used to temporarily store frequently accessed data for
faster processing?
a) Primary Memory
b) Secondary Memory
c) Cache Memory
d) Flash Memory
4. State true or false: Flash memory is non-volatile
5. _________________ is faster and more power-efficient than DRAM but is more
expensive to manufacture

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4. TRADITIONAL AND MODERN STORAGE DEVICES

Storage devices are the foundation of data management in modern computing. Over the
years, these devices have evolved significantly, leading to the distinction between traditional
and modern storage solutions. Each category offers distinct characteristics, advantages, and
disadvantages, catering to diverse computing needs.

Traditional Storage Devices encompass older technologies widely used for data storage.
This category includes Hard Disk Drives (HDDs), Optical Discs (CDs, DVDs, Blu-rays), and
Magnetic Tape. These devices rely on mechanical components or optical technology to read
and write data. They have served as reliable workhorses for data storage, particularly in
archival and backup scenarios. However, traditional storage devices are often slower, less
durable, and have limited storage capacity.

In contrast, Modern Storage Devices represent the latest innovations in data storage
technology. Solid State Drives (SSDs) and NVMe SSDs, for instance, utilise NAND flash
memory and have no moving parts. This leads to significantly faster data access times,
enhanced durability, and suitability for primary storage in laptops and desktops. Cloud
storage, another modern solution, leverages remote servers accessible via the Internet,
offering scalability, flexibility, and accessibility from anywhere. Hybrid and tiered storage
systems combine HDDs and SSDs to optimise speed and cost-effectiveness.

4.1 Traditional: HDD

How do Hard Disk Drives (HDDs) Work?
Hard Disk Drives (HDDs) are a fundamental component of modern computing, providing
long-term data storage for laptops and desktop computers. They are classified as non-
volatile storage devices, meaning they can retain data even when the power is turned off.

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Fig 2: Heads and platters of Hard disk.

HDDs work through a complex interplay of mechanical and magnetic components as shown
in Figure 2.

1. Platters: HDDs consist of circular discs known as platters, typically made of aluminium
or glass. These platters are coated with a magnetic material, which allows data to be
stored in binary format (1s and 0s) through magnetic charges.
2. Actuator Arm and Read/Write Head: Each platter has an actuator arm with a
read/write head mounted on it. These heads are responsible for reading data from and
writing data to the platters. The CPU and motherboard instruct the actuator arm and
heads on where to move the platters to access specific data.
3. Sectors: The platters are divided into sectors, which are small, fixed-size data storage
units. Each sector can hold thousands of individual bits, each of which can be
magnetised to represent a 1 or 0.

Data Storage Process:

o When data is written to an HDD, the CPU divides it into sectors and instructs the
appropriate read/write head to position itself over the correct track on the platter.
o The read/write head then magnetises the bits in the sector to store the data.
o When data needs to be read, the read/write head reads the magnetic charges on the
platter's surface, converting them into binary data (1s and 0s) for the CPU to process.

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Evolution of HDD Technology:

1. Longitudinal Recording: In the early days of HDD development, hard drives used
longitudinal recording, where sectors were aligned horizontally on the platter's
surface. However, as hard drive capacity increased, shrinking these sectors caused
problems like random bit flips due to temperature fluctuations, leading to data
corruption.
2. Perpendicular Recording: To address these issues, "perpendicular recording" was
introduced. This method stacks sectors on their ends, significantly increasing storage
capacity. However, it also made HDDs more sensitive to magnetic fields, necessitating
more accurate read/write arms.

Disk Fragmentation:
• As data is written and updated on an HDD, it is stored in sectors scattered across the
platter.
• This can lead to "disk fragmentation," where related data for a program is not stored
sequentially, causing slower data access times.
• Operating systems typically include built-in tools to defragment the disk, rearranging
data for improved performance.

Benefits of HDDs:
1. Capacity: HDDs have continuously increased in capacity over the years and can now
provide storage capacities of up to 20 terabytes for commercial use.
2. Performance: HDDs have improved processing speeds, making them suitable for
various computing tasks.
3. Lifespan/Durability: HDDs are known for their reliability in long-term data storage,
with an internal hard drive spanning 3 to 5 years under constant use.
4. Portability: External portable hard drives allow for easy data transfer between devices
and are commonly used for backups.
5. Price: HDDs remain the most cost-effective storage solution, with competitive prices
per gigabyte.

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Despite the rise of Solid-State Drives (SSDs), HDDs play a crucial role in data storage due to
their affordability and reliability, making them suitable for various applications, from
personal computing to data backup and archival storage.

4.2 Modern: SSD

Solid State Drives (SSDs) are a fundamental component of modern computing, providing
significant advantages over traditional Hard Disk Drives (HDDs). In this explanation, we will
delve into how SSDs work and highlight their benefits.

How SSDs Work:

1. Non-Volatile Memory (NVM): SSDs use non-volatile memory, which means they can
store data without power. This contrasts with HDDs that rely on spinning disks and
mechanical components to manipulate data. In SSDs, data is stored in integrated
circuits, reducing their size and making them silent during operation.
2. Charge in Semiconductors: Instead of relying on moving parts, SSDs use charge in
semiconductors to store and retrieve data. These semiconductors store data in
"blocks," which can be written fully only once. To maintain data integrity and low
response times, SSDs must erase and rewrite the entire block when changes are
needed. This process, while efficient, causes wear on the SSD over time.
3. Wear-Levelling Technology: Most SSDs come equipped with wear-levelling technology.
This technology evenly distributes wear and extends the lifespan by managing how
data is written and erased.
4. NAND Flash Memory: SSDs contain NAND flash memory composed of non-volatile
NAND transistors. Data is stored as a charge in semiconductors on silicon memory
chips. Some SSDs use 3D NAND technology, where memory cells are stacked on each
other, allowing greater storage capacities.
5. Controllers: Controllers are crucial in managing the flash memory cells. They instruct
the cells on which memory to access or manipulate. Controllers are also responsible for
data distribution and garbage collection, which helps maintain SSD performance.

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6. Caching: SSDs often cache requested data to provide quicker response times, similar to
RAM modules. This caching process is highly desirable compared to caching requests
from HDDs, which have slower response times.
7. Power Efficiency: SSDs consume less power than HDDs because they lack moving
components. They also rely on constant power from the host device to function. While
unpowered SSDs can lose data when not connected to power, many SSDs come with
built-in batteries that allow the device to idle and maintain data integrity.

Advantages of SSDs:
1. Speed: SSDs offer significantly faster read, write, and boot times compared to
traditional HDDs, leading to improved overall system performance.
2. Durability: Since SSDs lack moving parts, they are more resistant to physical shock and
vibration, making them more durable.
3. Silent Operation: SSDs operate silently, contributing to a quieter computing
environment.
4. Energy Efficiency: They consume less power, which results in longer battery life for
laptops and lower electricity bills for desktops.
5. Compact Size: SSDs are compact and lightweight, ideal for laptops and portable devices.
6. Reliability: With no mechanical parts, SSDs are less prone to mechanical failures, such
as head crashes in HDDs.

4.3 Optical Storage: CD, DVD, Blu-ray

Optical Storage Devices, often referred to as Optical Media or Optical Memory, are a class of
storage devices that utilise low-power laser beams to store and retrieve data electronically.
These devices are known for storing digital information efficiently and reliably.

Optical storage devices are a significant class of data storage technology that uses low-power
laser beams to read and write data. Developed by Philips and Sony in 1982 during the fourth
generation of computers, optical storage has revolutionised data storage by offering durable
and relatively immune data storage options. Optical storage is characterised by its ability to
store and retrieve data electronically with the help of laser beams.

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Basic Technology of Optical Storage:

• Optical storage relies on the principle of laser light reflection and absorption.
• The data is stored in tiny pits and lands on the surface of an optical disc, as shown in
Figure 3.
• The substrate, typically polycarbonate material, contains these pits and lands. Pits are
depressions on the surface, while lands are flat areas.
• A thin reflective layer, often aluminium, is placed on the substrate.
• A low-power laser beam is focused on the reflective layer. When the laser beam
encounters a pit, it is weakly scattered (low intensity). In contrast, when it encounters
land, it is strongly reflected (high intensity).
• The intensity of the reflected laser beam is used to determine the presence or absence
of pits, which translates into binary data (1s and 0s).

Fig 3: Schematic representation of lands and pits and resulting signal

Types of Optical Storage Media:

The types of Optical Storage Media are:
i. Compact Disc (CD)
ii. Digital Video Disc (DVD)

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iii. Blu-ray Disc

Optical Storage Media

Compact Disc (CD)

Digital Video Disc

(DVD)

Blu-ray Disc

Fig 4: CD, DVD, Blue-Ray

i. Compact Disc (CD): A Compact Disc, often called CD, is a widely used optical storage
medium that stores digital data. CDs are known for their durability, reliability, and
ease of use. Here, I'll explain the various aspects of a Compact Disc in detail:
a. Physical Characteristics:
• Diameter: A standard CD has a diameter of 12 centimetres (about 4.7 inches), making
it a compact and easily recognisable optical disc.
• Thickness: CDs typically have a thickness of 1.2 millimetres.
• Layers: A CD consists of multiple layers, including a polycarbonate substrate, a
reflective layer, and a protective top layer.

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b. Data Storage: Compact Discs are primarily used for digital data storage. They employ
pits and lands to store binary data (0s and 1s). Here's how it works:
• Pits: Pits are tiny depressions or indentations on the surface of the CD. These pits
represent binary 0s.
• Lands: Lands are the flat areas between the pits and represent binary 1s.
• Laser Reading: To read data from a CD, a low-intensity laser beam is directed onto
the disc's surface. When the laser encounters a pit, it is scattered and reflected
weakly, indicating a binary 0. When it encounters a land, it is strongly reflected,
indicating a binary 1.
• Digital Data: The sequence of pits and lands along a spiral track on the CD's surface
represents digital data, including audio, video, or other types of information.
c. Types of Compact Discs:

CD-
Audio

CD-DA CD-ROM
Types of
Compact Discs

CD-RW CD-R

• CD-Audio: These are standard audio CDs that store music and can be played on CD
players and audio devices.
• CD-ROM (Read-Only Memory): These CDs contain data that can be read but not
modified. They often include software, games, or multimedia content.
• CD-R (Recordable): CD-Rs allow users to write data onto the disc once, but the data
cannot be altered or erased after recording.

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• CD-RW (Rewritable): CD-RWs are rewritable CDs, meaning users can write, erase,
and rewrite data on them multiple times.
• CD-DA (Digital Audio): Similar to CD-Audio, these discs contain digital audio data but
may have different formatting.
d. Uses of Compact Discs:
• Audio Playback: CDs are widely used for music albums, audiobooks, and other audio
recordings.
• Software Distribution: CD-ROMs distribute software, games, and applications.
• Data Backup: CD-Rs and CD-RWs are used for data backup and archiving.
• Video: Some CDs store video content, especially in the VCD (Video CD) format.
• Mixed media: CDs can combine audio, video, and data, making them versatile for
various applications.
ii. Digital Video Disc (DVD):
A Digital Video Disc, commonly known as DVD, is a versatile and widely used optical storage
medium. DVDs have played a pivotal role in the entertainment and data storage industries
due to their higher capacity compared to CDs and their ability to store various digital content,
including video, audio, software, and more. Here, we'll provide a detailed explanation of
DVDs, including their history, technology, types, and applications.

DVDs were developed as the successor to Compact Discs (CDs) and were introduced in the
late 1990s. They were created to provide higher storage capacity and better quality for audio,
video, and data compared to CDs. DVDs quickly gained popularity for video distribution,
leading to the decline of VHS tapes.

Basic Technology:
o DVDs use optical storage technology, where data is stored and read using laser beams.
o A key difference between DVDs and CDs is using a shorter-wavelength laser in DVDs,
which allows for smaller pits and lands on the disc's surface, resulting in higher data
density.
o The surface of a DVD contains a single, continuous spiral track that winds from the
centre to the outer edge.

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Storage Capacity:
• DVDs come in various capacities, typically ranging from 4.7 gigabytes (GB) to 17 GB.
• The storage capacity depends on the type and configuration of the DVD, such as single-
layer, dual-layer, single-sided, or double-sided discs.

Types of DVDs:

DVD-
ROM

DVD+R
and Types of DVD DVD-R
DVD+RW

DVD-
RW

a. DVD-ROM (Digital Video Disc – Read Only Memory):

o These DVDs are pre-recorded with data, typically commercial movies, software, or
other non-user-writable content.
o They cannot be modified or erased by the end user.
b. DVD-R (Digital Video Disc – Recordable):
o DVD-Rs are blank discs that users can record data onto once.
o Once data is written, it becomes permanent and cannot be altered or erased.
c. DVD-RW (Digital Video Disc – Rewritable):
o DVD-RW discs are rewritable and allow users to record, erase, and re-record data
multiple times.
o They are ideal for tasks that require frequent data updates.

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d. DVD+R and DVD+RW:

o Similar to DVD-R and DVD-RW but with a different format standard, developed by
a different group of manufacturers.
o Both standards are widely supported by DVD players and drives.
e. Double-Layer DVDs:
• These DVDs have two recording layers on a single side, doubling the storage capacity.
• They are called DVD+R DL or DVD-R DL (Dual Layer).

Applications:
• Video Storage: DVDs are commonly used for storing movies and TV shows. They offer
excellent video and audio quality and can include bonus features.
• Software Distribution: DVDs are often used to distribute software applications,
operating systems, and games due to their large capacity.
• Data Backup: Users utilise DVDs for backing up important files, documents, and photos,
especially when a high storage capacity is needed.
• Archiving: DVDs are suitable for long-term data archiving, preserving digital content,
and ensuring data integrity over time.
• Multimedia Presentations: DVDs create interactive multimedia presentations,
educational materials, and training videos.

Advantages and Disadvantages:

Advantages:
• High storage capacity for a variety of digital content.
• Excellent video and audio quality.
• Compatibility with various devices, including DVD players, DVD-ROM drives, and
computers.
• Durability and resistance to environmental factors.

Disadvantages:
• Limited capacity compared to modern storage technologies like Blu-ray discs or
external hard drives.
• Vulnerable to scratches and physical damage.
• May become obsolete as higher-capacity storage media emerge.

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iii. Blu-ray Disc:

A Blu-ray Disc (BD) is a high-capacity optical storage medium and digital data storage format.
It is the third generation of optical disc technology, following the Compact Disc (CD) and the
Digital Versatile Disc (DVD). Blu-ray Discs are known for their significantly larger storage
capacity and ability to store high-definition video and audio.

Technology of Blu-ray Disc:

• Laser Technology: The key technology behind Blu-ray Discs is using a blue-violet laser
with a shorter wavelength (405 nm) compared to the red laser used in DVDs and CDs.
This shorter wavelength enables more precise data reading and writing on the disc,
allowing for higher data density.
• Data Storage: Blu-ray Discs store data on a circular, polycarbonate substrate, similar
to CDs and DVDs. However, due to the shorter wavelength of the blue-violet laser, they
can store much smaller pits (indentations) and lands (flat areas) on the disc's surface.
This increased data density results in higher storage capacity.
• Storage Capacity: Blu-ray Discs come in different storage capacities, with single-layer
discs typically holding 25 gigabytes (GB) of data and dual-layer discs storing 50 GB.
There are also triple-layer (100 GB) and quadruple-layer (128 GB) versions.

Features and Specifications:

High-Definition Video: One of the primary uses of Blu-ray Discs is for storing high-definition
(HD) video content. They can deliver exceptional video quality with resolutions up to 1080p
or even 4K Ultra HD on newer discs and players.

Lossless Audio: Blu-ray Discs support advanced audio formats like Dolby TrueHD and DTS-
HD Master Audio, providing high-quality, lossless audio experiences for movies and music.

Interactive Menus: Blu-ray Discs can include interactive menus, special features, and bonus
content, enhancing the viewing experience.

Region Coding: Similar to DVDs, Blu-ray Discs are often region-coded, limiting their
playback to specific geographic regions. This is done to control release dates and
distribution.

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Applications:
Blu-ray Discs have a wide range of applications, including:
• Home Entertainment: Blu-ray Discs are commonly used for storing and playing back
movies and TV series in high definition. They offer superior audio and video quality
compared to DVDs.
• Data Storage: Blu-ray Discs are used for data backup and archival purposes. They are
suitable for storing large files, documents, photos, and videos.
• Gaming: Some video game consoles, such as the PlayStation 3 and PlayStation 4, use
Blu-ray Discs to distribute games. This allows for more extensive game worlds and
higher-quality graphics.
• Professional Use: Professionals in fields like filmmaking and video editing may use Blu-
ray Discs to distribute their work in high resolution.

Advantages:
• High Storage Capacity: Blu-ray Discs offer significantly larger storage capacities than
DVDs and CDs, making them suitable for HD video and data storage.
• High-Quality Video and Audio: They provide exceptional video and audio quality,
making them a preferred choice for home entertainment.
• Durable and Long-Lasting: Blu-ray Discs are relatively durable and resistant to physical
wear and tear, ensuring the longevity of data stored on them.
• Interactive Features: They support interactive menus, enabling users to access special
features, subtitles, and alternate audio tracks.

Challenges:
• Cost: Blu-ray Discs and players can be more expensive than their DVD counterparts.
• Compatibility: Older DVD players may not support Blu-ray Discs, and Blu-ray players
may not play older DVD formats.
• Physical Vulnerability: Like all optical discs, Blu-ray Discs can be scratched or damaged
if mishandled.

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4.4 Removable Storage Devices

Removable storage devices are essential components of modern computing, providing the
flexibility to transport, store, and share data conveniently. These devices are characterised
by their ability to be easily disconnected from a computer or device without disrupting its
functionality. They come in various forms and capacities, catering to diverse user needs. In
this detailed explanation, we will explore removable storage devices, their types, uses,
advantages, and limitations.

Types of Removable Storage Devices:

SD Cards
and MicroSD
Cards

a. USB Flash Drives (Thumb Drives):

– USB flash drives are compact, portable storage devices that connect to a computer's
USB port.
– They come in various capacities, ranging from a few gigabytes (GB) to several
terabytes (TB).
– USB flash drives are widely used for data transfer, backup, and as bootable media for
operating systems.
b. External Hard Drives:
– External hard drives are similar in functionality to internal hard drives but are
enclosed in a portable case.

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– They offer larger storage capacities, often ranging from several hundred GBs to
multiple terabytes.
– These drives are used for backing up data, expanding storage capacity, and
transporting large files.
c. SD Cards and MicroSD Cards:
– SD (Secure Digital) and MicroSD cards are commonly used in cameras, smartphones,
and other portable devices.
– They provide a compact and removable form of storage with capacities ranging from
a few GBs to several TBs.
– SD cards are used for storing photos, videos, and other media.
d. CDs and DVDs:
– Optical discs like CDs and DVDs were once a popular form of removable storage.
– They have a fixed storage capacity (e.g., 700 MB for CDs and 4.7 GB for DVDs) and are
read using optical drives.
– CDs and DVDs are used for software distribution, music, and video playback.
e. Memory Cards (e.g., CompactFlash, Memory Stick):
– Memory cards, like CompactFlash and Memory Stick, are used in specific devices such
as digital cameras.
– They offer various capacities and are used for storing photos, videos, and other data.

Uses of Removable Storage Devices:

a. Data Backup and Recovery: Removable storage devices are commonly used to create
backups of important data. In case of data loss or system failure, these backups can be
easily restored.
b. Data Transfer: They facilitate the transfer of files and data between computers or
devices. USB flash drives, in particular, are popular for this purpose.
c. Data Sharing: Removable storage devices allow users to share data. For example,
sharing presentations, documents, or media files with colleagues or friends.
d. Portable Software: Portable applications and software can be run directly from
removable storage devices without installation on the host computer.

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e. Operating System Installation: Removable storage devices like USB flash drives can be
used to install or boot operating systems, which is especially useful for system
troubleshooting or clean installations.
f. Expandable Storage: External hard drives provide additional storage capacity for
computers and devices with limited internal storage.

Advantages of Removable Storage Devices:

• Portability: These devices are compact and easy to carry, making them ideal for on-the-
go users.
• Universal Compatibility: Most removable storage devices use standard interfaces like
USB, ensuring compatibility with a wide range of devices.
• Data Security: Data stored on removable devices can be physically secured and kept
separate from the host system, reducing the risk of data breaches.
• Backup Redundancy: Users can create multiple backups on separate devices, enhancing
data redundancy and recovery options.
• Easy Data Transfer: Transferring data between different computers or platforms is
simple and efficient.

Limitations and Considerations:

a. Data Loss Risk: Removable devices are prone to loss, theft, or physical damage, which
can result in data loss.
b. Limited Lifespan: These devices have a limited number of write cycles, and their lifespan
may be shorter than that of internal storage.
c. Security Concerns: If not properly secured, removable storage can be a security risk,
especially if it contains sensitive or confidential information.
d. Compatibility Issues: Some devices may not support certain types of removable storage,
and compatibility can be a concern when transferring data.
e. Capacity Constraints: Smaller capacity devices may not be suitable for storing large
multimedia files or extensive backups.

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SELF-ASSESSMENT QUESTIONS – 3

6. What is the main disadvantage of traditional Hard Disk Drives (HDDs)

compared to Solid State Drives (SSDs)?
a) Slower data access times
b) Lower storage capacity
c) Higher cost
d) Limited durability
7. Which optical storage type offers the highest storage capacity?
a) CD
b) DVD
c) Blu-ray
d) None of the above
8. What is a potential limitation of removable storage devices?
a) High data transfer speeds
b) Incompatibility with most devices
c) Risk of data loss or theft
d) Unlimited write cycles

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5. SUMMARY
In computing, memory and storage are crucial components that facilitate the operation and
data management of computers and electronic devices. Understanding the different types of
memory and storage devices is fundamental to comprehending how data is processed,
stored, and retrieved in the digital realm.

Primary memory, also known as main memory or RAM (Random Access Memory), is a
fundamental type of computer memory that plays a pivotal role in the execution of programs
and the overall performance of a computer. RAM is volatile memory, meaning it temporarily
stores data that is actively being used by the computer's CPU (Central Processing Unit). It is
lightning-fast, allowing for quick access and retrieval of data. However, it is also volatile,
meaning it loses all its data when the computer is powered off. RAM is categorised into two
subtypes: DRAM (Dynamic RAM) and SRAM (Static RAM).

Secondary memory, in contrast to primary memory, is non-volatile storage designed for

long-term data retention. It includes various storage devices such as hard disk drives
(HDDs), solid-state drives (SSDs), optical disks (e.g., CDs, DVDs, Blu-ray), and flash memory.
Secondary memory is essential for storing the operating system, applications, files, and user
data. Unlike RAM, it retains data even when the power is turned off. The capacity of
secondary memory is significantly larger than that of primary memory.

Cache memory is a small but ultra-fast type of memory that serves as a bridge between the
CPU and RAM. Its primary function is to temporarily store frequently accessed data and
instructions, reducing the latency in data retrieval. Cache memory is typically divided into
three levels: L1, L2, and L3 cache, with L1 being the closest to the CPU and the fastest.

Flash memory is a non-volatile memory technology used in various storage devices,

including USB flash drives, memory cards, and SSDs. It retains data even without power and
is known for its durability and speed. Flash memory is based on NAND and NOR logic gates
and is widely used in portable devices and solid-state storage solutions.

Hard Disk Drives (HDDs) are traditional storage devices that have evolved over the years to
offer large capacities for data storage. They use spinning disks (platters) to read and write
data magnetically. HDDs are known for their cost-effectiveness and are commonly used in

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desktop and laptop computers. They are, however, slower and more sensitive to physical
shocks compared to modern alternatives.

Optical storage devices, such as Compact Discs (CDs), Digital Versatile Discs (DVDs), and Blu-
ray Discs (BDs), use laser technology to read and write data. CDs typically store up to 700
MB, DVDs offer 4.7 GB to 17 GB, and BDs provide even higher capacities, up to 128 GB. Optical
storage is commonly used for media distribution and long-term data archiving.

Solid-state drives (SSDs) are the modern alternative to HDDs. They use NAND flash memory
to store data and have no moving parts, resulting in faster data access, improved reliability,
and resistance to physical shock. SSDs are widely used in laptops, desktops, and data centres,
providing a significant boost in performance and responsiveness.

Removable storage devices, such as USB flash drives, external hard drives, and memory
cards, offer portability and flexibility for data transfer, backup, and sharing. They come in
various capacities and are essential tools for modern computing.

Overall, to sum up, the above - memory and storage devices are essential components of
computing systems, each with its unique characteristics and purposes. Primary memory
(RAM) provides quick access to active data, while secondary memory (HDDs, SSDs, optical
storage) stores data for the long term. Cache memory enhances CPU performance, and flash
memory is a versatile, non-volatile option. Traditional HDDs coexist with modern SSDs,
offering diverse storage solutions, while removable storage devices add convenience and
mobility to data management in the digital age. Understanding these memory and storage
types is key to optimizing computer performance and managing data effectively.

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6. TERMINAL QUESTIONS
1. What is the role of memory in a computer system, and why is it essential?
2. How is memory different from storage in a computing context?
3. How does secondary memory differ from primary memory regarding storage
capabilities and accessibility?
4. What is cache memory, and how does it improve a computer's performance?
5. Can you explain the concept of flash memory and provide examples of its applications?
6. What is a hard disk drive (HDD), and how does it work regarding data storage and
retrieval?
7. What are optical storage devices, and what are the key types within this category (CD,
DVD, Blu-ray)?
8. Can you provide examples of removable storage devices, and explain their uses and
benefits?

7. ANSWERS
Self-Assessment Answers
1. Store and retrieve
2. RAM
3. Cache Memory
4. True
5. SRAM
6. Slower data access times
7. Blu-ray
8. Risk of data loss or theft

Terminal Answers
1. Refer to section 2.
2. Refer to section 3 & 2.4.
3. Refer to section 3.2.
4. Refer to section 3.3.
5. Refer to section 3.4.
6. Refer to section 4.1.

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7. Refer to section 4.3.

8. Refer to section 4.4.

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Unit 3
Input and Output Devices

Table of Contents
SL Topic Fig No / Table / SAQ / Page No
No Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Various Types of Input Devices - 1

2.1 Keyboards 1 -

2.2 Pointing Devices - -

4-15
2.3 Scanning Devices - -

2.4 OCR - -

2.5 Biometric Input Devices - -

3 Various Types of Output Devices - 2

3.1 Monitors - -

3.2 Printers & Projectors - - 16-26

3.3 Speakers and Audio Output - -

3.4 Headsets and Earphones - -

4 Summary - - 27
5 Terminal Questions - - 28
6 Answers - - 28

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1. INTRODUCTION
In computer technology, input and output devices are pivotal in facilitating communication
between humans and machines. These devices are fundamental components of any
computing system, serving as the interface through which users interact with computers and
receive processed information. Input devices feed data and commands into the computer,
while output devices present the processed information comprehensibly. This dynamic
interaction forms the core of human-computer interaction and is crucial for various
applications, from personal computing to industrial automation. input and output devices
bridge the gap between the human world and the digital realm, enabling users to
communicate with and receive feedback from computers and electronic systems. The
advancement of these devices has not only enhanced user experiences but has also expanded
the possibilities for interaction and productivity in various domains, from business and
education to entertainment and accessibility. As technology continues to evolve, the design
and capabilities of input and output devices will play a vital role in shaping the future of
human-computer interaction.

1.1 Learning Objectives

At the end of this unit, students should be able to:
❖ Understand the concept of input and output devices.
❖ Differentiate between various types of input devices
❖ Demonstrate proficiency in using input devices:

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2. VARIOUS TYPES OF INPUT DEVICES

Input devices are hardware components that allow users to interact with a computer system
by providing input, which can be text, images, or commands.

The different types of input devices are:

i. Keyboards
ii. Pointing Devices
iii. Scanning Devices
iv. OCR
v. Biometric Input Devices

Keyboards
TYpes of Input Devices

Pointing Devices

Scanning Devices

OCR

Biometric Input
Devices

2.1 Keyboards
A keyboard is a common input device used in computing that allows users to enter text,
numbers, and various commands into a computer or other digital devices. It is an essential tool
for communication and data entry in both personal and professional computing
environments.

Working Nature: Keyboards consist of keys, each representing a specific character or

function. When a key is pressed, it sends an electrical signal to the computer, which
processes the input and displays the corresponding character on the screen.

Properties:
• QWERTY layout is the most common.

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• Keys may include letters, numbers, symbols, and function keys.

• Some keyboards have additional features like multimedia keys or backlighting.

Characteristics:
• Provides tactile and visual feedback.
• Suitable for text-based input.
• Can be wired or wireless.

Examples: Standard computer keyboard, laptop keyboard, gaming keyboard.

(a) (b)

(c)

Fig 1: (a) Standard Keyboard (b) Laptop Keyboard (c ) Gaming Keyboard

Advantages:
o Familiar and widely used.
o Suitable for typing tasks.
o Offers quick access to functions and shortcuts.

Disadvantages:
o May cause typing-related strain or injuries.
o Limited for tasks requiring precise pointing or drawing.

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2.2 Pointing Devices

Pointing devices are input peripherals used to control the movement of a cursor or pointer
on a computer screen. They enable users to interact with graphical user interfaces (GUIs),
navigate software applications, and manipulate objects on the screen. Pointing devices are
essential for precise cursor control, making them a fundamental part of modern computing.

Working Nature:
Pointing devices move a cursor on the screen and interact with graphical user interfaces.
They often involve physical movement or gestures.

Properties:
• Common types include mice, touchpads, trackballs, and touchscreens.
• Optical or laser sensors are used to detect movement.

Characteristics:
• Cursor Control: Pointing devices offer precise control over the position of the on-screen
cursor, facilitating tasks like clicking, dragging, and selecting.
• Navigation: They allow users to navigate through graphical interfaces, menus, and web
pages easily.
• Gestures: Some pointing devices support gesture-based interactions, enabling actions
like zooming, scrolling, and rotating.
• Buttons: Many pointing devices have buttons for clicking, double-clicking, right-
clicking, and performing other functions.
• Scroll Wheels: Some devices, like mice, feature scroll wheels for vertical and horizontal
scrolling.

Examples:
Computer Mouse: The most common pointing device, a mouse, typically has two buttons and
a scroll wheel. It is moved on a flat surface to control the cursor.

Laptop Touchpad: Built into laptops, touchpads use finger movements for cursor control and
gesture-based actions.

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Trackball: Users rotate a trackball to move the cursor, making it suitable for precise tasks.
Trackballs are often used in specialised applications.

Graphics Tablet: Primarily used by graphic designers, a graphics tablet consists of a stylus
and a tablet surface, allowing for precise drawing and handwriting input.

Touchscreen: Found on smartphones, tablets, and some computers, touchscreens enable

direct interaction by tapping or swiping on the screen.

Advantages:
• Precision: Pointing devices offer precise and fine-grained control, making them ideal for
tasks that require accuracy.
• Versatility: They can be used for various applications, from office work to gaming.
• Ease of Use: Pointing devices are generally easy to use and do not require specialised
skills.
• Gesture Support: Some pointing devices support gestures, enhancing user interactions.

Disadvantages:
• Space Requirement: Using a pointing device often requires a flat and clean surface,
which may not always be available.
• Learning Curve: Some devices, especially those with advanced features, have a learning
curve for users to become proficient.
• Maintenance: Mechanical pointing devices like mice may require periodic cleaning and
maintenance.

2.3 Scanning Devices

Scanning devices are hardware peripherals used to convert physical documents, images, or
objects into digital format. They play a crucial role in various industries and applications,
enabling the digitisation, storage, and manipulation of physical content. In this overview, we
will explore the working principles, types, and common applications of scanning devices.

Working Principles:
Scanning devices operate based on capturing images or text through sensors or cameras and
then converting this analog information into digital data.

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Here are the key working principles:

a. Optical Sensors: Many scanning devices use optical sensors, such as charge-coupled
devices (CCDs) or contact image sensors (CIS), to capture images. These sensors detect
light and colour variations to represent the scanned content digitally.
b. Resolution: Scanners offer different resolutions, often measured in dots per inch (DPI),
determining the level of detail captured. Higher DPI results in sharper and more
detailed scans.
c. Colour Depth: Scanners can capture images in grayscale or colour. Colour depth refers
to the number of colours or shades of grey a scanner can reproduce. Common colour
depths include 24-bit (millions of colours) and 8-bit (256 colours).
d. Scanning Modes: Scanners can operate in various modes, including flatbed scanning,
sheet-fed scanning, and handheld scanning. Each mode is suitable for specific types of
documents or objects.

Types of Scanning Devices:

There are several types of scanning devices, each designed for specific purposes:
1. Flatbed Scanners: These are the most common type of scanners, resembling a
photocopier. They have a glass bed where you place documents or photos for scanning.
2. Sheet-fed Scanners: Sheet-fed scanners are designed for scanning multiple pages
quickly. They can handle stacks of paper and automatically feed pages through the
scanning mechanism.
3. Handheld Scanners: These portable scanners are held by hand and manually moved
over the document. They can scan irregularly shaped objects or large documents that
cannot fit on a flatbed.
4. Drum Scanners: Drum scanners use a rotating drum to scan images. They offer
extremely high resolution and are often used in professional graphic design and
printing.
5. 3D Scanners: 3D scanners capture the shape and dimensions of objects in three
dimensions, creating 3D models.
6. Barcode Scanners: Barcode scanners are specialised scanning devices designed to
read barcodes on products, packages, or labels.

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Applications:
Scanning devices find applications in various fields:
1. Document Digitization: Scanners are commonly used to convert paper documents into
digital format, making it easier to store, search, and share information. This is essential
in offices and administrative settings.
2. Image and Photo Scanning: Photographers and artists use scanners to digitise
photographs, artwork, and negatives. This process helps in editing, archiving, and
sharing visual content.
3. OCR (Optical Character Recognition): Scanners, combined with OCR software, can
convert printed text into editable and searchable digital text. This is valuable in data
entry, archiving, and digitising printed materials.
4. Barcode Scanning: In retail and logistics, barcode scanners read barcodes on products
and packages, facilitating inventory management and tracking.
5. Medical Imaging: Medical professionals use specialised scanners like CT (Computed
Tomography) and MRI (Magnetic Resonance Imaging) scanners to create detailed
images of the human body for diagnosis and treatment planning.
6. 3D Scanning: 3D scanners capture the shape and dimensions of objects in three
dimensions. They are used in manufacturing, engineering, and archaeology for design
and analysis.

Advantages:
• Preserves and archives physical documents and images.
• Facilitates document sharing, editing, and searching.
• Enhances document searchability through OCR.
• Supports high-resolution scanning for detailed images.

Disadvantages:
• Hardware maintenance may be required.
• Some documents or images may not scan accurately, requiring manual corrections.
• Specialized scanners can be expensive.

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2.4 OCR
OCR, which stands for Optical Character Recognition, is a technology that converts printed
or handwritten text into machine-readable text. It is a computer-based process that analyses
scanned images or documents containing text and recognises their characters, making the
text editable, searchable, and suitable for various digital applications.

Working Principle:
The working of OCR technology involves several key steps:
• Scanning: OCR begins with the scanning of a physical document, such as a paper page
or a handwritten note. The scanner captures the image of the document, including all
the text characters.
• Image Preprocessing: Before OCR can recognise text, the scanned image often
undergoes preprocessing. This step includes tasks like noise reduction, image
enhancement, and layout analysis to improve the quality of the image and isolate text
from other elements.
• Character Recognition: OCR software utilises complex algorithms and pattern
recognition techniques to analyse the shapes, patterns, and structures of characters
within the scanned image. It identifies individual letters, numbers, punctuation marks,
and symbols.
• Text Extraction: Once the characters are recognised, OCR software converts them into
machine-readable text. This extracted text can then be edited, searched, or processed
digitally.
• Post-processing: In some cases, post-processing steps may be applied to correct errors
and improve the accuracy of the recognised text. This may involve spell-checking,
context analysis, or formatting adjustments.
• Output: The final output of OCR is the digitised text, which can be saved in various
formats such as plain text, Word documents, PDFs, or other text-based file formats.

Properties and Characteristics:

• Software-Based: OCR is typically implemented as software applications or libraries that
can be integrated into other software systems. There are also online OCR services
available.

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• Language Support: Modern OCR systems support multiple languages and fonts, making
them versatile for various documents.
• Accuracy: OCR accuracy can vary based on factors like the quality of the scanned image,
font type, and language. Advanced OCR systems achieve high levels of accuracy.
• Handwriting Recognition: While OCR is primarily used for printed text, some OCR
software can recognise handwritten characters, although accuracy may be lower for
handwriting.
• Applications: OCR is used in various applications, including document digitisation, text
extraction from scanned books, automatic data entry, document indexing, and text-
based searching within images.

Examples of OCR Software:

• ABBYY FineReader: A popular OCR software known for its accuracy and extensive
language support.
• Adobe Acrobat OCR: Integrated into Adobe Acrobat, it allows text recognition in PDF
documents.
• Tesseract: An open-source OCR engine developed by Google, known for its flexibility
and continuous improvement.
• Readiris: OCR software designed for document scanning and conversion tasks.

Advantages:
• Text Digitization: OCR converts printed or handwritten text into editable, searchable
digital text, eliminating the need for manual data entry.
• Enhanced Accessibility: OCR makes printed materials accessible to individuals with
visual impairments by converting text into speech or Braille.
• Efficient Data Retrieval: Digitized text is easily searchable, allowing for quick retrieval
of specific information within documents.

Disadvantages:
• Accuracy Variability: OCR accuracy can vary depending on document quality, font, and
language. Handwriting recognition may be less accurate.
• Formatting Challenges: OCR may not always preserve the original document's
formatting, particularly for complex layouts.

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• Resource Intensive: OCR can be computationally intensive, especially for large

documents or extensive text recognition tasks.

2.5 Biometric Input Devices

Biometric input devices are a category of input peripherals that use unique physiological or
behavioural characteristics of individuals to verify their identity. These devices capture
biometric data, which is then analysed and compared to stored templates to grant or deny
access to a system, device, or secure area. Biometric authentication is becoming increasingly
popular due to its high security and convenience.

Working Nature:
1. Data Capture: Biometric devices capture specific biometric data from the user. Common
biometric characteristics include fingerprints, facial features, iris patterns, palm prints,
voice patterns, and behavioural traits like typing rhythm or signature dynamics.
2. Data Processing: The captured biometric data is processed by the device's internal
software or hardware to create a unique digital template or signature based on the
user's biometric features. This template is then stored securely.
3. Authentication: When the user attempts to access a system or device, they are required
to provide their biometric data, which the device then captures again. The newly
captured data is compared to the stored template to verify the user's identity.
4. Access Decision: Based on the comparison, the device either grants or denies access. If
the biometric data matches the stored template within an acceptable margin of error,
access is granted; otherwise, access is denied.

Properties and Characteristics:

• Uniqueness: Biometric traits are highly unique to individuals, making them an excellent
choice for authentication. Even identical twins have distinct biometric characteristics.
• Security: Biometric authentication offers a high level of security because it is difficult
for impostors to replicate or steal someone's biometric data.
• Convenience: Biometric input devices offer convenient and quick user authentication.
Users don't need to remember passwords or carry physical tokens.
• Types of Biometric Data: Common types of biometric data include fingerprints, facial
features (facial recognition), iris patterns (iris scanners), palm prints, voice patterns

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(voice recognition), and behavioural traits (keystroke dynamics or signature

recognition).
• Enrolment: Users need to enrol in the biometric system initially. During enrolment,
their biometric data is captured and stored as a reference template.

Examples of Biometric Input Devices:

1. Fingerprint Scanners: These devices capture and analyse the unique patterns of ridges
and valleys on a person's fingertip.

2. Facial Recognition Cameras: Facial recognition systems use cameras and algorithms
to identify individuals based on facial features.

3. Iris Scanners: Iris recognition technology scans the unique patterns in the coloured
part of the eye (iris) to verify identity.

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4. Voice Recognition Systems: These systems analyse the distinctive characteristics of a

person's voice, such as pitch, tone, and speech patterns.

5. Palm Print Scanners: Palm print devices capture and analyse the unique patterns on a
person's palm, including creases and lines.

Advantages:
• High Security: Biometric authentication is difficult to forge, enhancing security.
• Convenience: Users don't need to remember passwords or carry physical tokens.
• Speed: Authentication is typically quick and can be almost instantaneous.

Disadvantages:
• Privacy Concerns: Storing biometric data raises privacy concerns. Secure storage is
crucial.
• Cost: Biometric devices can be expensive to implement.
• False Acceptance/Rejection: Biometric systems may occasionally produce false
positives (accepting unauthorised users) or false negatives (denying authorised users).

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SELF-ASSESSMENT QUESTIONS – 1

1. Which of the following is NOT a type of input device?

a) Keyboard
b) Mouse
c) Monitor
d) Scanner
2. What is the primary function of a pointing device?
a) Data storage
b) Data input
c) Data output
d) Data processing
3. Which input device is commonly used for capturing handwritten or printed
text and converting it into digital format?
a) Keyboard
b) Mouse
c) Scanner
d) OCR
4. Biometric input devices use ________________ for user authentication.
a) Passwords
b) Fingerprint or other unique physical characteristics
c) Voice commands
d) QR codes

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3. VARIOUS TYPES OF OUTPUT DEVICES

Output devices in computing are hardware components that enable a computer to
communicate information and data to users or other systems in a human-readable or
perceivable form. These devices take digital data generated by the computer's central
processing unit (CPU) and convert it into a format that can be understood by humans or used
for further purposes. Output devices play a crucial role in providing feedback and presenting
the results of computations.

The various types of Output devices are:

a. Monitors
b. Printers & Projectors
c. Speakers and Audio Output
d. Headsets and Earphones
TYpes of Output Devices

Monitors

Printers & Projectors

Speakers & Audion Output

Headsets & Earphones

3.1 Monitors
Monitors are essential output devices in computing that display visual information
generated by a computer's central processing unit (CPU). Monitors, often called screens or
displays, are crucial in providing a user-friendly interface for interacting with digital data
and applications. Here are key details about monitors:

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Working Nature:
1. Display Technology: Monitors use various technologies to create visual images.
Common types include:
o LCD (Liquid Crystal Display): LCD monitors use liquid crystal cells to control the
passage of light, allowing precise colour and image representation.
o LED (Light Emitting Diode): LED monitors use light-emitting diodes as backlight
sources for LCD panels, offering energy efficiency and colour vibrancy.
o OLED (Organic Light Emitting Diode): OLED monitors use organic compounds to
emit light directly, resulting in thinner and more flexible displays with excellent
contrast and colour reproduction.
o CRT (Cathode Ray Tube): CRT monitors, less common today, use electron beams to
excite phosphors on a glass screen, creating images by scanning lines.
2. Resolution: Monitors have specific resolutions, which indicate the number of pixels
displayed horizontally and vertically. Higher resolutions provide sharper and more
detailed visuals.
3. Refresh Rate: The refresh rate of a monitor refers to how many times per second the
screen updates its content. Higher refresh rates, such as 60Hz, 120Hz, or 240Hz,
contribute to smoother motion in videos and games.
4. Size: Monitors come in various sizes, ranging from compact screens suitable for laptops
to large widescreen displays for desktop computers. Size affects the viewing experience
and workspace.

Properties/Characteristics:
• Color Capabilities: Monitors can display various colours, with some supporting full
colour gamut’s for accurate and vibrant visuals.
• Brightness: Monitors have adjustable brightness levels to suit lighting conditions and
user preferences.
• Panel Type: Different types of LCD panels, such as IPS (In-Plane Switching), TN (Twisted
Nematic), and VA (Vertical Alignment), offer varying colour accuracy, viewing angles,
and response times.
• Connectivity: Monitors connect to computers and other devices through ports like
HDMI, DisplayPort, VGA, and USB-C.

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Examples:
Monitors come in various forms, including:
• Computer Monitors: Designed for use with desktop computers, these monitors
typically range from 19 inches to 34 inches or more and offer a variety of resolutions
and features.
• Gaming Monitors: Optimized for gaming, these monitors often feature high refresh
rates, low response times, and adaptive sync technologies.
• Professional Monitors: Used by graphic designers, photographers, and video editors,
these monitors offer accurate colour representation and high resolutions for precision
work.
• Television Screens: Modern TVs often use similar display technologies to computer
monitors, serving as larger-format screens for home entertainment.

Advantages:
• Visual Clarity: Monitors provide sharp and high-resolution visuals, making them
suitable for tasks like web browsing, graphic design, and video editing.
• Real-Time Feedback: Monitors offer real-time feedback for applications such as gaming,
video playback, and software development.
• Space Efficiency: Flat-panel monitors save space compared to older CRT monitors,
allowing for compact and clutter-free setups.

Disadvantages:
• Cost: High-quality monitors with advanced features can be relatively expensive.
• Limited Portability: Monitors are stationary devices, making them less suitable for on-
the-go computing.
• Power Consumption: Some monitors consume more power than other output devices,
impacting energy efficiency.

3.2 Printers & Projectors

Printers and projectors are important output devices used in computing and multimedia
applications. Printers produce physical copies of digital content, while projectors display
digital content on a larger screen or surface. The choice between them depends on the specific

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needs and use cases of the user or organisation. They serve distinct purposes and have
unique characteristics.

Printers:
Printers are output devices that reproduce digital documents and images onto physical paper,
offering versatility for various printing needs. They use technologies such as inkjet, laser, or
3D printing to create tangible copies.

Working Nature:
1. Printing Technology: Printers use various printing technologies to transfer digital data
onto physical paper or other materials. Common printer types include:
• Inkjet Printers: These printers spray tiny ink droplets onto paper to create text and
images. They are suitable for both text and colour printing.
• Laser Printers: Laser printers use a laser beam to create an electrostatic image on
a photosensitive drum. Toner (powdered ink) is then fused onto the paper using
heat. They are known for fast and high-quality printing.
• Dot Matrix Printers: Less common today, dot matrix printers use a matrix of pins
to strike an inked ribbon, forming characters and images through dot patterns.
• 3D Printers: These specialised printers create three-dimensional objects layer by
layer, often using plastic filament or resin.
2. Resolution: Printers have specific resolutions that determine the quality of printed
output. Higher resolutions result in sharper and more detailed prints.
3. Colour Capabilities: Some printers are capable of colour printing, while others are
monochrome (black and white) printers.
4. Paper Handling: Printers can handle various sizes and types, including standard letter-
sized paper, envelopes, photo paper, and labels.

Properties/Characteristics:
• Speed: Printers vary in printing speed, with some capable of producing many pages per
minute (ppm) or images per hour.
• Connectivity: Printers can connect to computers and networks through wired (USB,
Ethernet) or wireless (Wi-Fi, Bluetooth) interfaces.

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• Functionality: Printers may offer additional features such as scanning, copying, and
faxing, combining multiple functions in a single device (multifunction or all-in-one).

Examples:
Examples of printers include:
• Inkjet Printers: Epson, HP, and Canon inkjet printers for home and office use.
• Laser Printers: Brother, Dell, and Xerox laser printers for business and professional use.
• 3D Printers: MakerBot, Ultimaker, Prusa Research 3D printers for creating physical
objects.

Advantages:
• Printers provide a tangible and permanent copy of digital documents and images.
• They are versatile and cater to various printing needs, from text documents to high-
quality photographs.
• Modern printers are compact and energy-efficient, making them suitable for home and
office environments.

Disadvantages:
• Printer consumables (ink or toner cartridges) can be expensive, and the cost of
ownership may add up over time.
• Certain printing technologies, such as inkjet, may produce prints susceptible to water
damage or fading over time.

Projectors:
Projectors employ light sources and optical systems to project large, immersive images or
presentations onto screens or surfaces. They are commonly used for presentations, home
theatre setups, and educational purposes, offering versatility in displaying digital content.

Working Nature:
1. Projection Technology: Projectors use light sources (usually lamps or LEDs) and optical
systems to project images or video onto a screen or surface. The image is created by
either reflecting light off tiny mirrors (DLP technology), passing light through liquid
crystal panels (LCD technology), or using laser light sources.

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2. Resolution: Projectors have native resolutions that determine the clarity and detail of
the projected image. Higher resolutions are suitable for presentations and high-
definition video.
3. Brightness: Projectors are rated by their brightness in lumens, which affects the
visibility of the projected image in different lighting conditions. Higher lumens are
necessary for well-lit rooms.

Properties/Characteristics:
• Portability: Many projectors are designed to be portable, making them ideal for
presentations in different locations.
• Projection Size: Projectors can produce large images, allowing for presentations, home
theatre setups, and interactive applications.
• Connectivity: Projectors feature various ports for connecting to computers, media
players, and other devices. Wireless projectors allow for cable-free connections.
• Throw Distance: Projectors have specific throw distances, indicating how far they must
be from the screen to produce a certain image size.

Examples:
Examples of projectors include:
• Multimedia Projectors: Used for presentations in conference rooms, classrooms, and
home theatres.
• Short-Throw Projectors: These projectors can produce large images from a short
distance, suitable for small rooms.
• Pico Projectors: Ultra-portable projectors designed for on-the-go presentations and
entertainment.

Advantages:
• Projectors provide large and immersive displays, making them ideal for presentations,
educational purposes, and home entertainment.
• They are versatile and can be used for various applications, including business
presentations, gaming, and movie nights.
• Modern projectors often offer high-definition resolutions and connectivity options,
including HDMI and wireless capabilities.

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Disadvantages:
• Projectors may require a dark or dimly lit environment to produce the best image
quality.
• Some projectors can be relatively expensive, especially those with advanced features
and higher brightness levels.
• Maintenance, such as replacing projector lamps, may be required periodically.

3.3 Speakers and Audio Output

Speakers and Audio Output are integral components of computing and entertainment
systems that produce sound, allowing users to hear music, audio, voice communication, and
other audio content generated by computers and multimedia devices.

Working Nature:
1. Sound Reproduction: Speakers are designed to convert electrical audio signals into
audible sound waves. They consist of transducers, which are components that vibrate
to produce sound. When an electrical signal is sent to the transducer, it causes
vibrations that produce sound waves.
2. Amplification: In many audio output setups, such as desktop computer systems,
speakers are accompanied by amplifiers. Amplifiers increase the strength of the audio
signal before it is sent to the speakers, resulting in louder and more dynamic sound
output.
3. Stereo and Surround Sound: Audio systems can be configured for stereo (two-channel)
or surround sound (multi-channel) setups. Stereo systems use two speakers to create
a sense of left and right audio channels. At the same time, surround sound systems use
multiple speakers strategically placed around the listener to create an immersive audio
experience.

Properties/Characteristics:
• Frequency Response: Speakers are designed to reproduce sounds within a certain
frequency range. The frequency response indicates the range of high and low
frequencies a speaker can accurately produce. For example, some speakers are
optimised for deep bass (subwoofers), while others excel in midrange or high-
frequency reproduction.

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• Wattage (Power Handling): The power handling capacity of speakers refers to how
much electrical power they can handle without distortion. Higher-wattage speakers
can handle more powerful amplifiers and produce a louder sound.
• Impedance: Impedance, measured in ohms (Ω), represents the resistance to electrical
current flow in the speaker. Matching speaker impedance to the amplifier's output
impedance is essential for optimal performance.
• Sensitivity: Sensitivity measures how efficiently a speaker converts electrical power
into sound. Speakers with higher sensitivity require less power to produce the same
volume as speakers with lower sensitivity.

Examples:
• Computer Speakers: Compact audio output devices for desktop and laptop computers.
They often come in 2.0 (two speakers) or 2.1 (two speakers plus a subwoofer)
configurations.
• Home Theatre Systems: These setups include multiple speakers for surround sound,
offering an immersive audio experience for movies and gaming. Components may
include front, centre, rear, and subwoofer speakers.
• Portable Bluetooth Speakers: These wireless speakers are compact and portable,
making them suitable for use with smartphones, tablets, and laptops. They are popular
for outdoor and on-the-go audio playback.
• Professional Studio Monitors: Studio monitors are high-precision speakers in audio
production and recording studios. They offer accurate audio reproduction for critical
listening.

Advantages:
• Audio Quality: High-quality speakers deliver clear, immersive, and accurate sound
reproduction, enhancing the audio experience for music, movies, and gaming.
• Versatility: Speakers come in various sizes and configurations, making them adaptable
to different environments and audio preferences.
• Customisation: Users can choose speakers tailored to their specific audio needs, such as
studio-grade monitors for professionals or gaming speakers optimized for immersive
gameplay.

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Disadvantages:
• Cost: High-quality speakers and audio systems can be expensive, depending on the
brand and features.
• Size and Space Requirements: Larger speaker setups, such as home theatre systems,
may require ample space and cable management.
• Power Consumption: Some powerful speakers and amplifiers can consume significant
electrical power, impacting energy efficiency.

3.4 Headsets and Earphones

Headsets and Earphones are audio output devices designed for personal listening
experiences. They are worn on or in the ears and provide users a private and immersive way
to enjoy audio content, including music, phone calls, gaming, and more.

Working Nature:
1. Sound Delivery: Headsets and earphones consist of miniature speakers (drivers) placed
close to the ears. These drivers convert electrical audio signals into sound waves
directed into the ear canal, allowing the user to hear the audio content.
2. Microphone: Many headsets feature an integrated microphone that enables two-way
communication. This microphone can capture the user's voice for phone calls, online
gaming, video conferencing, and voice commands.
3. Wired and Wireless: Headsets and earphones can be wired or wireless. Wired versions
connect directly to audio sources through cables, while wireless models use Bluetooth
or other wireless technologies to connect to devices, offering greater mobility.

Properties/Characteristics:
• Form Factor: Headsets typically feature a headband that rests on the head and includes
ear cups with speakers. Earphones, on the other hand, are smaller and designed to fit
directly into the ears. They come in various designs, including in-ear, on-ear, and over-
ear styles.
• Noise Isolation: Some earphones and headsets offer passive noise isolation, blocking
external sounds by physically sealing the ear canal. Others feature active noise-
cancelling (ANC) technology, which uses microphones to pick up external sounds and
generate sound waves that cancel out noise.

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• Sound Quality: The sound quality of headsets and earphones varies depending on driver
size, audio codecs, and frequency response. High-quality models deliver rich, clear, and
balanced audio.
• Microphone Quality: For headsets with built-in microphones, microphone quality is
crucial for clear voice communication. Noise-cancelling microphones help reduce
background noise.

Examples:
• Over-Ear Headphones: These headphones feature large ear cups that fully enclose the
ears, providing comfort and excellent sound quality. They are popular for home
listening and studio monitoring.
• In-Ear Earphones: In-ear earphones, often referred to as earbuds, fit snugly into the ear
canal. They are highly portable and commonly used with smartphones and portable
music players.
• Gaming Headsets: Designed for gamers, these headsets often have built-in microphones
and deliver immersive audio for gaming environments.
• Wireless Earbuds: These compact and wireless earphones are designed for on-the-go
use, offering convenience and mobility.

Advantages:
• Portability: Headsets and earphones are compact and lightweight, making them easy to
carry and wear during travel or physical activities.
• Privacy: They provide a private listening experience, allowing users to enjoy audio
content without disturbing others.
• Versatility: Headsets with microphones are versatile and can be used for tasks like
gaming, phone calls, video conferencing, and voice commands.

Disadvantages:
• Sound Leakage: Some earphones and open-back headsets may leak sound, potentially
bothering people nearby.
• Comfort: Comfort can vary based on the design and fit of headsets and earphones. Some
users may find certain models uncomfortable during extended use.

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• Battery Life: Wireless models require charging, and battery life can be a limitation for
long listening sessions.

SELF-ASSESSMENT QUESTIONS – 2

5. What is the primary function of a monitor as an output device?

a) Data input
b) Data storage
c) Data display
d) Data processing
6. Which output device is commonly used for producing printed copies of
digital documents?
a) Monitor
b) Printer
c) Speaker
d) Scanner
7. Headsets and earphones are commonly used for:
a) Viewing videos
b) Playing games
c) Listening to music
d) All of the above
8. In the context of output devices, what does the term "resolution" typically
refer to?
a) The clarity of printed text
b) The size of a monitor
c) The number of pixels in a digital image
d) The loudness of audio output

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4. SUMMARY
Input devices enable users to provide data and instructions to computers, while output
devices present information and media in various formats for users to perceive.

Input Devices like:

Keyboards are a common input device featuring an arrangement of keys used for typing text,
issuing commands, and interacting with computers. Pointing Devices, including mice and
touchpads, facilitate cursor movement on screens and enable users to select, manipulate, and
interact with graphical user interfaces. Scanning Devices like Scanners convert physical
documents, images, or objects into digital formats, allowing for easy storage, editing, and
sharing. OCR (Optical Character Recognition) enables the conversion of printed or
handwritten text into machine-readable text, making it searchable and editable. Biometric
Input Devices capture unique physical or behavioural traits, such as fingerprints or facial
features, for authentication and security purposes.

Output Devices like Monitors are visual output devices that display digital content, including
text, images, and videos, for users to view and interact with. Printers produce hard copies of
digital documents, while projectors display digital content on larger screens or surfaces for
presentations and entertainment. Speakers and audio output devices reproduce sound,
enhancing the auditory experience for various applications, including music, movies, and
gaming. Headsets and Earphones are audio output devices that offer a personalised and
private listening experience, commonly used with smartphones, computers, and portable
devices.

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5. TERMINAL QUESTIONS
1. What is the primary function of a keyboard as an input device?
2. Explain the working principles of scanning devices.
3. Explain the difference between flatbed and sheet-fed scanners.
4. Write a short note on OCR (Optical Character Recognition).
5. Define biometric input devices and their role in authentication and security.
6. Describe the main functions of a computer monitor as an output device.
7. Discuss the key features of headsets and earphones as personal audio output devices.
8. What is the primary function of speakers as audio output devices?

6. ANSWERS
Self–Assessment Answers
1. Monitor
2. Data input
3. OCR
4. Fingerprint or other unique physical characteristics
5. Data display
6. Printer
7. All of the above
8. The number of pixels in a digital image

Terminal Answers
1. Refer to section 2.1
2. Refer to section 2.3
3. Refer to section 2.3
4. Refer to section 2.4
5. Refer to section 2.5
6. Refer to section 3.1
7. Refer to section 3.4
8. Refer to section 3.3

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Unit 4
Introduction to Number Systems

Table of Contents

SL Fig No / Table / SAQ /

Topic Page No
No Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Number System - - 4
3 Binary 1 1

3.1 Binary to decimal conversion - -

3.2 Decimal to Binary Conversion - -

4-13
3.3 Arithmetic Operations on Binary - -
Numbers
3.4 1’s and 2’s Complement of a Binary - -
Number
4 Decimal - 2 14-20
5 Octal - - 21-22
6 Hexadecimal - 3 22-23
7 Summary - - 24-25
8 Terminal Questions - - 25
9 Answers - - 26

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1. INTRODUCTION
Number systems are the foundation of mathematics and computing, serving as a universal
language to represent and manipulate quantities. They are essential for various fields, from
basic arithmetic to complex computer programming, and they play a fundamental role in
everyday life. Understanding number systems is key to comprehending the core principles
of mathematics and computer science.

A number system is a structured way of expressing numerical values using a set of symbols
or digits. These symbols are manipulated according to predefined rules to perform various
arithmetic and logical operations. In computer science, where data manipulation and
mathematical operations are fundamental, number systems play a pivotal role. These
systems provide the basis for representing, storing, and processing numerical information
within digital computers. Understanding number systems is essential for anyone delving into
the world of computing, as they underpin the very fabric of modern technology.

At its core, a number system is a mathematical notation for expressing numbers using a set
of symbols or digits. While there are countless number systems in mathematics, computer
science primarily relies on four key systems: the binary (base-2), decimal (base-10), octal
(base-8), and hexadecimal (base-16) number systems. Each of these systems has its unique
characteristics and applications in computing.

1.1 Learning Objectives

At the end of this unit, students should be able to:
❖ Define the concept of a number system.
❖ Explain the significance of a base in a number system.
❖ Convert a binary number to its decimal equivalent and a decimal number to binary, octal,
and hexadecimal representations.
❖ Solve simple arithmetic operations in binary, decimal, octal, and hexadecimal systems.
❖ Create a conversion chart or table illustrating the correspondence between binary,
decimal, octal, and hexadecimal numbers.

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2. NUMBER SYSTEM
A number system is to represent numbers. There are different kinds of number systems, but
the most popular ones are the decimal system (the one we use every day), the binary system
(used in computers), the octal system, and the hexadecimal system.

Number
System

Decimal Binary Hexadecimal

Octal Number
Number Number Number
System
System System System

Numbers with Numbers with Numbers with Numbers with

base 10 base 2 base 8 base 16

Example:
Example: Example: Example:
(101)2,
(111)10, (346)8, (2DF)16,
(1010.1001)2
(28.123)10 etc (45.523)8 etc (1D4F)16 etc
etc

3. BINARY
Binary digits, often called "bits", are the fundamental building blocks of binary
representation in the number system. They enable computers to represent, process, and
store information in a way that is efficient and reliable.

Binary Digits (0 and 1) or Bits:

A bit is the simplest unit of digital information, representing one of two possible states:
0 or 1. In the binary number system, there are only two digits: 0 and 1. These digits are often
symbolised as "off" (0) and "on" (1). These two states are the foundation upon which all
digital data and information are built.

Binary digits fundamentally differ from the decimal system, where we have ten digits (0
through 9). In binary, we have a minimal set of digits to represent numerical values.

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The significance of bits in computing. Here's why bits are crucial:

a. Data Representation: Bits represent and store all types of data within a computer
system. Whether it's text, numbers, images, audio, or video, everything is ultimately
converted into binary form composed of 0s and 1s.
b. Information Processing: Computers process data by performing various operations on
bits. These operations include arithmetic calculations, logical comparisons, and data
manipulation.
c. Memory: Computer memory, including RAM (Random Access Memory) and storage
devices, uses bits to store and retrieve data. Each bit can be thought of as a tiny switch
that can be turned on or off to represent a piece of information.
d. Communication: When data is transmitted between computers or devices, it is encoded
into a stream of bits. These bits are sent over communication channels and decoded at
the receiving end.
e. Logic and Decision Making: The logical operations of a computer's central processing
unit (CPU) are based on the manipulation of bits. These operations include AND, OR,
NOT, and XOR, which determines the behavior of computer programs and algorithms.
f. Addressing and Storage: In memory and storage systems, bits are used to address
specific locations and to indicate the presence or absence of data at those locations.

The Binary Place Value System:

The power of binary representation lies in its place value system. Each digit's position in a
binary number signifies a specific power of 2. Starting from the right and moving left, the
powers of 2 increase by one for each position.

Example: In the binary number "10110," the rightmost digit (0) represents 2^0 (which is 1),
the next digit to the left (1) represents 2^1 (which is 2), and so on. The leftmost digit (1)
represents 2^4 (which is 16).

i.e., (10110)2 = 1 2 ^ 4 , 0 2 ^ 3 , 1 2 ^ 2 , 1 2 ^ 1 , 0 2 ^ 0
= 116, 08, 14, 12, 01
= 16, 0, 4, 2, 0

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The above sum gives the decimal equivalent value for the given binary number.

i.e., (10110)2 = (16+0+4+2+0)

(10110)2 = (22)10

(Refer to Table 1 for decimal to binary converted values)

Digital Representation:
In digital electronics, binary digits are used to represent logical states. A "0" might represent
"off" or "false," while a "1" might represent "on" or "true."

Computers use binary digits to represent and process data internally. These digits are stored
in memory, manipulated by the central processing unit (CPU), and used to perform
calculations and execute instructions.

Binary Number System:

When using the binary number system, the two digits "0" and "1" are used to carry out all
required operations. We have a base of 2 in the Binary Number System. The binary number
system's base is often called the radix of the number system.

When using a binary number system, we would write the number as,
(11001)2

A binary number with a base of two is provided in the example above. A binary number
system refers to each digit as a "bit." There are Five digits in the example above.

Binary Number Table

In the below table 1, the left column represents decimal numbers (0 to 15), and the right
column shows their equivalent binary representations. Each digit in the binary
representation is either a "0" or "1," with the rightmost digit representing the least
significant bit (LSB) and the leftmost digit representing the most significant bit (MSB).

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Table 1: Binary Number Table

Decimal Binary
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
10 1010
11 1011
12 1100
13 1101
14 1110
15 1111

3.1 Binary to Decimal Conversion

To convert a binary number to a decimal number, multiply each binary digit by the matching
power of two, which can be 1 or 0.

Let us consider that a binary number has n digits, B = dn-1…d3d2d1d0. (B stand for a given
Binary number, and d stands for a digit).

The corresponding decimal number for the given Binary number can be represented as :

D = (bn-1 x 2 n-1) + … + (b3 x 23) + (b2 x 22) + (b1 x 21) + (b0 x 20)

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Example:

Convert (10010)2 to a decimal number.

Solution:

The given binary number is (10010)2

(10010)2 = (1 x 24) + (0x 23) + (0 x 22) +(1 x 21) + (0 x 20)

= 16 + 0 + 0 + 2 + 0

= (18)10

3.2 Decimal to Binary Conversion

When we divide a given decimal number by 2 repeatedly until the quotient equals 1, we have
converted the decimal number to a binary number. The numbers are written from
downward to upward.

Example:

Convert (32)10 into a binary number.

Solution:

Hence, (30)10 is expressed as (11110)2 in the binary number.

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3.3 Arithmetic Operations on Binary Numbers

Arithmetic Operations on Binary Number encompasses addition, subtraction, multiplication,
and division. Binary arithmetic operation starts from the least significant bit i.e., from the
rightmost side.

I. Binary Addition
Binary addition is a fundamental operation in the binary number system, like addition in the
decimal (base 10) system. It involves adding two binary numbers together to get their sum.

There are four steps in binary addition, as shown below:

0+0=0

0+1=1

1+0=1

1 + 1 = 10 (here, in 10, the 1 is a carry to the next significant bit)

Example:
1101 (This is 13 in decimal)
+ 101 (This is 5 in decimal)
-----------
10010 (This is 18 in decimal)

In this example, we add the rightmost bits (1 + 1), which equals 2 in decimal. Since 2 is
written as "10" in binary, we write down "0" in the first column and carry over the "1" to the
next column. Then, we continue adding and carrying until we have the final result.

II. Binary Subtraction

Binary subtraction is a mathematical operation that involves subtracting one binary number
from another. In the binary number system, which uses only two digits, 0 and 1, subtraction
is carried out much like in the decimal system but with some specific rules:

a. Bit-by-Bit Subtraction: Starting from the rightmost (least significant) bit, each
corresponding pair of bits in the two binary numbers is subtracted, just like you
would subtract digits in the decimal system.

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b. Borrowing: If the bit being subtracted from is smaller than the bit being subtracted,
you may need to borrow from the next higher-order bit, similar to how you borrow
in decimal subtraction.
c. Result: The result of each bit subtraction is placed in the corresponding position of
the result.

Here are four simple steps to keep in memory:

0–0=0

0 – 1 = 1, borrow 1 from the next more significant bit

1–0=1

1–1=0

Example:
1101 (This is 13 in decimal)
- 0110 (This is 6 decimal)
---------
0111 (This is 7 in decimal)

The binary subtraction of 1101 and 0110 in a single step result in 0111. This outcome is
obtained by subtracting corresponding digits from left to right, considering any necessary
borrowing. Starting with the rightmost digits, 1 minus 0 is 1, and 0 minus 1 requires
borrowing (turning the 1 in the first number into a 0 and borrowing 1), resulting in 1 in the
second position. The process continues: 0 minus 1 (requires borrowing) equals 1, and 1
minus 0 equals 1. So, the final result is 0111.

III. Binary Multiplication

Binary multiplication is multiplying two binary numbers, just like you would multiply two
decimal numbers. In binary multiplication, you only need to work with two binary digits: 0
and 1.

Here are the four steps to be followed,

0×0=0

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1×0=0

0×1=0

1×1=1 (there is no carry or borrow for this)

Example:
1 1 0 (This is 6 in decimal)
X 1 0 1 (This is 5 in decimal)
110
000
110
1 1 1 1 0 ((This is 30 in decimal)

IV. Binary Division

Binary division is a mathematical operation used in the binary number system, which
consists of two digits, 0 and 1. It is similar to division in the decimal number system, but it
involves dividing binary numbers.

Example:

3.4 1’s and 2’s Complement of Binary Numbers

In digital systems, the 1's complement and 2's complement are two methods used to
represent negative binary numbers and perform arithmetic operations. They are essential in
binary arithmetic and are used for signed number representation.

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1's Complement:
1’s Complement of a Binary Number is obtained by flipping/inverting the digits of the binary
number i.e., replacing 0s with 1s and 1s with 0s.

Example: Find the 1’s complement of (11010)2.

(The 1's complement of this number is obtained by changing each 0 to 1 and each 1 to 0) i.e.,
(00101)2.

Thus, 1’s complement of (11010)2 is (00101)2.

2's Complement:
To find the 2's complement of a binary number:
• First, calculate the 1's complement.
• Then, add 1 to the least significant bit (rightmost bit) of the 1's complement.

Example: Find the 2’s complement of (11010)2.

• First, find the 1's complement, which is (00101)2.
• Now, add 1 to the least significant bit of the above result: i.e., (00101 + 1)

Then will get (00110)2. This is the 2's complement of the original binary number.

Thus, 2’s complement of (11010)2 is (00110)2.

Note:
– 1's complement is obtained by flipping all the bits.
– 2's complement is obtained by flipping all the bits and adding 1 to the result.
– Nibble: A group of four digits

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SELF-ASSESSMENT QUESTIONS – 1

1. What is the decimal equivalent of the binary number "10101"?

a) 10
b) 16
c) 21
d) 5
2. What is a nibble in computing?
a) 8 bits
b) 4 bits
c) 16 bits
d) 2 bits
3. In the 1's complement representation of a binary number, what does flipping
a bit from 1 to 0 or from 0 to 1 represent?
a) Addition of 1
b) Subtraction of 1
c) No change in value
d) Logical AND operation

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4. DECIMAL
The ten digits of the decimal number system are 0,1,2,3,4,5,6,7,8, and 9. They range from 0
to 9. Since there are ten digits in the decimal number system overall, the base or radix of the
decimal number system is 10. Thus, using these ten-digit integers, we can represent all the
other digits.

The most widely utilised and easily navigable number system in our daily lives is the decimal
system.

Examples of Decimal Number System

a. 986 can be represented as

= 9×102+8×101+6×100
= 9×100+8×10+6×1
= 900+80+6
= 986

b. The number 450.36 is interpreted as

450.36= 4×102+5×101+0×100+3×10–1+6×10–2
= 4×100+5×10+0×1+0.3+0.06
= 400+50+0+0.3+0.06=
= 450.36

4.1 Conversion from Other Number Systems to Decimal

a. Binary to Decimal
Converting a binary number to a decimal number involves a straightforward process of
assigning each binary digit (0 or 1) to its corresponding place value in the decimal system
and adding up those values.

Here are the steps to convert binary to decimal:

i. Write Down the Binary Number: Start by writing down the binary number you want
to convert.
ii. Assign Place Values: Assign place values to each digit in the binary number, starting
from the right and increasing by powers of 2 for each position. The rightmost digit is

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the units place (2^0), the next is the twos place (2^1), then the fours place (2^2), and
so on as shown in the below example.

Example:
Binary Number: 1 1 0 1
Place Values: 2^3 2^2 2^1 2^0

iii. Calculate the Decimal Value: Multiply each digit in the binary number by its
corresponding place value and add the results.

In the above example,

For the leftmost digit (1) in the binary number, it's in the 2^3 (eighth) place, so you have 1
2^3 = 1 8 = 8.

For the next digit (1), it's in the 2^2 (fourth) place, so you have 1 2^2 = 1 4 = 4.

The third digit (0) is in the 2^1 (second) place, contributing 0 to the total.

The rightmost digit (1) is in the 2^0 (first) place, so you have 1 2^0 = 1 1 = 1.

iv. Sum the Values: Add up the results from step 3.

8 + 4 + 0 + 1 = 13

So, the binary number "1101" is equivalent to the decimal number "13."

b. Octal to Decimal
Octal is a base-8 numbering system, and decimal is a base-10 numbering system. To convert
an octal number to a decimal number, follow these steps:
i. Write Down the Octal Number: Start with the octal number you want to convert.
ii. Assign Powers of 8: Begin from the rightmost digit (the least significant digit) and
move to the left, assigning powers of 8 to each digit's position.

The rightmost digit has a power of 8^0, the next one to the left has 8^1, the next 8^2, and so
on, as shown in the below example.
Octal Number: 3 4 6
Powers of 8: 8^2 8^1 8^0

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iii. Calculate Values: Multiply each digit by its corresponding power of 8 and write down
the results.

For the above example:

3 8^2 = 3 64 = 192
4 8^1 = 4 8 = 32
6 8^0 = 6 1 = 6

iv. Sum the Results: Add up all the results from step 3 to get the decimal equivalent.

For the above example it is 192 + 32 + 6 = 230

So, the octal number 346 is equal to the decimal number 230.

c. Hexadecimal to Decimal
Steps to convert a hexadecimal number to decimal.

i. Write Down the Hexadecimal Number: Start with the given hexadecimal number to
convert to decimal.
ii. Assign Decimal Values to Hexadecimal Digits: In hexadecimal, you have 16 unique
digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, and F. Assign decimal values to these
hexadecimal digits as shown in the below table.

Decimal Hexadecimal
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 A

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11 B
12 C
13 D
14 E
15 F

iii. Evaluate Each Digit's Decimal Value: From the rightmost digit of the hexadecimal
number, multiply each digit by the appropriate power of 16 based on its position
(counting from right to left). The rightmost digit is in the 0th position; the next to the
left is in the 1st position, then the 2nd, and so on.
iv. Calculate Decimal Value for Each Digit: Multiply each digit's decimal value by 16,
raise it to the power of its position, and add up these values.

For example, consider the hexadecimal number "1A3B," and this number would be
calculated as follows:

Hexadecimal Number: 1 A 3 B

Powers of 16: 16^3 16^2 16^1 16 ^0

i.e., for this example:

B (rightmost digit): 11 16^0 = 11 1 = 11 (Note: Decimal Value of B is 11)
3 (next digit to the left): 3 16^1 = 3 16 = 48
A (next digit to the left): 10 16^2 = 10 256 = 2560
1 (leftmost digit): 1 16^3 = 1 4096 = 4096

v. Sum the Decimal Values: Add the decimal values you calculated for each digit.

i.e., 11 + 48 + 2560 + 4096 = 6725

The sum is the equivalent decimal representation of the given hexadecimal number.

In this example, "1A3B" in hexadecimal equals "6725" in decimal.

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4.2 Conversion of Decimal to Other Number Systems

a. Decimal to Octal
Converting a decimal number to octal (base 8) involves dividing the decimal number by 8
repeatedly and noting the remainder at each step.

Steps to follow:

Let 394 be the decimal number,

i. Start with the decimal number, which is 394.
ii. Divide 394 by 8:
394 ÷ 8 = 49 with a remainder of 2.
iii. Write down the remainder, which is 2.
iv. Take the quotient (49 in this case) and divide it by 8:
49 ÷ 8 = 6 with a remainder of 1.
v. Write down the new remainder, which is 1, next to the previous remainder (2). So far,
we have "12" as our octal representation.
vi. Take the quotient (6) and divide it by 8:
6 ÷ 8 = 0 with a remainder of 6.
vii. Write down the new remainder, which is 6, next to the previous remainders. Now, we
have "612."
viii. Since the quotient has become 0, we stop.

So, the octal representation of the decimal number 394 is 612.

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b. Decimal to Hexadecimal
Converting a decimal number to hexadecimal (base-16) involves dividing the decimal
number by 16 repeatedly and keeping track of the remainder.

The steps to convert a decimal number to hexadecimal:

i. Start with the Decimal Number: Begin with the decimal number you want to convert
to hexadecimal.
ii. Divide by 16: Divide the decimal number by 16. Note both the quotient and the
remainder.

Example: Let's say you have the decimal number 314.

314 ÷ 16 = 19 with a remainder of 10.

iii. Write Down the Remainder: Write down the remainder as a hexadecimal digit. In
base-16, the digits go from 0 to 9 and A to F, representing values 10 to 15.

In our example, a remainder of 10 equals 'A' in hexadecimal.

iv. Continue Dividing: Take the quotient from step 2 and repeat the process. Divide it by
16 and record the remainder.
19 ÷ 16 = 1 with a remainder of 3.

v. Write Down the New Remainder: Write down this new remainder as another
hexadecimal digit.

In our example, a remainder of 3 remains '3' in hexadecimal.

vi. Repeat Until Quotient is 0: Continue dividing the quotient by 16 and writing down
the remainder until the quotient becomes 0.
1 ÷ 16 = 0 with a remainder of 1.

vii. Write Down the Final Remainder: The last remainder is the final hexadecimal digit.

In our example, a remainder of 1 is '1' in hexadecimal.

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viii. Arrange the Hexadecimal Digits: Write down the hexadecimal digits you've found
in reverse order (from the last remainder to the first). This is your hexadecimal
representation of the decimal number.

In our example, the decimal number 314 in hexadecimal is '13A'.

SELF-ASSESSMENT QUESTIONS – 2

4. What is the place value of the rightmost digit in a decimal number?

a) Tens
b) Hundreds
c) Thousands
d) Ones (units)
5. What is the decimal equivalent of the binary number "1011"?
a) 5
b) 7
c) 11
d) 13

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5. HEXADECIMAL NUMBER SYSTEM

Hexadecimal (often abbreviated as "hex") is a number system used in computer science and
digital systems alongside the more common decimal (base 10) and binary (base 2) number
systems. Hexadecimal is base 16, which uses 16 distinct symbols to represent numbers. The
symbols used in hexadecimal are the familiar 0-9 digits followed by the letters A to F,
representing the decimal values 10 to 15.

Here's the complete list of hexadecimal digits:

0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F. The below table shows the decimal number and its
corresponding hexadecimal number.

Decimal Hexadecimal
0 0
1 1
2 2
3 3
4 4
5 5
6 6
7 7
8 8
9 9
10 A
11 B
12 C
13 D
14 E
15 F

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5.1 Conversion of Hexadecimal into A Decimal Number

Converting a hexadecimal number to a decimal number involves multiplying each digit in the
hexadecimal number by the appropriate power of 16 and then adding up the results.

The steps to convert a hexadecimal number to decimal:

i. Write Down the Hexadecimal Number: Start with the hexadecimal number you want
to convert. For example, the hexadecimal number "1A3."
ii. Assign Decimal Values to Hexadecimal Digits: Assign decimal values to each digit. In
hexadecimal, the digits 0-9 are the same as in decimal, but the letters A through F
represent the values 10 through 15, respectively, as shown in the above table. So, in this
example, "1A3," "1" represents 1 in decimal, "A" represents 10 in decimal, and "3"
represents 3 in decimal.
iii. Calculate the Decimal Value for Each Digit: For each digit in the hexadecimal number,
multiply its decimal value by the appropriate power of 16. Start with the rightmost digit
(the least significant digit) as 16^0, then increase the power by 1 as you move to the
left.

For "3," the calculation is 3 16^0 = 3 1 = 3.

For "A," the calculation is 10 16^1 = 10 16 = 160.
For "1," the calculation is 1 16^2 = 1 256 = 256.

iv. Add Up the Decimal Values: Add up the decimal values you calculated for each digit.
3 + 160 + 256 = 419

v. So, the hexadecimal number "1A3" is equivalent to the decimal number 419.

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SELF-ASSESSMENT QUESTIONS – 3

6. In hexadecimal, what does the digit "C" represent in decimal?

a) 10
b) 11
c) 12
d) 13
7. Convert the hexadecimal number "1F" into its decimal equivalent.
a) 15
b) 25
c) 31
d) 32

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6. SUMMARY
Number System: A number system is a way of representing and working with numbers.
Computers use various number systems to store and process data efficiently.

Binary (Base-2): Binary is a number system that uses only two digits, 0 and 1. It's
fundamental in computing because computers use electronic switches that have two states,
making binary representation convenient.

Binary to Decimal Conversion: Converting binary numbers to decimal involves multiplying

each digit by the appropriate power of 2 and adding the results.

Decimal to Binary Conversion: Converting decimal numbers to binary involves repeatedly

dividing the decimal number by 2 and recording the remainder to obtain the binary
representation.

Arithmetic Operations on Binary Numbers: Binary arithmetic includes addition, subtraction,

multiplication, and division, using the rules of binary addition and carry.

1’s and 2’s Complement of a Binary Number: The 1's complement of a binary number is
obtained by changing all 0s to 1s and vice versa. The 2's complement is the 1's complement
plus 1. These are used in binary subtraction and signed number representation.

Decimal (Base-10): The decimal system is the number system most commonly used by
humans. It uses ten digits, 0-9, and each digit's position represents a power of 10.

Octal (Base-8): Octal is a number system that uses eight digits, 0-7. It's used less frequently
than binary and decimal but is still relevant in some contexts, such as Unix file permissions.

Hexadecimal (Base-16): Hexadecimal is a number system that uses sixteen digits, 0-9 and A-
F, where A represents 10, B represents 11, and so on. It's often used in computing to
represent binary data more compactly and is common in programming and memory
addressing.

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7. TERMINAL QUESTIONS
1. Compare and contrast the binary, decimal, octal, and hexadecimal number systems.
2. Describe the steps involved in converting a binary number to decimal. Provide an
example.
3. How is binary subtraction different from binary addition? Demonstrate binary
subtraction with an example.
4. Find the 1's complement and 2's complement of the binary number "110010."
5. Convert the hexadecimal number "1A3" into its binary and decimal equivalents.
6. Explain the octal number system. How does it relate to binary and decimal?
7. Convert the decimal number 243 into binary, octal, and hexadecimal representations.

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8. ANSWERS
Self-assessment Answer
1. 21
2. 4 bits
3. subtraction of 1
4. ones(units)
5. 7
6. 12
7. 31

Terminal Answers
1. Refer to section 3, 4, 5, 6
2. Refer to section 3.1
3. Refer to section 3.3
4. Refer to section 3.4
5. Refer to section 6.
6. Refer to section 5
7. Refer to section 4

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 5
Boolean Algebra and Logic Gates

Table of Contents

SL Fig No / Table / SAQ /

Topic Page No
No Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Boolean Algebra - 1
4-6
2.1 Binary Operations - -
3 De-Morgan’s law 1, 2, 3, 4 2 7-10
4 Simplification of Boolean algebra - 3
11-16
4.1 Standard Form of Boolean Expression - -
5 Basic and Universal Logic Gates - 4

5.1 Basic Gate: NOT Gate, AND Gate, OR - - 17-22

Gate, XOR Gate, XNOR Gate
5.2 Universal Gate: NAND Gate, NOR Gate - -
6 Summary - - 23
7 Terminal Questions - - 24
8 Answers - - 24-25

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1. INTRODUCTION
Boolean algebra and logic gates provide the foundational framework for designing and
understanding digital systems. They enable the manipulation and processing of binary
information, allowing us to create the complex and sophisticated technologies that shape our
digital world. Whether you're designing a simple logic circuit or working on advanced
computer architecture, a solid grasp of Boolean algebra and logic gates is essential for
success in the field of computer science and digital electronics.

Boolean algebra, named after the mathematician George Boole, provides a rigorous and
mathematical framework for working with binary variables. Unlike traditional algebra,
which operates on real numbers, Boolean algebra deals with binary values – often denoted
as '0' and '1.' These binary values correspond to 'false' and 'true,' 'off' and 'on,' or 'no' and
'yes' in various contexts.

The core operations in Boolean algebra include AND, OR, and NOT. These operations are
represented by logical operators, which take one or more binary inputs and produce binary
outputs.

1.1 Learning Objectives

At the end of this unit, students should be able to:
❖ Define Boolean algebra and its significance in digital logic.
❖ Explain the basic elements of Boolean algebra, such as binary variables, logical operators,
and truth tables.
❖ Comprehend De-Morgan's law and its role in simplifying Boolean expressions.
❖ Use Boolean algebra rules and techniques to simplify logical expressions.
❖ Identify and describe the basic logic gates: NOT, AND, and OR gates.
❖ Demonstrate the ability to design and implement simple logic circuits using basic logic
gates (NOT, AND, OR).

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2. BOOLEAN ALGEBRA
Boolean algebra, named after the mathematician George Boole, is a fundamental
mathematical system that plays a pivotal role in computer science, digital electronics, and
various engineering fields—at its core, Boolean algebra deals with binary information,
making it the ideal tool for modelling and analysing digital systems, where everything boils
down to two states: true or false, on or off, 1 or 0.

Binary Foundation
At the heart of Boolean algebra lies the binary number system, which employs only two
digits, 0 and 1, to represent numbers and make logical decisions. This simplicity forms the
basis for Boolean logic, as it aligns with the binary states of digital electronic components
such as transistors, which can be in one of two states—on or off.

2.1 Binary Operations

Boolean algebra revolves around three primary logical operations: AND, OR, and NOT.
i. AND Operation (Conjunction):
• The AND operation returns true (1) only when both inputs are true (1). Otherwise,
it returns false (0).
• Symbolically represented as '∧'.
• For example, consider two binary inputs A and B. The AND operation (A ∧ B)
yields 1 only when both A and B are 1; otherwise, it results in 0.

Truth Table:

A B A^B
0 0 0
0 1 0
1 0 0
1 1 1

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ii. OR Operation (Disjunction):

• The OR operation returns true (1) when at least one of its inputs is true (1). It
returns false (0) only when both inputs are false (0).
• Symbolically represented as '∨'.
• For example, for inputs A and B, the OR operation (A ∨ B) produces 1 if either A or
B (or both) is 1; otherwise, it results in 0.

Truth Table:

A B A∨B
0 0 0
0 1 1
1 0 1
1 1 1

iii. NOT Operation (Negation):

• The NOT operation inverts the input; it changes true (1) to false (0) and vice versa.
• Symbolically represented as '¬' or using a bar over the variable.
• For example, for input A, the NOT operation (¬A or A̅ ) produces the opposite value
of A.

Truth Table:

A ¬A
0 1
1 0

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SELF-ASSESSMENT QUESTIONS – 1

1. What is the result of the Boolean operation A AND 0?

a) 0
b) 1
c) A
d) NOT A
2. Which of the following Boolean operations is represented by the symbol '+'?
a) AND
b) OR
c) XOR
d) NOT
3. What is the binary equivalent of the decimal number 9?
a) 1001
b) 1010
c) 1100
d) 1110
4. A ∨ B = ? when A=0 and B=1.

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3. DE-MORGAN’S LAW
• De Morgan's Laws are a fundamental set of rules in Boolean algebra that describe
negating (invert) complex logical expressions involving the AND and OR operations.
There are two De Morgan's Laws:
i. De Morgan's First Law
ii. De Morgan's Second Law

i. De Morgan's First Law :

The complement (negation) of the union of two sets A and B is equal to the intersection of
the complements of A and B.

Mathematically: (A ∪ B)' = A' ∩ B'

Fig 1: Venn Diagram for (A ∪ B)’

Consider two sets, A and B, represented by circles in a Venn diagram:

• The shaded region represents A ∪ B, the union of sets A and B as shown in figure 1.
• The complement (negation) of A ∪ B is the region outside the shaded area, represented
by (A ∪ B)'.

Now, let's apply De Morgan's First Law:

• A' represents the complement of set A, which is the region outside circle A.
• B' represents the complement of set B, which is the region outside circle B.

The intersection of A' and B' is the region outside both circles A and B, which is exactly the
same as (A ∪ B)' as shown in figure 2.

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Fig 2: Venn Diagram for A’ ∩ B’

Hence Mathematically, (A ∪ B)' = A' ∩ B' is proved.

ii. De Morgan's Second Law (for Sets):

The complement (negation) of the intersection of two sets, A and B, is equal to the union of
the complements of A and B.

Mathematically: (A ∩ B)' = A' ∪ B'

Fig 3: Venn Diagram for (A ∩ B)’

Consider the same two sets A and B represented by circles in a Venn diagram:
• The shaded region represents A ∩ B, which is the intersection of sets A and B.
• The complement (negation) of A ∩ B is the region outside the shaded area, represented
by (A ∩ B)' as shown in Figure 3.

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Now, let's apply De Morgan's Second Law:

• A' represents the complement of set A, which is the region outside circle A.
• B' represents the complement of set B, which is the region outside circle B.

The union of A' and B' is the region outside either circle A or B, which is exactly the same as
(A ∩ B)' as shown in Figure 4.

Fig 4: Venn Diagram for A’ ∪ B’

Mathematically, (A ∩ B)' = A' ∪ B' is proved.

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SELF-ASSESSMENT QUESTIONS – 2

5. What does De Morgan's First Law state?

a) The AND operation distributes over the OR operation.
b) The OR operation distributes over the AND operation.
c) The complement of the OR operation is equal to the OR of the complements.
d) The complement of the AND operation is equal to the AND of the
complements.
6. Which of the following is an application of De Morgan's Laws?
a) Adding two binary numbers.
b) Simplifying Boolean expressions.
c) Finding the sum of a series of numbers.
d) Calculating the square root of a number.

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4. SIMPLIFICATION OF BOOLEAN ALGEBRA

Boolean algebraic expressions can be simplified using a few fundamental principles to its
variables, literals, and phrases.

a. Identity Law:
• A+0=A
• A*1=A

These laws state that the ORing of any Boolean variable with 0 or the ANDing of any
Boolean variable with 1 results in the original variable.

Example:
Let's say we have a Boolean variable A. Applying the identity law:
A + 0 = A (ORing with 0)
A * 1 = A (ANDing with 1)

b. Null Law:
• A + A' = 1,
• A * A' = 0

The null law states that the ORing of a Boolean variable with its complement (NOT of
the variable) results in 1, and the ANDing of a variable with its complement results in
0.

Example:
Using Boolean variable A:
• A + A' = 1 (ORing with its complement)
• A * A' = 0 (ANDing with its complement)
c. Idempotent Law:
• A+A=A
• A * A = A):

The idempotent law states that ORing or ANDing a variable with itself has no effect;
the result is the original variable.

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Example:
Using Boolean variable A:
A + A = A (ORing with itself)
A * A = A (ANDing with itself)

d. Inverse Law:
• A + A' = 1
• A * A' = 0

This law specifies that the ORing of a Boolean variable with its complement (NOT of the
variable) results in 1, and the ANDing of a variable with its complement results in 0.

Example:
Using Boolean variable A:
A + A' = 1 (ORing with its complement)
A * A' = 0 (ANDing with its complement)

e. Commutative Law:
• A+B=B+A
• A*B=B*A

The commutative law states that the order of variables in an OR or AND operation
doesn't affect the result.

Example:
Using Boolean variables, A and B:
• A + B = B + A (ORing in different orders)
• A * B = B * A (ANDing in different orders)
f. Associative Law:
• (A + B) + C = A + (B + C)
• (A * B) * C = A * (B * C)):

The associative law states that the grouping of variables in an OR or AND operation
doesn't affect the result.

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Example:
Using Boolean variables, A, B, and C:
(A + B) + C = A + (B + C) (Associative in OR)
(A * B) * C = A * (B * C) (Associative in AND)

g. Distributive Law:
• A + (B * C) = (A + B) * (A + C)
• A * (B + C) = (A * B) + (A * C)):

The distributive law describes how OR and AND operations can be distributed over one
another.

Example:
Using Boolean variables A, B, and C:
• A + (B * C) = (A + B) * (A + C) (Distributive with OR over AND)
• A * (B + C) = (A * B) + (A * C) (Distributive with AND over OR)
h. Absorption Law:
• A + (A * B) = A
• A * (A + B) = A):

The absorption law states that when you combine a variable with the result of an AND
or OR operation involving itself, it simplifies the variable.

Example:
Using Boolean variables, A and B:
A + (A * B) = A (Absorption with OR)
A * (A + B) = A (Absorption with AND)

i. Demorgan’s Law:
• (A + B)' = A' * B'
• (A * B)' = A' + B'

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De Morgan's Laws describe distributing the NOT operation over OR and AND operations.

Example:
Simplify: AB + A (B + C) + B (B + C)
Solution: AB + AB + AC + BB + BC
AB + AB + AC + B + BC
AB + AC + B + BC
AB + AC + B
B + AC

Simplify: C + (BC)'
Solution: C + (B + C) '
= ( C + C') + B'
= 1 + B'
=1

4.1 Standard form of Boolean expression (Canonical Form)

Boolean expressions can be represented in different forms, with the two most common
forms being the Sum of Products (SOP) and Product of Sums (POS). The standard form of

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a Boolean expression refers to a simplified representation where terms are combined using
AND and OR operations. It typically consists of minterms (in SOP) or maxterms (in POS).

Boolean expressions can be evaluated, simplified, and implemented in a much more

methodical and straightforward manner with standardisation.

a. The Sum of Products (SOP) Form: (sum of minterms)

The resulting expression after summing two or more product terms by Boolean addition is
called a sum-of-products (SOP). These product terms are also called ‘min-terms’.

Example:
If a function is given as; f (A, B, C)=∑m(3,5,6,7)
Y=m3+m5+m6+m7
Y=A 'BC+AB 'C+ABC '+ABC

b. The Products of Sums (POS) Form: (sum of max terms)

The resulting expression after multiplying two or more sum terms is called a Product-of-sum
(POS). These product terms are also called ‘min-terms’. These sum terms are also called max
terms.

Example:
If a function is given as; F (A, B, C) =ΠM (0,1,2,4)
Y=M0* M1* M2 * M4
Y=(A+B+C) (A+B+C') (A+B'+C) (A'+B+C)

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SELF-ASSESSMENT QUESTIONS – 3

7. Which of the following is an application of De Morgan's Laws?

a) Adding two binary numbers.
b) Simplifying Boolean expressions.
c) Finding the sum of a series of numbers.
d) Calculating the square root of a number.
8. What is the standard form for a Boolean expression in SOP (Sum of Products)
form?
a) A sum of OR operations
b) A product of AND operations
c) A combination of AND and OR operations
d) A difference of two variables

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5. BASIC AND UNIVERSAL LOGIC GATES

5.1 Basic Gate: NOT Gate, AND Gate, OR Gate.
Basic Gates form the building blocks of digital circuits. These gates manipulate binary (0 and
1) signals based on certain logical operations. The fundamental logic gates include:

a. Not Gate (Inverter)

A NOT gate, also known as an inverter, is a fundamental digital logic gate in electronics and
computer science. Its primary function is to perform the negation operation on a binary input
signal. In simple terms, a NOT gate takes an input signal and produces the opposite output.

If the input is 0 (or 'false'), the NOT gate outputs 1 (or 'true').

If the input is 1 (or 'true'), the NOT gate outputs 0 (or 'false').

Symbol:

Truth Table:

b. AND Gate
An AND gate is a fundamental digital logic gate in electronics and computer science. It has
two or more input terminals and a single output terminal. The AND gate produces a true
(logical 1) output only when all of its input terminals are true (logical 1). In other words, it
performs the logical "AND" operation, and its output is true if and only if all of its input

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signals are true; otherwise, the output is false (logical 0). The symbol for an AND gate
typically consists of the AND operator (∧) enclosed within a circle, and it is used to create
and control logical conditions in various digital circuits and systems.

Symbol and Truth Table

c. OR Gate
An OR gate is a digital logic gate that takes one or more binary inputs and produces an output
based on the logical OR operation. The output of an OR gate is "true" (1) if at least one of its
inputs is "true" (1), and it is "false" (0) only when all of its inputs are "false" (0).

Symbol and Truth Table

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d. XOR Gate
An XOR gate, the "Exclusive OR" gate, is a digital logic gate used in electronics and computer
engineering. It has two or more inputs and a single output. The XOR gate outputs a true
(logical 1) value if an odd number of its inputs are true, and it produces a false (logical 0)
value if an even number of inputs are true.

Symbol and Truth Table

e. XNOR Gate
An XNOR gate, also known as an equivalence gate or an exclusive-NOR gate, is a digital logic
gate in electronics. The XNOR gate has two or more inputs and one output. It performs a
specific logical operation on its inputs and produces an output based on that operation.

The XNOR gate operates as follows:

• If an even number of its inputs are set to the binary value '1' (true), it outputs '1' (true).
• If an odd number of its inputs are set to '1,' it outputs '0' (false).

Symbol and Truth Table

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5.2 Universal Gate: NAND Gate, NOR Gate

A universal gate, in digital electronics, refers to a logic gate that can be used to implement
any other basic logic gate (AND, OR, NOT, NAND, NOR, XOR, XNOR).

The two most common universal gates are:

i. NAND Gate:
A NAND gate, short for "NOT-AND" gate, is a fundamental logic gate in digital electronics. It
has two or more inputs and one output. The primary function of a NAND gate is to perform
a logical AND operation on its inputs and then negate (invert) the result.

Here's how a NAND gate works:

• If all its inputs are 1 (true), the output is 0 (false).
• If any of its inputs are 0 (false), the output is 1 (true).

Symbol and Truth Table:

ii. NOR Gate

A NOR gate, in digital electronics, is a fundamental logic gate that performs a logical NOR
operation. It has two or more input terminals (typically two) and one output terminal. The
NOR gate produces a high output (often represented as '1' or 'true') only when none of its
input terminals are at a high level (0 or 'false'). In other words, it provides a 'true' output if
and only if all of its inputs are 'false.'

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SELF-ASSESSMENT QUESTIONS – 4

9. Which of the following gates is NOT a universal gate?

a) AND gate
b) OR gate
c) NOT gate
d) NAND gate
10. Which Boolean operation does the AND gate correspond to?
a) Addition
b) Multiplication
c) Subtraction
d) Division
11. What is the standard form of a Boolean expression that represents the ORing
of multiple product terms?
a) Sum of Products (SOP)
b) Product of Sums (POS)
c) Standard of Sum (SOS)
d) Sum of Sums (SOS)

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12. Which logic gate is considered a universal gate and can be used to create any
other basic logic gate?
a) AND gate
b) OR gate
c) XOR gate
d) NAND gate
13. What does an XNOR gate output when all of its inputs are '1'?
a) '1'
b) '0'
c) Undefined
d) 'X'
14. Which gate is the opposite of the XOR gate and outputs '1' when the number
of '1's in its inputs is even?
a) NOR gate
b) OR gate
c) AND gate
d) XNOR gate.

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6. SUMMARY
Boolean algebra is a branch of mathematics that deals with binary variables and logical
operations. It's fundamental in digital logic design and computer science. Key concepts in
Boolean algebra include binary operations, De Morgan's laws, simplification of expressions,
and the use of logic gates.

Binary Operations: Binary operations in Boolean algebra involve the use of two binary
variables (0 and 1) and logical operations like AND, OR, NOT, XOR, and XNOR. These
operations are the building blocks for creating more complex logical expressions.

De-Morgan’s Law: De Morgan's laws are fundamental rules in Boolean algebra that describe
how to negate complex logical expressions involving AND and OR operations. They include
De Morgan's First Law (negation of OR) and De Morgan's Second Law (negation of AND).

Simplification of Boolean Algebra: Simplification in Boolean algebra involves reducing

complex logical expressions to their simplest form. It's essential for digital circuit design.
Techniques include using Boolean algebraic rules, Karnaugh maps, and algorithms like
Quine-McCluskey.

Standard Form of Boolean Expression: The standard form of a Boolean expression

represents a simplified version of the logical expression, either as a Sum of Products (SOP)
or a Product of Sums (POS), where terms are combined using AND and OR operations.

Basic and Universal Logic Gates: Basic logic gates are the fundamental building blocks of
digital circuits, performing logical operations. They include the NOT gate, AND gate, OR gate,
XOR gate, and XNOR gate. Universal gates, such as the NAND gate and NOR gate, can be used
to implement any other basic logic gate, making them versatile components in digital circuit
design.

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7. TERMINAL QUESTIONS
1. Draw the logic diagram for the simplified expression using basic logic gates (NOT, AND,
OR, XOR, XNOR). (6.1)
2. Explain how De Morgan's laws can be applied to simplify complex Boolean expressions
and provide an example. (3)
3. Define the standard form of a Boolean expression and explain its significance in digital
circuit design. (4.1)
4. Elucidate the fundamental principles of Boolean algebraic expressions. (4)
5. Simplify: XY + X (B+Z) + Y(Y+Z) (4)
6. Explain universal gates with their symbols and truth table. (5.2)

8. ANSWERS
Self-Assessment Answers
1. 0
2. OR
3. 1001
4. 1
5. The complement of the AND operation is equal to the AND of the complements.
6. Simplifying Boolean expressions.
7. Products (AND operations)
8. A product of AND operations
9. AND Gate
10. Multiplication
11. Sum of Products (SOP)
12. NAND Gate
13. .1
14. XNOR Gate

Terminal Answers
1. Refer to Section 5.1
2. Refer to Section 3
3. Refer to Section 4.1

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4. Refer to Section 4
5. Refer to Section 4
6. Refer to Section 5.2

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

Unit 6: Simplification Methods 1

Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 6
Simplification Methods

Table of Contents

SL Fig No / Table SAQ /

Topic Page No
No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 K-map and Tabulation Method - 1
4-5
2.1 Introduction to Karnaugh Maps - -
3 K-Map Basics - 2

3.1 Rules to Follow in Karnaugh Maps 1 -

3.2 Filling the K-Map - - 6-14
3.2.1 Grey Code - -
3.3 Grouping and Simplification - -
4 K-Map Design - 3

4.1 Designing 2 – Variable K-Map - -

4.2 Designing 3 – Variable K-Map - - 15-22
4.3 Designing 4 – Variable K-Map - -
4.4 Differences between SOP and POS - -
5 Don’t Care Condition - 4

5.1 Guidelines for Karnaugh Maps - 23-25

-
Incorporating Don't Care Conditions
6 Challenges and Limitations of K-Map - 5 26-27
7 Summary - - 28-29
8 Practice Problems - - 30-32
9 Terminal Questions - - 33
10 Answers - - 34

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

1. INTRODUCTION
In digital electronics and Boolean algebra, simplification methods are essential for
optimising logical functions and minimising the complexity of digital circuits. Among these
methods, Karnaugh Maps, commonly known as K-Maps, provide a graphical and systematic
approach for simplifying Boolean expressions. K-Maps are especially valuable for their
ability to streamline the design and analysis of digital circuits.

K-Maps are visual tools that transform complex Boolean expressions into simpler, more
manageable forms. Their significance lies in their capacity to improve circuit efficiency,
reduce the number of logic gates, minimise power consumption, and enhance signal
propagation speed. This introduction will explore the fundamental concepts of K-Maps and
their application in Boolean simplification.

1.1 Learning Objectives

At the end of this topic, students should be able to,
❖ Define what a Karnaugh Map (K-Map) is and its purpose in digital logic.
❖ Recall the grid structure of a K-Map for a specific number of variables.
❖ Explain the relationship between a truth table and the K-Map.
❖ Describe the difference between Sum of Products (SOP) and Product of Sums (POS) K-Map
representations.
❖ Interpret the meaning of '1' and '0' in a K-Map in the context of Boolean functions.
❖ Create a K-Map for a given Boolean function with a specific number of variables.

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2. K-MAP AND TABULATION METHOD

Karnaugh Maps, often called K-Maps, are a graphical method used in digital electronics and
Boolean algebra for simplifying Boolean expressions. They provide a systematic and visual
approach to reducing complex logical functions into simplified forms, which can significantly
improve the design and optimization of digital circuits.

2.1 Introduction to Karnaugh Maps

A K-Map is a grid structure, typically in the form of a two-dimensional table. The grid's
dimensions are determined by the number of input variables in the Boolean expression. For
example, a Boolean function with two variables would require a 2x2 K-Map, while one with
three variables would need a 2x2x2 (or 2^3) K-Map. Each cell in the grid represents a unique
input combination of 0s and 1s.
✓ Number of cells required in K-Map = 2n cells
✓ K-Map is based on 3 types of input values (0, 1, don’t care)

Significance:
1. Simplification: K-Maps are an effective tool for simplifying Boolean expressions,
reducing the number of logic gates required, and making circuit designs more efficient.
2. Visualization: K-Maps provide a visual representation of the truth table for a Boolean
function, making it easier to see patterns and identify opportunities for simplification.
3. Error Reduction: By working with a graphical representation, the chances of human
error in simplification are minimised.
4. Optimization: K-Maps help optimise digital circuits, reducing component count, power
consumption, and signal propagation delays.
5. Ease of Learning: K-Maps are a valuable tool for students learning Boolean algebra
and digital logic, as they offer a straightforward approach to simplification.

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SELF-ASSESSMENT QUESTIONS – 1

1. What determines the dimensions of a Karnaugh Map (K-Map)?

a) The number of cells required
b) The number of input variables in the Boolean expression
c) The number of logic gates in the circuit
d) The size of the truth table
2. How many cells are required in a K-Map for a Boolean function with 'n' input
variables?
a) n cells
b) 2 cells
c) 2n cells
d) 3 cells
3. The significance of K-Maps in digital logic and circuit design is__________________
a) To increase the number of logic gates
b) To introduce errors in the circuit
c) To visualise truth tables
d) To simplify Boolean expressions and optimise circuit designs

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3. K-MAP BASICS
K-Maps are structured grids tailored to the number of variables in a given function. They
allow for the effective identification of patterns and relationships among variables, making
simplification more intuitive. K-Maps come in two primary forms: Sum of Products (SOP)
and Product of Sums (POS), each serving distinct purposes in circuit design. Through K-
Maps, complex Boolean expressions can be streamlined to improve circuit efficiency.

3.1 Rules to Follow in Karnaugh Maps

To effectively use K-Maps for Boolean simplification, several rules and guidelines should be
followed:
1. K-Map Setup: Create a K-Map grid with cells corresponding to all possible input
combinations, based on the number of variables in the Boolean function.
2. Cell Values: Fill in the cells of the K-Map with the corresponding function values (0 or
1) based on the truth table.
3. Grouping: Identify groups of adjacent 1s (or 0s) in the K-Map. Groups can be
horizontal, vertical, or rectangular in shape. The goal is to find the largest groups
possible.
4. Groups Must Be Powers of 2: Groups should consist of 1, 2, 4, 8, etc., cells. In other
words, groups should be 2^0, 2^1, 2^2, and so on.
5. Minimize Number of Groups: Strive to minimize the number of groups while covering
all 1s (or 0s) in the K-Map.
6. Use the Fewest Number of Cells: Aim to use the fewest number of cells to represent
the simplified Boolean expression. Smaller groups are preferable.
7. Covering All 1s (or 0s): Ensure that every 1 (or 0) in the K-Map is part of at least one
group. No 1 (or 0) should be left out.
8. Don't-Care Conditions: If the truth table includes "don't-care" conditions (output
values that can be either 0 or 1), these can be used to further simplify the expression
by covering them in groups.
9. Prime Implicants: After grouping, identify prime implicants, which are essential
groups that cannot be further simplified.
10. Essential Prime Implicants: Ensure that essential prime implicants are included in
the final simplified expression.

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i.e.,
i. Choose a Karnaugh map (K-map) that corresponds to the number of variables in your
problem.
ii. Determine the minterms or maxterms based on the problem's requirements.
iii. When working with Sum of Products (SOP), mark 1's in the K-map cells
corresponding to the minterms, leaving the others as 0's.
iv. When dealing with Product of Sums (POS), mark 0's in the K-map cells corresponding
to the maxterms, leaving the others as 1's.
v. Create rectangular groups that encompass a total number of terms equal to a power
of two (e.g., 2, 4, 8, except 1). Attempt to cover as many terms as possible within a
single group.
vi. From the groups formed in step 5, identify the product terms and combine them to
create the Sum of Products (SOP) expression.

Fig 1: The K-map Fill Order

3.2 Filling the K-Map

The first step in utilising a K-Map is to fill it with the values derived from the truth table of
the Boolean function. These values are typically 0s and 1s, representing the function output

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for each input combination. This visual representation makes it easier to identify patterns
and opportunities for simplification.

✓ K-Map is based on Grey Code (Unit distance code)

3.2.1 Grey Code

Gray code, also known as reflected binary code or unit distance code, is a binary numeral
system where two successive values differ in only one bit. Gray code, also known as reflected
binary code or unit distance code, is a binary numeral system where two successive values
differ in only one bit.

Gray Code Basics:

• In Gray code, each binary number differs from the previous one by only one bit, creating
a Gray code sequence.
• For instance, in 3-bit Gray code: 000, 001, 011, 010, 110, 111, 101, 100.
• Gray code is cyclic, so the sequence loops back to the beginning.

Structure for different Variables:

For 2- Variables

For 3-Variable:

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Example:

Design a K-Map for the given truth table.

Solution:

3.3 Grouping and Simplification

The core principle of K-Map simplification is the grouping of adjacent 1s (or 0s) in the grid.
Groups can take on various shapes, such as squares, rectangles, or larger groupings. Each
group should consist of a number of cells that is a power of 2 (e.g., 2^0, 2^1, 2^2, etc.). The
goal is to form the largest groups possible while covering all 1s (or 0s) in the K-Map.

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Rules to follow while grouping:

1. No cell with a zero may be included in a group.

2. Groups cannot be diagonal; they can only be vertical or horizontal.

3. Groups have to have one, two, four, eight, or generally 2n cells.

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4. The size of each group should be as large as possible.

5. Every cell that has a one in it needs to belong to at least one group.

6. Groups may overlap

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7. Groups may wrap around the table. It is possible to group the top cell in a column with
the bottom cell, and the leftmost cell in a row with the rightmost cell.

8. As long as this doesn't go against any of the earlier guidelines, there should be the
fewest number of groupings possible.

Note:
1. No zeros allowed.
2. No diagonals.
3. Only power of 2 number of cells in each group.
4. Groups should be as large as possible.
5. Everyone must be in at least one group.
6. Overlapping allowed.
7. Wrap around allowed.

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8. Fewest number of groups possible.

Grouping for the above example:

This can be simplified as A’ B + AB

= B (A’ +A)
= B (1)
=B

Therefore, output should be B for the above example.

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SELF-ASSESSMENT QUESTIONS – 2

4. Which of the following is NOT a rule to follow while grouping cells in a K-Map?
a) No cell with a zero may be included in a group.
b) Groups may be diagonal in shape.
c) Groups have to consist of 1, 2, 4, 8, or 2^n cells.
d) Groups should be as large as possible.
5. In K-Maps, what do "don't-care" conditions in the truth table allow for?
a) They are essential for grouping cells.
b) They are ignored in the simplification process.
c) They are always treated as '1' in the K-Map.
d) They indicate that the function is undefined.
6. Which K-Map representation corresponds to the Sum of Products (SOP) form?
a) Filling the K-Map with '0's for maxterms.
b) Filling the K-Map with '1's for minterms.
c) Identifying the largest groups.
d) Combining product terms for the final expression.
7. What is a distinguishing feature of Grey code?
a) Each binary number is randomly generated.
b) Successive values differ in only one bit.
c) It has no cyclic sequence.
d) It uses a decimal numbering system.

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4. K-MAP DESIGN
Designing a Karnaugh Map (K-Map) involves several key steps to create a grid that can be
used to simplify Boolean functions.
1. Determine the Number of Variables: The first step in designing a K-Map is to determine
the number of variables in the Boolean function you want to simplify. The K-Map will
have a grid with 2^n cells, where 'n' is the number of variables.
2. Create the Grid: Based on the number of variables, create a grid with rows and columns.
For a two-variable function, you'd have a 2x2 grid; for three variables, it's a 4x4 grid,
and so on. Label the rows and columns with binary values to represent all possible
combinations of variable values.
3. Assign Cells to Terms: Each cell in the K-Map represents a term in the Boolean function.
The binary values on the rows and columns indicate which term corresponds to each
cell. For example, in a 3-variable K-Map, cell (0,0,0) corresponds to the term A'B'C', and
cell (1,0,0) corresponds to AB'C', and so on.
4. Fill in the K-Map Based on Truth Table: Populate the cells of the K-Map with the
function's output values. This is typically done by referring to the truth table for the
Boolean function. Place a '1' in the cells where the function evaluates to true (1) and '0'
where it evaluates to false (0).
5. Group Ones to Identify Simplification: The primary purpose of the K-Map is to group
adjacent '1s' (minterms) to identify patterns and simplify the Boolean function. You can
group horizontally, vertically, or both to form groups of 1, 2, 4, 8, or more adjacent cells.
The goal is to find the largest groups possible.
6. Express the Simplified Boolean Function: Once you've identified groups of '1s' in the K-
Map, each group represents a term in the simplified Boolean expression. You can write
down the simplified function as the logical OR of these terms in SOP (Sum of Products)
form. For example, a group of cells might correspond to the term A'B'C' + AB'C, and
another group might correspond to BC'D + BCD'.
7. Account for Don't Care Conditions: In some cases, certain input combinations are "don't
care" conditions, meaning they don't affect the desired output. When designing the K-
Map, handle these don't care conditions appropriately. You can choose to either include
or exclude them from the simplification process.

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8. Validate and Verify: After simplifying the Boolean function based on the K-Map, it's
crucial to validate the results. Ensure that the simplified expression accurately
represents the desired behaviour of the circuit or system. You can also use truth tables
to verify that the original and simplified functions produce the same output for all
possible inputs.

4.1 Designing 2 – Variable K-Map

• Four cells are in the two variable K Map, which equals 22.
• So, we create a 2 x 2 K Map for a Boolean function with two variables.
Format: The below format shows the K-Map format for 2 variables ab.

Example: Design a 2-Variable K-Map for the given truth Table

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Solution:

F= x1’+x2

4.2 Designing 3 – Variable K-Map

• Eight cells are in the three variable K Map, which equals 23.
• So, we create a 2 x 4 K Map for a Boolean function with three variables.
Format: The below format shows the K-Map format for 3 variables abc.

With respect to SOP (m-minterm) and POS (M- maxterm) :

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Example:
Map the following Boolean expression with three variables using K-Map.
f= A’B’C+AB’C+A’BC’+AB’C’+ABC

Solution
The minterms in the given Boolean expression are:
A’B’C=001; AB’C=101; A’BC’=010; AB’C’=100; ABC=111
Therefore,
m1 = A’B’C=001;
m5 = AB’C=101;
m2= A’BC’=010;
m4=AB’C’=100;
m7=ABC=111

Hence, the expression is given by,

f=∑m(1,5,2,4,7)

The K-map of this expression is:

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4.3 Designing 4 – Variable K-Map

• 16 cells are in the four variable K Map, which equals 24.
• So, we create a 4 x 4 K Map for a Boolean function with three variables.
Format: The below format shows the K-Map format for 4 variables ABCD.

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Example: Minimize the following boolean function

F(A, B, C, D) = Σm(0, 1, 2, 5, 7, 8, 9, 10, 13, 15)

Solution:
1. Determine the Number of Variables: In this case, you have four variables (A, B, C, D), so
you'll need a 4-variable K-map.
2. Set Up the K-Map Grid: Create a 4x4 grid for your K-map, corresponding to the possible
combinations of values for the four variables (A, B, C, D). Label the rows and columns with
binary values from 00 to 11 for A and B (rows) and C and D (columns).
3. Fill in the K-Map: Based on the provided function Σm(0, 1, 2, 5, 7, 8, 9, 10, 13, 15), you need
to mark the cells where the function is equal to 1. Place a "1" in the cells corresponding to the
decimal values mentioned in the function. For example, in cell (0,0) (top left corner), you will
place a "1" because m(0) is part of the function.
4. Continue this process for all the cells corresponding to the given decimal values.
5. Group Ones in the K-Map: Look for groups of adjacent "1s" in the K-map. These groups can
be rectangular and should cover as many cells as possible. Groups may also overlap, as
indicated by your problem statement.
6. Write Down the Simplified Expression: Once you've identified the groups, each group
represents a term in the simplified Boolean expression. You can write down the simplified
expression by combining the terms within each group using the OR operator. If a cell is
covered by multiple groups, it should appear in the simplified expression as well.

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Now,
F(A, B, C, D)
= (A’B + AB)(C’D + CD) + (A’B’ + A’B + AB + AB’)C’D + (A’B’ + AB’)(C’D’ + CD’)
= BD + C’D + B’D’

4.4 Differences between SOP and POS

SOP (Sum of Product) POS (Product of Sum)

It uses minterms. It uses maxterms.

Boolean expressions are represented as Boolean expressions are represented as

the sum of product terms. the product of sum terms.

Minterm can be defined as a Boolean Maxterm can be defined as a Boolean

variable product. variable sum.

It is calculated as the sum of minterms. It is calculated as the product of maxterms.

Minterms are represented by the letter 'm' Maxterms are represented by the letter 'M'

It is formed by considering all of It is formed by considering all of the

minterms, whose output is HIGH (1). maxterms, whose output is LOW (0).

The input that has value 1 is considered as input that has value 1 is considered as the
the variable in minterms. complement in maxterms.

The input that has value 0 is considered as The input that has value 0 is considered as
complement of the input. the variable itself.

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SELF-ASSESSMENT QUESTIONS – 3

8. ___________________ is the first step in designing a Karnaugh Map (K-Map)?

a) Populating the K-Map
b) Grouping minterms
c) Determining the number of variables
d) Labeling rows and columns
9. ___________________ is the grid size for a three-variable K-Map?
a) 2x2
b) 4x4
c) 8x8
d) 3x3
10. What does each cell in a K-Map represent?
a) A truth value
b) A term in the Boolean function
c) A don't care condition
d) A gate input
11. When populating a K-Map, what value is placed in cells where the function
evaluates to true?
a) 0
b) 1
c) 'X'
d) 2
12. In a K-Map, how can you group cells for simplification?
a) Horizontally only
b) Vertically only
c) Both horizontally and vertically
d) Diagonally

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5. DON’T CARE CONDITION

Up to this point, the Boolean expressions we've explored have been entirely defined, meaning
that we've designated a minterm, representing them as '1' in the K-Map, for every possible
input variable combination. However, situations can occur where a particular input
combination doesn't have a defined output, or that input combination may be invalid.

These instances, where we haven't specified an output expression for certain combinations,
are referred to as 'don't care combinations.

5.1 Guidelines for Karnaugh Maps Incorporating Don't Care Conditions

The following are the general principles for simplifying expressions using K-Maps, taking
into account don't care conditions:

i. Once you have constructed the K-Map, assign '1's to the specified positions
corresponding to the given minterms. For locations with don't care combinations, use
'X' to represent them.

ii. Proceed to encircle groups within the K-Map. It's important to note that, when
encircling groups, you can treat Don't Care conditions ('X') as '1' if doing so aids in
forming the largest groups. It's worth mentioning that no group can be circled entirely
if all its elements are 'X'.

iii. In the event that there are '1's remaining that cannot be encompassed by any of the
groups, individually encircle these isolated '1's.

iv. Carefully review all the encircled groups and eliminate any redundancies, if any exist.

v. Formulate a Boolean expression for each group that you have encircled.

vi. To obtain the final minimal expression, combine each of the Boolean expressions
obtained from the groups using the OR operation.

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Note:
• When constructing a K-Map in the Sum of Products (SOP) form, don't care conditions
('X') are considered as '1' if this facilitates the creation of larger groups; otherwise, they
are considered as '0' and are retained during the encircling process.

• Conversely, when designing a K-Map in the Product of Sums (POS) form, don't care
conditions ('X') are treated as '0' if doing so assists in forming the largest groups;
otherwise, they are deemed as '1' and are retained when encircling the groups."

Example for Don’t care condition:

1. Minimize the given Boolean Expression by using the four-variable K-Map.

F (A, B, C, D) = Σ m (1, 5, 6, 12, 13, 14) + d (2, 4).

= BC’ + BD’ + A’C’D

This is the simplified boolean expression for the given function.

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SELF-ASSESSMENT QUESTIONS – 4

13. When constructing a K-Map in the Sum of Products (SOP) form, how are don't care
conditions ('X') typically treated?
a) Considered as '1' to form larger groups.
b) Considered as '0' and eliminated from the K-Map.
c) Considered as '1' only when all elements are 'X'.
d) Considered as '0' to maintain the integrity of the K-Map
14. In K-Map simplification, what should be done with isolated '1's that cannot be
encompassed by any group?
a) Ignore them; they don't affect the final expression.
b) Treat them as '0' to remove redundancy.
c) Individually encircle them.
d) Convert them to 'X' to simplify the expression.

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6. CHALLENGES AND LIMITATIONS OF K-MAP

Karnaugh Maps, commonly referred to as K-Maps, are a valuable tool in the field of digital logic for
simplifying Boolean functions, optimizing digital circuits, and minimizing the number of gates and
logic operations required. However, like any method or tool, K-Maps come with their own set of
challenges and limitations.

Challenges of K-Maps:
1. Complexity with Increasing Variables: One of the primary challenges of K-Maps is that their
complexity increases exponentially with the number of variables. As the number of variables
in a Boolean function grows, creating and managing the K-Map grid becomes increasingly
challenging. Four-variable K-Maps are relatively manageable, but once you reach five or more
variables, the map can become unwieldy and difficult to work with.
2. Manual Labor Intensive: K-Maps require a significant amount of manual labor for larger
functions. Filling in the K-Map cells and grouping the terms by hand can be time-consuming,
especially when dealing with many variables or complex functions. It's prone to human error,
and as the size of the K-Map increases, so does the likelihood of mistakes.
3. Limited Applicability: K-Maps are most effective for relatively small to moderately sized
Boolean functions. They are less practical for very large-scale digital circuits, where other
methods and tools, such as computer-aided design (CAD) software, are often employed.
4. Limited to Expressing Canonical Forms: K-Maps are mainly used for expressing functions in
canonical forms, such as Sum of Products (SOP) and Product of Sums (POS). These forms may
not always be the most efficient or intuitive ways to represent functions, especially in
practical circuit design.

Limitations of K-Maps:
1. Limited to 2^n Terms: K-Maps are inherently tied to a power-of-two number of terms (2^n),
which can be restrictive. If a Boolean function does not naturally fit into such a term count,
the K-Map representation may lead to redundant or less efficient expressions.
2. Not Suitable for Non-standard Bases: K-Maps work best when dealing with binary-based
Boolean functions, but they are not well-suited for functions defined in other bases, such as
hexadecimal or octal.

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3. Redundancy in Terms: K-Maps may generate redundant terms in some cases, leading to
suboptimal circuit designs. This is especially true when there are multiple ways to group cells,
or when a function has symmetries that are not exploited.
4. Doesn't Consider Real-world Constraints: K-Maps provide a theoretical solution, but they don't
consider real-world constraints like physical component availability, signal propagation
delays, or power consumption. In practice, circuit design often involves trade-offs that K-
Maps don't account for.
5. Lack of Support for Don't Cares: While K-Maps are excellent at handling known values (0s and
1s), they are less effective at dealing with "don't care" conditions, which are common in
practical digital circuit design. Don't care conditions often require additional analysis beyond
what K-Maps can offer.
6. Requires Clear Truth Tables: Creating a K-Map necessitates a well-defined truth table for the
given function. If the truth table is not clear or accurate, it can lead to errors in the K-Map
representation and the subsequent simplification.

SELF-ASSESSMENT QUESTIONS – 5

15. What is one of the primary challenges of K-Maps as the number of variables in a
Boolean function increases?
a) Decreasing complexity
b) Linear increase in complexity
c) Exponential increase in complexity
d) Constant complexity
16. K-Maps are most effective for which type of Boolean functions?
a) Extremely large circuits
b) Small to moderately sized Boolean functions
c) Functions with a single variable
d) Functions in hexadecimal or octal bases

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7. SUMMARY
Introduction to Karnaugh Maps (K-Maps): Karnaugh Maps, often abbreviated as K-Maps, are a
powerful tool in digital logic design and Boolean algebra. They provide a systematic and visual
method for simplifying Boolean functions and optimizing digital circuits. K-Maps are particularly
useful for reducing the number of gates and logical operations in a circuit, leading to more efficient
and cost-effective designs. Understanding the basics of K-Maps is essential for anyone working in
the field of digital logic and circuit design.

K-Map Basics: At their core, K-Maps are grids that facilitate the simplification of Boolean functions.
These grids are structured according to the number of variables in the function. For instance, a
four-variable function will require a 4x4 grid. K-Maps operate based on the binary values of
variables, allowing you to identify patterns and group terms effectively. K-Maps can be used to
express Boolean functions in two primary forms: Sum of Products (SOP) and Product of Sums
(POS), each with its unique applications.

Grid Structure of K-Maps for SOP and POS: The structure of a K-Map varies depending on whether
you are working with SOP or POS expressions. In SOP K-Maps, rows and columns represent
combinations of variable values (0 and 1), and each cell corresponds to a minterm. In contrast, POS
K-Maps have cells that correspond to maxterms, and the goal is to identify patterns of 0s that form
these maxterms. Regardless of the form, K-Maps provide a visual representation of Boolean
functions, making them easier to work with and simplify.

Rules to Draw K-Map: K-Maps are governed by specific rules to ensure accurate representation
and simplification of Boolean functions. These rules include the requirement for grouping terms
into powers of two (1, 2, 4, 8, etc.), the prohibition of diagonal groupings, the possibility of
overlapping groups, and the ability to wrap groups around the edges of the table. These rules
ensure that the K-Map accurately represents the Boolean function while allowing for efficient
simplification.

Don't Care Conditions: In real-world digital circuit design, not all input combinations are relevant
or important. Some combinations, known as "don't care" conditions, are conditions that do not
affect the desired behavior of the circuit. K-Maps can be used to handle these don't care conditions,
providing a mechanism for optimizing a circuit by ignoring input combinations that are irrelevant.

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Advantages and Disadvantages of K-Maps: K-Maps offer several advantages, such as their visual
and intuitive nature, their ability to simplify Boolean functions efficiently, and their usefulness in
educational settings for understanding logic minimization. However, they also come with
limitations, including their applicability to relatively small to moderately complex functions, the
potential for human error in manual K-Map creation, and their inability to account for real-world
constraints like signal propagation delays and component availability.

Filling in the K-Map Based on Truth Tables: To construct a K-Map, it is essential to start with a well-
defined truth table for the given Boolean function. The truth table outlines the output values for all
possible input combinations. The K-Map is then populated with these output values, allowing you
to identify patterns and relationships between different combinations. The filling-in process is a
critical step in K-Map analysis, as it forms the basis for grouping terms and simplifying the Boolean
expression.

Challenges and Limitations: K-Maps, while a valuable tool, come with their own set of challenges
and limitations. These challenges include dealing with increasing complexity as the number of
variables grows, the manual labor involved in creating and managing large K-Maps, and the
limitation in representing functions in canonical forms like SOP and POS. K-Maps may not be
suitable for non-standard bases, and they can lead to redundancy in terms. Additionally, they do
not consider real-world constraints or practical trade-offs in circuit design, which can be a
significant limitation. In practice, engineers often use K-Maps alongside other methods and tools,
and careful validation is necessary to ensure that the simplified expression accurately represents
the desired function.

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8. PRACTICE PROBLEMS
1. Minimize the following boolean functions using K-Map.
a. F(A, B, C, D) = Σm(0, 1, 2, 5, 7, 8, 9, 10, 13, 15) + Σd(3, 4, 5)
b. F(A, B, C, D) = Σm(0, 1, 3, 5, 7, 8, 9, 11, 13, 15) + Σd(0, 4, 6)
c. F(A, B, C, D) = Σm(1, 3, 4, 6, 8, 9, 11, 13, 15) + Σd(0, 2, 14)
d. F(A, B, C) = Σm(0, 1, 6, 7) + Σd(3, 5)
e. F(A, B, C) = Σm(1, 2, 5, 7)
f. F(A, B, C) = Σm(0, 1, 6, 7)
g. F(A, B, C, D) = Σm(0, 2, 8, 10, 14) + Σd(5, 15)
h. F(A, B, C, D) = Σm(1, 3, 4, 5, 7, 9, 13, 14, 15)
i. F(W, X, Y, Z) = Σm(1, 3, 4, 6, 9, 11, 12, 14)
j. F(A, B, C, D) = Σm(1,3, 7, 9, 13)

2. Design K-Map from the given Truth Table and obtain its logical expression.

a.

b.

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c.

d.

e.

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f.

3. Simplify the Boolean function together with the don’t-care conditions.

(a) F( a, b, c, d ) = Σ (0,1,5,6,8,10) + d (3,9,13)
(b) F(A,B,C,D) = Π (3,5,13,15) + d(1,4,6,8,11.12)
4. Simplify the following Boolean functions using K-map
(a) F = w’z + xz + x’y + wx’z
(b) F(w,x,y,z) = Σ(0,1,6,8,11,13)
(c) F (a,b,c,d) = (a’+b’+d’)(a+b’+c’)(a’+b+d’)(b+c’+d’)

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9. TERMINAL QUESTIONS
1. Define K-Map and explain its significance.
2. Explicate the rules to be followed in K-Map.
3. Write a short note on Grey Code with example.
4. Design a 4-variable K-map by taking suitable example.
5. Differentiate between SOP and POS.
6. Minimize the given Boolean Expression by using the four-variable K-Map.
F (A, B, C, D) = Σ m (2, 4, 5, 6, 12, 13, 14) + d (1, 3).
7. Write a short note on the challenges and limitations of K-Map.
8. Elucidate the guidelines for K-map with Don’t care conditions.

9. Design K-Map from the given Truth Table and obtain its logical expression.

10. Simplify the following Boolean functions using K-map

F = w’z + xz + x’y + wx’z

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10. ANSWERS
Self-Assessment Answers
1. The number of input variables in the Boolean expression
2. 2^n cells
3. To simplify Boolean expressions and optimise circuit designs
4. Groups may be diagonal in shape.
5. They are ignored in the simplification process.
6. Filling the K-Map with '1's for minterms.
7. Successive values differ in only one bit.
8. Determining the number of variables
9. 4x4
10. A term in the Boolean function
11. 1
12. Both horizontally and vertically
13. Considered as '1' to form larger groups.
14. Individually encircle them.
15. Exponential increase in complexity
16. Small to moderately sized Boolean functions

Terminal Answers
1. Refer to Section 2.1
2. Refer to Section 3
3. Refer to Section 3.2.1
4. Refer to Section 4.3
5. Refer to Section 4.4
6. Refer to Section 5
7. Refer to Section 6
8. Refer to Section 5
9. Refer to Section 4
10. Refer to Section 4

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Unit 7
Combinational Circuits – I

Table of Contents

SL Fig No / Table SAQ /

Topic Page No
No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Introduction to Combinational Circuit - 1
2.1 Definition and Characteristics 1 -
2.2 Differences between Combinational and 4-10
- -
Sequential Circuits
2.3 Uses and Applications - -
3 Half Adder Circuit - 2
3.1 Basic Concept of Binary Addition 2 -
3.2 Truth Table of a Half Adder - - 11-15
3.3 Logic Diagram 3 -
3.4 Limitations of Half Adder - -
4 Full Adder Circuit 4 3
4.1 Need for a Full Adder - -
4.2 Truth Table of a Full Adder - -
16-22
4.3 K-Map for Full Adder - -
4.4 Logic Diagram - -
4.5 Advantages and Drawbacks of Full Adder - -
5 Summary - - 23
6 Terminal Questions - - 23
7 Answers - - 24

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1. INTRODUCTION
In the realm of digital electronics, combinational circuits play an indispensable role. Unlike
sequential circuits, where the output is a function of both current inputs and past outputs,
the output of combinational circuits depends solely on the current inputs. This quality allows
them to perform a vast range of logical operations, pivotal to digital systems, without the
complexity and latency associated with memory elements.

Combinational circuits are characterised by their lack of storage components or memory.

The outputs in these circuits are the direct result of a combination of the inputs at any given
time. This immediate response to input changes makes them exceptionally fast and reliable
for certain types of logic operations. Common components of combinational circuits include
basic logic gates like AND, OR, NOT, NAND, NOR, XOR, and XNOR, each performing
fundamental logical functions.

The design of a combinational circuit typically starts with a specified function to be

performed, translating into a truth table that lists outputs for every possible input
combination. Designers often use Boolean algebra or Karnaugh Maps to simplify these
relationships into a manageable and efficient set of logic gates.

1.1 Learning Objectives

At the end of this topic, students should be able to,
❖ Describe the main characteristics of combinational circuits.
❖ Explain the principle behind binary addition.
❖ Deduce the logical gates required to construct a half adder and Full adder.
❖ Define carry-in and carry-out in the context of a full adder.

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2. INTRODUCTION TO COMBINATIONAL CIRCUIT

In digital electronics, circuits are broadly classified into combinational and sequential
circuits. Combinational circuits are a fundamental category where the output is determined
solely by the current input values, without dependency on previous inputs or outputs. In
essence, these circuits lack memory, which means they don’t retain any past history of inputs
or states.

Combinational circuits use logic gates such as AND, OR, NOT, NAND, NOR, XOR, and XNOR.
These gates execute basic logical functions that translate input signals into specific outputs.
For instance, an AND gate will provide an output of '1' only when all its inputs are '1';
otherwise, it will give an output of '0'.

Whereas, A sequential circuit is a type of digital circuit in which the output depends not only
on the present value of its input signals but also on the sequence of past inputs (or states).
Unlike combinational circuits, which lack memory, sequential circuits incorporate memory
elements to store previous states or outputs. This enables them to "remember" past
information and use it in conjunction with current inputs to determine their outputs.

Examples of combinational circuits include adders, subtractors, multiplexers,

demultiplexers, encoders, decoders, and comparators, among others.

Combinational Circuits are required because of:

1. Foundational Logic Operations: Combinational circuits serve as the basic building
blocks for many digital systems. They provide the foundational logical operations that
underpin more complex processes and systems.
2. Deterministic Behavior: Their output is entirely determined by the current input,
leading to a predictable and consistent behaviour, essential for many digital
applications.
3. Speed: Without the need for memory elements, combinational circuits can operate
quickly, often providing instantaneous outputs as soon as inputs change. This feature
is crucial for operations requiring real-time processing.

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4. Simplicity: For many basic operations, using combinational logic is simpler and more
direct than devising sequential logic. Their straightforward nature often results in
fewer components and a more compact design.
5. Versatility in Digital Design: Combinational circuits allow for the design of a wide
array of digital systems. From performing arithmetic operations in computers to data
transformation in communication systems, they play a vital role.
6. Reliability: Due to their deterministic nature, combinational circuits, when designed
and implemented correctly, are highly reliable, with very predictable outcomes.
7. Cost-Effective: In many cases, designing a system based on combinational logic can be
more cost-effective than its sequential counterpart because it eliminates the need for
memory or storage elements.
8. Data Processing and Transformation: They are pivotal in systems where data needs
to be transformed or processed without storage, such as certain stages of ALUs
(Arithmetic Logic Units) in CPUs or signal processing modules in communication
systems.

2.1 Definition and Characteristics

A combinational circuit is a digital circuit whose output is determined exclusively by its
present inputs without considering previous inputs or conditions. These circuits lack
memory components, so they cannot remember or reference past input data or circuit
configurations. The main building blocks for these circuits are logic gates like AND, OR, NOT,
NAND, NOR, XOR, and XNOR.

Fig 1: Block Diagram of Combinational Circuit

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Characteristics of Combinational Circuits:

Output
Dependency
Lack of
Isolation from
Memory
Past Inputs
Elements

Power Deterministic
Consumption Characteristics Behavior

of
Combinational
Versatility Circuits Speed

No Internal Design and

State Simplification
Basic Building
Blocks

i. Output Dependency: The output of a combinational circuit is determined solely by its

current input values. No memory or feedback mechanism impacts the output based
on previous states or inputs.
ii. Lack of Memory Elements: Combinational circuits do not incorporate storage or
memory elements. This differentiates them from sequential circuits, which have
memory elements to retain past states.
iii. Deterministic Behavior: Given a specific set of inputs, a combinational circuit will
always produce the same output. This deterministic behavior ensures consistent and
predictable circuit operation.
iv. Speed: Since combinational circuits don't rely on memory or feedback loops, they can
produce outputs almost instantaneously upon receiving inputs, making them suitable
for real-time processing tasks.
v. Design and Simplification: Combinational circuits can often be designed using Boolean
algebra or Karnaugh Maps to optimize and simplify their logic expressions. This can
lead to reduced circuit complexity and improved efficiency.

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vi. Basic Building Blocks: Combinational circuits form the foundational logic units in
many digital systems. Examples include arithmetic circuits (adders, subtractors),
multiplexers, demultiplexers, encoders, decoders, and more.
vii. No Internal State: Unlike sequential circuits, combinational circuits do not have an
"internal state." That is, they don't hold onto or remember any information internally.
This makes their operation straightforward but also limits their application in
scenarios where memory or state retention is needed.
viii. Versatility: With an array of logic gates at their disposal, designers can craft
combinational circuits to fulfil a wide variety of digital tasks and functions. This
adaptability makes them ubiquitous in digital design.
ix. Power Consumption: Combinational circuits' power consumption depends on the
switching activity. Since there's no constant power drawn by memory elements (as
they don't exist in these circuits), they can be more power-efficient for tasks that don't
require state retention.
x. Isolation from Past Inputs: Since outputs are not influenced by past inputs,
combinational circuits provide isolation from historical signals, ensuring that each
computation or logic operation is 'fresh' and uninfluenced by prior activities.

2.2 Differences between Combinational and Sequential Circuits

Feature/Aspect Combinational Circuits Sequential Circuits

Output Based solely on current Depends on current inputs and

Dependency inputs. previous states.

Memory Elements Do not have memory Contain memory elements (like

elements. flip-flops, latches).

Feedback Paths No feedback paths. Have feedback paths.

Change in State Static; no change unless Can change with or without

inputs change. input changes.

Primary Logic gates (AND, OR, NOT,

Components etc.). Logic gates + memory elements.

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Deterministic, based on Can exhibit more complex

Functionality input. behaviors and patterns.

Decoders, adders, Counters, registers, memory

Applications multiplexers, etc. units, etc.

Design Can be more complex due to

Complexity Generally simpler in design. feedback & memory.

Immediate response to input Responses might be

Timing changes. synchronized to clock signals.

History/Previous No retention of past input or Retains and uses information

States state. from previous states.

2.3 Uses and Applications

Combinational circuits are key components in digital electronics. They perform simple logic
tasks based entirely on their current inputs. This unique feature makes them incredibly
useful in many different areas.

Here are some primary uses and applications of combinational circuits:

i. Arithmetic Calculations:
Adders: Combinational circuits like the half adder and full adder are employed to
execute binary addition.

Subtractors: Half subtractors and full subtractors are designed to perform binary
subtraction.

Multipliers: Binary multiplication is achieved through combinational logic circuits

tailored for this operation.

ii. Data Selection and Routing:

Multiplexers (MUX): These circuits decide from multiple inputs and funnel the chosen
input to a single output based on certain selection criteria.

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Demultiplexers (DEMUX): Conversely, DEMUX takes a single input and directs it to one
of several possible outputs.

iii. Data Encoding and Decoding:

Encoders: When given a certain active input, these circuits produce a specific binary
code as the output.

Decoders: They reverse the process of encoders. An n-bit binary number is decoded
into one of 2^n outputs.

iv. Data Transformation and Comparison:

Comparators: These circuits compare two binary numbers to assess whether one is
greater, equal to, or lesser than the other.

Code Converters: Useful in systems that work with multiple coding schemes, these
circuits convert data from one format to another, like BCD to binary or vice versa.

v. Error Detection:
Parity Generators and Checkers: In communication systems, error detection is crucial.
These circuits either generate or check parity bits, enabling the system to detect errors
in data transmission.

vi. Function Generation:

Combinational logic can be used to craft specific logic functions, acting as function
generators in more complex systems.

vii. vMemory Addressing:

In computer systems, combinational circuits help in decoding memory addresses,
ensuring that data is read from or written to the correct memory location.

viii. Signal Processing:

Combinational circuits can be employed to perform specific transformations on signals,
especially in communication systems, ensuring the signal is processed or routed
correctly.

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ix. Programmable Logic Arrays (PLAs):

A special type of combinational circuit where specific Boolean functions can be
implemented based on the requirements.

x. Read-only Memory (ROM):

Certain ROM configurations can be seen as combinational circuits, where stored data
establishes a static relationship between the input and output.

SELF-ASSESSMENT QUESTIONS – 1

1. What is the fundamental difference between combinational and sequential

circuits?
a) Combinational circuits are slower than sequential circuits.
b) Sequential circuits use memory elements, combinational circuits do not.
c) Combinational circuits can perform arithmetic operations, sequential
cannot.
d) Sequential circuits use logic gates, combinational circuits do not.
2. What will be the output of a 2-input AND gate if the inputs are '1' and '0'?
a) 0
b) 1
c) 10
d) 11
3. ___________________ is a feature of combinational circuits.
a) Outputs depend on clocks
b) Outputs depend only on current inputs
c) Outputs depend on previous inputs
d) They have memory elements

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3. HALF ADDER CIRCUIT

A half-adder is a type of combinational circuit specifically designed to add two single-bit
binary numbers. It has two inputs, traditionally labelled as A and B, and two outputs: the sum
(S) and the carry (C).

Given that we are working with single-bit binary numbers, only four possible input
combinations (00, 01, 10, 11). The main function of the half adder is to handle the basic
arithmetic of these combinations and produce an accurate sum and carry output.

3.1 Basic Concept of Binary Addition

Binary addition is similar to the addition in the decimal system, but it's based on the base-2
number system. In binary, there are only two digits: 0 and 1.

The basic rules for binary addition are as follows:

1. 0 + 0 = 0: No sum, no carry.
2. 0 + 1 = 1: Sum is 1, no carry.
3. 1 + 0 = 1: Same as the above, sum is 1, no carry.
4. 1 + 1 = 10: The sum is 0, and there's a carry of 1.

To achieve this operation in terms of logic gates:

The sum output can be represented as the XOR of the two inputs: S=A⊕B

The carry output can be represented as the AND of the two inputs: C=A∧B

Thus, a half adder can be implemented using just one XOR gate for the sum and one AND gate
for the carry, as shown in Figure 2.

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Fig 2: Block diagram of Half-Adder

3.2 Truth Table of a Half Adder

A half-adder has two inputs, A and B, and two outputs: Sum (S) and Carry (C). Below is the
truth table for a half-adder:

From the table, you can observe:

For A=0 and B=0, the sum is 0 with no carry.
For A=0 and B=1 (or vice-versa), the sum is 1 with no carry.
For A=1 and B=1, the sum goes back to 0, and a carry is generated.

Logical Expression:

For Sum:

Sum = A’B + AB’ = A XOR B = S=A ⊕ B

For Carry:

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Carry = AB = C = A AND B = A ∧ B

3.3 Logic/Circuit Diagram

To implement a half adder, we can use the following logic gates:
XOR Gate for the sum: S=A ⊕ B
AND Gate for the carry: C=A ∧ B

Fig 3: Circuit Diagram of Half-adder

In this diagram, inputs A and B are fed into an XOR gate, producing the sum. Concurrently,
the same inputs are fed into an AND gate, producing the carry.

To build a half adder, one would connect the inputs A and B to both an XOR and an AND gate
as depicted and then use the outputs of these gates as the sum and carry, respectively.

3.4 Limitations of Half Adder

The half-adder is a fundamental building block in digital arithmetic circuits. While it serves
its purpose of adding two single-bit numbers, it comes with inherent limitations:
1. No Carry Input: The primary limitation of a half adder is that it doesn't have an input
for a carry from a previous stage. In multi-bit binary addition, numbers are added bit-
by-bit from the least significant bit (LSB) to the most significant bit (MSB). If there's a
carry from one stage, it must be added to the next stage. The half-adder cannot handle
this scenario, which makes it unsuitable for adding multi-bit numbers on its own.

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2. Single-Bit Addition Only: The half adder is designed to add two single-bit binary
numbers. For multi-bit numbers, you would need multiple half-adders and additional
logic to handle the carry propagation, making the design more complex.
3. No Subtract, Multiply, or Divide Functionality: A half adder is a specialised circuit for
addition. It doesn't support other arithmetic operations like subtraction, multiplication,
or division. Different circuits or additional logic would be needed for those operations.
4. Fixed Functionality: The half adder is not programmable or configurable. It has a fixed
function, which is to add two single-bit numbers. If any other functionality or logic is
required, it cannot be achieved with a half-adder alone.
5. Space and Complexity: For large arithmetic operations, using basic building blocks like
half adders can lead to increased circuit complexity and size. More integrated solutions
like full adders or multi-bit adders are often preferred for more advanced applications.
6. Speed Limitation: When half adders are cascaded or used with other logic to create
more complex adders (like ripple-carry adders), the propagation delay can accumulate,
leading to slower overall performance. More advanced adder designs, like carry-
lookahead adders, are employed to mitigate such speed limitations.

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SELF-ASSESSMENT QUESTIONS – 2

4. ____________________ is the primary function of a half adder.

a) To subtract two binary numbers
b) To add two binary numbers
c) To divide two binary numbers
d) To multiply two binary numbers
5. How many inputs and outputs does a standard half adder have?
a) 1 input, 2 outputs
b) 2 inputs, 1 output
c) 2 inputs, 2 outputs
d) 3 inputs, 2 outputs
6. Which logic gates are typically used to construct a half adder?
a) XOR and OR gates
b) AND and OR gates
c) XOR and AND gates
d) NAND and NOR gates
7. What do the outputs of a half adder represent?
a) The quotient and remainder
b) The difference and borrow
c) The sum and carry
d) The product and factor
8. Why can't a half adder be used for adding multi-bit binary numbers?
a) It cannot handle decimal numbers.
b) It does not have a carry-in input.
c) It only has one output.
d) It is not based on binary logic.

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4. FULL ADDER CIRCUIT

A full adder is a digital circuit that performs binary arithmetic, specifically to add three
binary digits: two input bits and a carry-in bit. It is an extension of the half adder, adding the
capability to include a carry-in from the previous bit addition. This makes the full adder
capable of handling multi-bit binary addition more efficiently than chaining multiple half-
adders.

The full adder has three inputs:

A - The first binary digit.
B - The second binary digit.

Carry-In (Cin) - The carry from adding the previous lower significant bit position.

The full adder provides two outputs:

Sum (S) - The sum of the three input bits.

Carry-Out (Cout) - The carry resulting from the addition, which may be used as a carry-in for
the addition of the next higher significant bit position.

Fig 4: Block diagram of Full-Adder

4.1 Need for a Full Adder

The need for a full adder arises from the inherent limitations of the half adder when
performing binary arithmetic, especially for multi-bit binary numbers. Here's why the full
adder is crucial:

1. Handling Carry-In: While adding multi-bit binary numbers bit-by-bit, it's common for a
bit addition at a lower position to produce a carry that affects the addition at the next

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higher bit position. A half-adder lacks the capability to accept this carry from a previous
stage. The full adder, with its third input (Carry-In), is designed to address this exact
scenario.
2. Efficient Multi-Bit Addition: When adding binary numbers with more than one bit, we
need to account for the sum of the bits at the current position and any carry generated
from the previous position. Using half-adders for such tasks would require additional
external logic to handle carry propagation, making the circuitry more complicated. The
full adder integrates this function, simplifying the design of multi-bit adders.
3. Building Block for Complex Arithmetic Units: The full adder serves as a fundamental
building block for more advanced arithmetic circuits, such as ripple carry adders, carry-
lookahead adders, and even the arithmetic logic units (ALUs) of microprocessors.
Without the full adder's integrated carry-handling capability, designing these units
would be more complex and less efficient.
4. Reduced Propagation Delay: In digital circuits, the speed of operation is often a critical
factor. A full adder allows for faster binary addition than a series of half adders because
it handles both current bit addition and carry propagation simultaneously. This reduces
the overall propagation delay, especially in cascaded systems.
5. Simpler Design & Reduced Circuit Complexity: Implementing multi-bit addition using
only half adders would not only be cumbersome but also lead to more complex
circuitry. The full adder streamlines this by offering a more compact and efficient
solution, leading to simpler design processes and potentially saving on-chip real estate
in integrated circuits.

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4.2 Truth Table of a Full Adder

Logical Expression for SUM: = A’ B’ C-IN + A’ B C-IN’ + A B’ C-IN’ + A B C-IN = C-IN (A’ B’ + A
B) + C-IN’ (A’ B + A B’) = C-IN XOR (A XOR B) = (1,2,4,7)

Logical Expression for C-OUT: = A’ B C-IN + A B’ C-IN + A B C-IN’ + A B C-IN = A B + B C-IN +

A C-IN = (3,5,6,7)

4.3 K-Map for Full Adder

The Karnaugh Map (often abbreviated as K-Map) serves as an instrument to streamline

intricate Boolean algebra expressions. The above figure depicts the K-Map specifically
designed for a full adder. The defining formulas for the full adder, specifically the equations
representing the sum (S) and the carry output (Cout), are derived based on the principles of
binary addition.

The subsequent equations illustrate this:

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The sum (S) for the full adder is determined by the XOR operation on A, B, and Cin. Thus,
S = A ⊕ B ⊕ Cin = A′B′Cin + A′BC′in + AB′C′in + ABCin
The carry (C) of the half-adder is the AND of A and B. Therefore,
C = AB + ACin + BCin

4.4 Logic Diagram

A full adder is a combinational circuit designed to sum three binary numbers, resulting in
two outputs: the sum and the carry. Specifically, it combines two input bits with a carry from
a preceding addition. The graphical representation and schematic of the full adder can be
found in the provided figure.

Functionality:
A full adder processes three inputs: A, B, and Cin. Here, A and B represent two binary
numbers, while Cin is the carry-over from a prior binary addition step. The sum result from
the full adder is derived by performing an XOR operation on A, B, and Cin. The carry-out bit,
denoted as Cout is produced through a combination of AND and OR operations.

While various design implementations can achieve a full adder's functionality, one common
design uses basic logic gates: AND, OR, and XOR gates.

Here's a basic description of the circuit:

i. Two XOR gates.
ii. Two AND gates.
iii. One OR gate.

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Description:
i. The first XOR gate takes the inputs A and B.
ii. The output of the first XOR gate and the input Cin go into the second XOR gate. The
output of this XOR gate gives the Sum (S).
iii. One AND gate takes A and B as inputs, another AND gate takes the output of the first
XOR gate and Cin as inputs.
iv. The outputs of both AND gates feed into the OR gate, whose output gives the carry-
out (Cout).

Working Procedure:
i. Sum Calculation:
• The sum output (S) is the result of the XOR operation on inputs A, B, and Cin.
• First, A and B are XORed together. This result is then XORed with Cin to produce the
sum.

S = A ⊕ B ⊕ Cin

Carry-out Calculation:
• Carry-out is generated in two scenarios:
o When A and B are both '1'.
o When either A or B is '1', and Cin is also '1'.
• These conditions are checked using the AND gates, and their outputs are ORed
together to produce the final carry-out.

Cout = (A ∧ B ) ∨ ( Cin ∧ (A⊕B) )

In case you have two binary numbers and you're adding them from least significant bit (LSB)
to the most significant bit (MSB), the Full Adder allows you to account for any carry
generated by the addition of the previous set of bits.

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4.5 Advantages and Drawbacks of Full Adder

The advantages of Full Adder
• Multi-Bit Addition: Full adders can perform binary addition on multi-bit numbers,
making them suitable for more complex arithmetic operations.
• Carry Management: They have the capability to manage both carry-in (from previous
bit addition) and carry-out (to the next bit addition), ensuring accurate binary addition.
• Versatility: Full adders can be cascaded in series to form parallel binary adders, useful
in arithmetic logic units and other digital systems.
• Compact Design: With the advent of modern integrated circuits, multiple full adders
can be incorporated into a single compact chip, reducing the overall footprint.

Disadvantages of Full Adder

• Speed Limitations: When multiple full adders are cascaded in series for multi-bit
addition, carry propagation can introduce delays, affecting the speed of operation.
• Complexity: Full adders are more complex than half adders, requiring more gates and
hence potentially consuming more power.
• Overhead: For operations that don't require carry-in functionality, a full adder
introduces unnecessary overhead compared to a half adder.
• Power Consumption: More gates and connections mean higher power consumption,
which might not be suitable for low-power applications or devices.

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SELF-ASSESSMENT QUESTIONS – 3

9. What are the inputs to a full adder circuit?

a) Sum and Carry
b) A and B
c) A, B, and Carry-in
d) Sum and Carry-out
10. How many AND gates are used in the construction of a typical full adder
circuit?
a) 1
b) 2
c) 3
d) 4
11. Which of the following expressions correctly represents the Sum output of a
full adder?
a) A AND B AND Carry-in
b) A XOR B XOR Carry-in
c) (A AND B) OR (Carry-in AND (A XOR B))
d) (A OR B) AND Carry-in
12. What advantage does a full adder have over a half adder?
a) It can add two bits without any carry input.
b) It has a simpler circuit design.
c) It can only output a single sum bit.
d) It can handle a carry forwarded from a previous addition.

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5. SUMMARY
A Combinational Circuit is like a machine that gives results based on what you currently feed
into it, not what you gave it before. It doesn't remember past inputs. It's built using special
switches called logic gates (like AND, OR, and NOT). This type of machine is used in things
like multiplexers, decoders, and some calculating tools.

The Half Adder Circuit is a kind of combinational circuit. It can add two small binary numbers
(numbers in 1s and 0s) and give two results: a sum and a carry (like an extra that comes from
adding). But there's a problem: if you want to add bigger numbers, it can't use extra bits from
the previous step.

The Full Adder Circuit is like an upgraded version. It can add three of these binary numbers,
including an extra bit from the last step. This makes it great for adding bigger binary
numbers and handling the extra bits that come with that.

6. TERMINAL QUESTIONS
1. Define combinational circuits and explain why they are required.
2. Briefly explain the characteristics of Combinational Circuits.
3. Differentiate between Combinational and Sequential Circuits.
4. Design a Half-adder circuit. Explain its working procedure and obtain its logical
expression with the help of K-Map.
5. Design a Full-adder circuit. Explain its working procedure and obtain its logical
expression with the help of K-Map.

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7. ANSWERS
Self-Assessment Answers
1. Sequential circuits use memory elements, combinational circuits do not.
2. 0
3. Outputs depend only on current inputs
4. To add two binary numbers
5. 2 inputs, 2 outputs
6. XOR and AND gates
7. The sum and carry
8. It does not have a carry-in input.
9. A, B, and Carry-in
10. 10.3
11. A XOR B XOR Carry-in
12. It can handle a carry forwarded from a previous addition.

Terminal Answers
1. Refer to Section 2
2. Refer to Section 2.1
3. Refer to Section 2. 2
4. Refer to Section 3
5. Refer to Section 4
6. Refer to Section 3.4 and 4.5

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Unit 8
Combinational Circuits – II

Table of Contents
SL Topic Fig No / Table SAQ / Page No
No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Half Subtractor 1, 2 1

2.1 Implementation of Half-Subtractor - -

- - 4-9
2.2 Advantages and Disadvantages of Half-
Subtractor
2.3 Applications of Half-Subtractor - -
3 Full Subtractor 3, 4 2

3.1 Implementation of Full-Subtractor - - 10-15

3.2 Advantages and Disadvantages of Full- - -
Subtractor
4 Binary Parallel Adder 5, 6 3

4.1 Construction of 4-bit Parallel Adder - -

16-21
4.2 Applications of Parallel Adder - -

4.3 Limitations of Parallel Adder - -

5 Carry Propagation - 4
- - 21-26
5.1 Difference between Binary Parallel Adder
and Carry Propagation
6 Magnitude Comparator 7, 8, 9 5
26-29
6.1 1-Bit Magnitude Comparator - -
7 Summary - - 30
8 Terminal Questions - - 31
9 Answers - - 31

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1. INTRODUCTION
Combinational circuits are the fundamental building blocks of digital electronics that process
inputs to produce outputs based on logical functions. The beauty of combinational circuits
lies in their deterministic nature; a given set of inputs will always result in the same set of
outputs. This property makes them invaluable for applications where precise and
predictable outcomes are essential, such as in arithmetic units for calculations, data
processing, signal control, and data routing. Here, we're going to get a better look at how
computers use these circuits to do basic math and make decisions. First up is the Half
Subtractor, a simple circuit used for taking away one small number from another and giving
us two new numbers: the 'difference' and a 'borrow' if one is needed. But the half subtractor
isn't enough when we want to subtract bigger numbers. That's where the Full Subtractor
comes in. It's a bit more complex because it can handle taking away bigger numbers one after
the other, remembering if we needed to borrow before.

The Binary Parallel Adder is like a super-efficient adding machine that can work on lots of
numbers at the same time. It's great because it can do a big math problem all at once, which
saves a lot of time. But being quick can sometimes cause a problem called Carry Propagation,
where what happens with one part of the math can slow down the next part. We'll look at
smart ways to keep things moving fast.

Lastly, the Magnitude Comparator is really important for figuring out if one number is bigger,
smaller, or the same as another. It helps a computer decide what to do next.

1.1 Learning Objectives

At the end of this topic, students should be able to,
❖ Explain the concept of binary subtraction as it applies to the half subtractor.
❖ Interpret the role of borrow-in and borrow-out in a full subtractor.
❖ Implement a 4-bit binary parallel adder using full adders.
❖ Investigate the carry propagation delay in a binary addition operation.
❖ Design and simulate a magnitude comparator for a given set of requirements.

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2. HALF SUBTRACTOR
A half subtractor is a combinational circuit that deals with the subtraction of binary numbers.
In essence, it subtracts two single-bit numbers, often referred to as the minuend and
subtrahend. The half subtractor produces two outputs; one is the difference between the two
bits, and the other is the borrow.

Let's break down the key components and the function of a half subtractor:

1. Inputs:
• The half subtractor has two inputs:
• A (Minuend): The bit from which another bit is to be subtracted.
• B (Subtrahend): The bit to be subtracted from the other bit.
2. Outputs:
• The half subtractor generates two outputs:
• Difference (D): This output represents the result of the subtraction (A - B).
• Borrow (Bout): If the subtrahend (B) is greater than the minuend (A), the borrow
output is set, indicating that a '1' has been borrowed to perform the subtraction.

The logic behind the half subtractor is that when you subtract a smaller number from a larger
number in binary, you simply get the difference. However, when you attempt to subtract a
larger number from a smaller number, you need to borrow from the next higher bit (just like
in decimal subtraction when you need to borrow from the next higher decimal place).

Fig 1: Half Subtractor

Here's how the two outputs are determined:

Difference (D): This is calculated using the XOR gate with A and B as inputs because in
binary subtraction, if the bits are different, the difference is 1.

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The Boolean expression is D=A ⊕ B.

Borrow (Bout): The borrow is determined by the NOT of A AND B. If A is 0 and B is 1, we

will need to borrow from the next higher bit.

The Boolean expression is Bout= A ∧ B

Truth Table

• When A is 0 and B is 0 (no subtraction needed), the difference is 0 and no borrow is

required, so the borrow is 0.
• When A is 0 and B is 1 (you cannot subtract a larger value from a smaller one without
borrowing), the difference is 1 (since this is binary and we need to borrow from a
higher order bit, which is not available in a half subtractor, we consider this as a
negative result). A borrow is required, so the borrow is 1.
• When A is 1, and B is 0, you can subtract without borrowing, so the difference is 1 and
the borrow is 0.
• When A is 1, and B is 1, both values are equal, so the difference is 0 and, again, no
borrow is needed, so the borrow is 0.

The SOP form of the Diff and Borrow is as follows:

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Diff= A'B+AB' = A⊕B

Borrow = A'B = A’ ∧ B

2.1 Implementation of Half-Subtractor

A half subtractor can be implemented using the following two basic logic gates:
i. XOR Gate for the Difference (D)
ii. AND Gate along with a NOT Gate (or NAND gate) for the Borrow (Bout)

Logic Equations:
The logic equations derived from the truth table for the half subtractor are:
Difference (D) = A XOR B
Borrow (Bout) = NOT A AND B

Circuit Diagram:

Fig 2: Circuit diagram of Half-Subtractor

The circuit diagram based on the above logic equations would include:

i. An XOR gate:
• Inputs: A and B.
• Output: This will provide the Difference (D).
ii. An AND gate and a NOT gate:
• Inputs for AND gate: A and B.
• Input for NOT gate: Only A.
• Output of NOT gate is connected to another input of AND gate.

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• Final Output from AND gate: This will provide the Borrow (Bout).

In this implementation, the XOR gate directly provides the Difference output because XOR
yields a '1' when the two inputs are different, which is the case when subtracting binary
digits. The AND gate provides the Borrow output only when A is '0' and B is '1', which is the
condition for needing a borrow in binary subtraction. The NOT gate inverts the A input
because there is no borrow when A is '1'.

2.2 Advantages and Disadvantages of Half-Subtractor

The half subtractor, a fundamental digital circuit for binary subtraction, has its own set of
advantages and disadvantages:

Advantages of Half Subtractor:

1. Simplicity: The half subtractor has a simple design, which makes it easy to understand
and implement using basic logic gates.
2. Speed: Due to its simplicity and the fact that it doesn't need to handle carries from
previous calculations, it can operate quickly.
3. Foundation for More Complex Circuits: It is a building block for more complex circuits,
such as full subtractors and Arithmetic Logic Units (ALUs).
4. No External Dependency: The half subtractor functions independently without
needing an input from other circuits, which simplifies its operation.
5. Educational Value: It is an excellent educational tool for students beginning to learn
about digital circuits and binary arithmetic.

Disadvantages of Half Subtractor:

1. Limited Functionality: It can only subtract two single-bit numbers and cannot
accommodate a borrow input from a previous subtraction, which limits its use in
subtracting multi-bit binary numbers.
2. Not Scalable: For operations involving multi-bit numbers, multiple half subtractors
and additional logic are needed, which can make the circuit more complex.
3. Inefficient for Large Operations: When dealing with large binary numbers, the lack of
carry-in (borrow-in) capability makes it unsuitable and inefficient.
4. No Carry-Over Handling: It does not provide a carry-over feature, essential for chained
binary subtraction across multiple bits.

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5. Narrow Application Scope: Its application is restricted due to the limited arithmetic
operations it can perform.

2.3 Applications of Half-Subtractor

Applications of half-Subtractor are:
1. Digital Arithmetic Units: In basic arithmetic logic units (ALUs) within calculators or
simple digital computers, half subtractors are used as the initial step for subtraction
operations before advancing to full subtractors for comprehensive multi-bit
operations.
2. Computational Logic Teaching: Educational tools often employ half subtractors to
illustrate the fundamental principles of binary subtraction and combinational circuit
design.
3. Initial Subtraction Stage: In multi-stage subtraction circuits where the first stage may
not need to account for borrow-in, a half subtractor can be used.
4. Error Detection: In certain error detection algorithms where single-bit subtraction is
used to calculate parity or checksums, half subtractors may be utilized.
5. Difference Detection Circuits: Half subtractors can be used in circuits designed to
detect the difference between two binary signals, which can be useful in control
systems.
6. Prototype Development: They are used in prototyping and testing environments
where basic subtraction is necessary without the complexity of full-scale arithmetic
operations.
7. Digital Counters and Registers: Some specific types of counters and registers that only
require single-bit subtraction in certain conditions may use the half subtractor logic.
8. Signal Processing: In some simple signal processing tasks where a signal represented
in binary needs to be decremented conditionally, a half subtractor could be used.

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SELF-ASSESSMENT QUESTIONS – 1

1. How many inputs does a half subtractor have?

a) 1
b) 2
c) 3
d) 4
2. What are the outputs of a half subtractor?
a) Sum and Product
b) Quotient and Remainder
c) Difference and Borrow
d) Carry and Overflow
3. Which of the following logic gates are used to construct a half subtractor?
a) XOR and OR gates
b) XOR and AND gates
c) AND and OR gates
d) NOR and NAND gates
4. In a half subtractor, what does the 'borrow out' signify?
a) A value is carried over to the next addition
b) A value is carried over from the previous subtraction
c) The need to borrow a bit from the next higher bit for subtraction
d) The remainder after subtraction

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3. FULL SUBTRACTOR
A Full Subtractor is a combinational circuit designed to perform subtraction of three bits: the
minuend, subtrahend, and borrow-in. Unlike the Half Subtractor, which can only subtract
two single-bit numbers, the Full Subtractor considers a possible borrow from a previous
subtraction, making it more suitable for multi-bit binary subtraction operations.

Inputs and Outputs:

The Full Subtractor has three inputs:
• Minuend (A): The bit from which we are subtracting.
• Subtrahend (B): The bit that is to be subtracted from the minuend.
• Borrow-in (Bin): The borrow received from the subtraction of the previous lower
significant bit.

And it has two outputs:

• Difference (D): The result of the subtraction of B and Bin from A.

• Borrow-out (Bout): This is set if the subtrahend is greater than the combination of the
minuend and the borrow-in, indicating that a '1' needs to be borrowed from the next
higher bit, as shown in Figure 3.

Fig 3: Full Subtractor

Operation:
The Full Subtractor performs binary subtraction per the following rules, which are also
reflected in its truth table:
• If A is 1 and B is 0, the Difference is 1, regardless of Bin.
• If A and B are both 0 or 1, the Difference is equal to Bin, and Bout is 0 unless both A and
B are 1, in which case Bout is 1.

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• If A is 0 and B is 1, the Difference is the inverse of Bin, and Bout is 1 because we need to
borrow from the next higher bit.

The logic for the outputs can be expressed using Boolean Algebra as follows:

Difference (D): D=A⊕B⊕Bin

Borrow-out (Bout): Bout= A’B+Bin-(A⊕B)

Where ⊕ is the XOR operation, ⋅ is the AND operation, and A’ is the NOT operation.

Truth Table of Full Subtractor:

The truth table of the full subtractor guides the design of the logic circuit that can handle
binary subtraction across multiple bits, including the borrow operations.

In the table:
• When A is 0 and B is 1, we need to borrow, regardless of Bin. Thus, D is 1 and Bout is 1
when Bin is 0; D is 0 and Bout is 1 when Bin is 1.
• When A is 1 and B is 0, we don't need to borrow. D is 1 if Bin is 0 and 0 if Bin is 1
(because we borrow from A). Bout is 0 since A is greater than B.
• When both A and B are the same, the D equals Bin, and Bout is activated only if both B
and Bin are 1 (since we need to borrow when subtracting 1 from 0).

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Logical Expression for Difference

D = A’B’Bin + A’BBin’ + AB’Bin’ + ABBin
= Bin(A’B’ + AB) + Bin’(AB’ + A’B)
= Bin( A XNOR B) + Bin’(A XOR B)
= Bin (A XOR B)’ + Bin’(A XOR B)
= Bin XOR (A XOR B)

D = (A XOR B) XOR Bin

Logical expression for Borrow

Bout = A’B’Bin + A’BBin’ + A’BBin + ABBin
= A’B’Bin +A’BBin’ + A’BBin + A’BBin + A’BBin + ABBin
= A’Bin(B + B’) + A’B(Bin + Bin’) + BBin(A + A’)
Bout = A’Bin + A’B + BBin

3.1 Implementation of Full Subtractor

The full subtractor can be implemented using basic logic gates. To implement the above
Boolean functions, you would typically need as shown in figure 4:
• Two XOR gates (for the difference output)
• Two AND gates and one OR gate (for the borrow-out output)

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Fig 4: Circuit Diagram of Full- Subtractor

When performing the subtraction, the full subtractor considers the two bits A and B and the
borrow-in from the previous lower significant bit (if any). Here's what happens for each
possible input combination:
• When A = B = Bin = 0: There's nothing to subtract, so D=0 and no borrow, so Bout=0.
• When A = B = 0 and Bin = 1: We need to borrow to subtract, so D=1 and Bout=1.
• When A = 0, B = 1, and Bin = 0: We need to borrow to subtract B from A, so D=1 and
Bout=1.
• When A = 1, B = 0, and Bin = 0: No borrow needed, so D=1 and Bout=0.
• When A = 1, B = 1, and Bin = 0: A and B cancel each other out, so D=0 and Bout=0.
• When A = 1, B = 0, and Bin = 1: We subtract the Bin, so D=0 and Bout=1.
• When A = 0, B = 1, and Bin = 1: B and Bin both require borrowing from A, so D=0 and
Bout=1.
• When A = B = Bin = 1: All are '1', so D=1 and Bout=1 (since we subtract B and Bin from
A, but we need to borrow for Bin).

3.2 Advantages and Disadvantages of Full Subtractor

Advantages of Full Subtractor:
1. Multi-Bit Subtraction Capability: A full subtractor can handle the borrow-in from the
subtraction of previous bits, enabling the subtraction of multi-bit binary numbers.
2. Cascading Potential: Full subtractors can be cascaded to construct subtractors for
larger binary numbers, allowing for extensive arithmetic operations in digital systems.
3. Accuracy in Arithmetic Operations: By accounting for borrow-in, full subtractors
ensure accurate arithmetic operations, which is crucial in computational devices.

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4. Compact Digital Implementation: On an integrated circuit, a full subtractor can be

implemented in a very compact manner, saving space and resources.
5. Versatility: It is an essential component in the design of complex arithmetic circuits,
such as arithmetic logic units (ALUs) in CPUs and other digital processing units.

Limitations or Disadvantages of Full Subtractor:

1. Complexity: Compared to a half subtractor, a full subtractor is more complex, requiring
more logic gates and, thus a larger area on a chip when implemented.
2. Speed Limitations: When multiple full subtractors are cascaded to handle large
numbers, the time it takes for the borrow to propagate can lead to slower overall
operation speeds.
3. Increased Power Consumption: More complexity means more gates are switching,
which typically leads to increased power consumption.
4. Design Complications: The need to manage borrow-in and borrow-out signals can
complicate the design and layout of arithmetic circuits, especially at larger scales.
5. Error Propagation: In cascaded setups, an error in the borrow operation can
propagate through the circuit, leading to incorrect results. This requires additional
error-checking mechanisms.

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SELF-ASSESSMENT QUESTIONS – 2

5. Which Boolean function is not directly used in constructing a full subtractor?

a) XOR
b) AND
c) NOR
d) OR
6. In a full subtractor, if the minuend (A) is '1', the subtrahend (B) is '0', and the
borrow-in (Bin) is '1', what are the difference and borrow-out?
a) Difference = 0, Borrow-out = 0
b) Difference = 0, Borrow-out = 1
c) Difference = 1, Borrow-out = 0
d) Difference = 1, Borrow-out = 1
7. Which of the following statements is true for a full subtractor?
a) A full subtractor can only subtract single-bit binary numbers.
b) A full subtractor can subtract two bits and consider a borrow from the
next significant bit.
c) A full subtractor requires two borrow inputs.
d) A full subtractor performs addition and subtraction simultaneously.

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4. BINARY PARALLEL ADDER

A Binary Parallel Adder is a digital circuit that is used to add binary numbers in parallel. In
simpler terms, it performs the arithmetic sum of two binary numbers at the same time,
rather than bit by bit or serially. This is a significant design as it greatly increases the speed
of addition, which is a fundamental operation in many digital systems, including computers
and calculators.

Fig 5: Block diagram of n-bit parallel adder

Typically, a binary parallel adder is constructed by chaining together several full adder
circuits. Each full adder is responsible for adding a bit from each of the two input numbers,
plus any carry bit from adding the previous less significant bits. The least significant bit (LSB)
is added using the first full adder, which only considers the carry-in if there's any from a
previous global operation; each subsequent bit uses the carry-out from the addition of the
previous pair of bits as its carry-in.

The most significant bit's (MSB) full adder's carry-out is the carry-out of the entire parallel
adder, which represents an overflow if the final sum exceeds the bit capacity of the adder as
shown in figure 5.

Working of Parallel Adder

i. The full adder FA1, as depicted in the picture, adds A1 and B1 in addition to the carry
C1, producing the sum S1 (the first bit of the output total) and the carry C2, which is
connected to the subsequent adder in the chain.

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ii. Subsequently, the carry bit C2 is utilised by the full adder FA2 in conjunction with the
input bits A2 and B2 to produce the sum S2, which is the second bit of the output sum.
Additionally, the carry bit C3 is connected to the subsequent adder in the chain, and
so on.
iii. The procedure continues until the last full adder, FAn, generates the final bit of the
output together with the final carry bit Cout by adding the carry bits Cn with its inputs
An and Bn.
4.1 Construction of 4-bit Parallel Adder
The construction of a 4-bit parallel adder involves combining multiple full adders (FAs) in a
way that the carry-out of one full adder becomes the carry-in of the next full adder, arranged
from the least significant bit (LSB) to the most significant bit (MSB).
Let’s consider two 4-bit binary numbers, A and B, as inputs to the Digital Circuit for the
operation with digits,
A0 A1 A2 A3 for A
B0 B1 B2 B3 for B
Since it's a 4-bit adder, four full adders are required to add each bit of the two 4-bit numbers.
These are the binary numbers to be added, designated as A3 A2 A1 A0 and B3 B2 B1 B0,
where A0 and B0 are the LSBs and A3 and B3 are the MSBs as shown in figure 6.

Fig 6: 4-Bit Parallel Adder

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Working Procedure:
1. LSB Addition
• The LSBs (A0 and B0) are input into the first full adder (FA0).
• The carry-in (Cin) for this first full adder is usually set to 0, as there is no previous carry.
• The sum output (S0) from FA0 is the LSB of the final sum.
• The carry-out (Cout) from FA0 becomes the carry-in for the next full adder.
2. Adding the Next Bits:
• The second set of bits (A1 and B1) along with the carry-out from FA0 are input into the
second full adder (FA1).
• The sum output (S1) from FA1 represents the second LSB of the final sum.
• The process continues similarly with the carry-out from FA1 becoming the carry-in for
FA2.
3. Continuing the Chain:
• The next full adder (FA2) adds the third bits (A2 and B2) and the carry-out from FA1.
• The sum output (S2) from FA2 is the second MSB of the final sum.
• Again, the carry-out from FA2 feeds into the carry-in of the next adder.
4. MSB Addition:
• The MSBs (A3 and B3) are input into the fourth full adder (FA3), along with the
carry-out from FA2.
• The sum output (S3) from FA3 is the MSB of the final sum.
• If there is a carry-out (Cout) from FA3, this represents an overflow, indicating that
the sum exceeds the 4-bit limit.

4.2 Applications of Parallel Adder

Parallel adders are widely used in digital electronics and computer systems where fast and
efficient binary addition is required. Here are some of the primary applications:
1. Arithmetic Logic Units (ALUs): In microprocessors and microcontrollers, parallel
adders are central to the ALU, which performs arithmetic operations. Since an ALU
needs to execute operations quickly, parallel adders are essential for their
performance.

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2. Digital Signal Processors (DSPs): DSPs, which are used for fast number-crunching
tasks such as audio, video, and other signal manipulations, often utilize parallel adders
to perform quick calculations required for processing digital signals.
3. Computer Graphics: Graphics processors require rapid calculations for rendering
images and videos. Parallel adders help in these computations, allowing for real-time
graphics processing.
4. Cryptography: Encryption and decryption algorithms frequently involve arithmetic
operations on binary numbers. Parallel adders can speed up these processes, which is
crucial for systems where cryptographic operations are performed frequently.
5. Calculators: Scientific and engineering calculators use parallel adders to perform fast
calculations, enhancing the user experience by providing immediate results.
6. Data Path Units: In the data paths of CPUs, where data is processed, parallel adders
are used to add binary numbers as part of more complex instructions during program
execution.
7. Control Systems: Industrial and consumer control systems, such as robotic controllers,
use parallel adders for various logic computations required to manage control
algorithms.
8. Networking Equipment: Network devices perform many operations that require the
quick addition of binary numbers, such as calculating checksums for error detection
and correction protocols.
9. Memory Address Calculation: Parallel adders are employed to calculate the addresses
in memory operations, speeding up data retrieval and storage.

4.3 Limitations of Parallel Adder

Parallel adders, while fast and efficient for adding multi-bit binary numbers, do have some
drawbacks:
i. Carry Propagation Delay: The most significant limitation of a parallel adder,
specifically a ripple carry adder, is the time it takes for the carry to propagate from
the least significant bit to the most significant bit. This delay is cumulative and
increases with the number of bits added, which can significantly affect the overall
speed for large bit-width adders

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ii. Circuit Complexity: To construct a parallel adder, multiple full adders must be
connected in series. This increases the complexity of the circuit and the number of
components required, making the design and layout more complicated compared to
a single full adder or half adder.
iii. Power Consumption: More complex circuits with a larger number of gates consume
more power. Each full adder within the parallel adder consists of several logic gates,
all of which consume power during operation, leading to higher overall power
consumption.
iv. Increased Area: The increased number of components in a parallel adder also means
it occupies more space on a chip. In integrated circuit design, where space is at a
premium, this can be a significant drawback.
v. Cost: The complexity and larger size of parallel adders translate to higher costs in
terms of both manufacturing and materials.
vi. Heat Dissipation: As a consequence of higher power consumption, parallel adders
can generate more heat. Efficient heat dissipation becomes a challenge, especially in
compact electronic devices.
vii. Design Time: The increased complexity of parallel adders means that more time is
required to design and test them, which can slow down the development process for
digital systems.

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SELF-ASSESSMENT QUESTIONS – 3

8. What is the purpose of the carry-out (Cout) of one full adder in a binary parallel
adder?
a) To serve as the final output of the adder
b) To serve as the carry-in (Cin) for the next higher bit full adder
c) To indicate the sum of the two bits
d) To reset the adder for the next operation
9. What is a potential drawback of a binary parallel adder?
a) It can only add positive numbers.
b) It adds numbers sequentially.
c) It can lead to carry propagation delay.
d) It can only add two numbers at a time.

5. CARRY PROPAGATION
Carry propagation refers to a phenomenon in digital arithmetic circuits where the carry-out
from one stage of addition becomes the carry-in for the next stage. In multi-bit adders,
especially those that perform operations in parallel, this effect can influence the speed and
efficiency of the computation.

Basic Concept
In binary addition, when you add two bits (1 and 1), the result is 2, which is represented as
10 in binary. The '0' becomes the sum, and the '1' becomes the carry. In a multi-bit adder,
this carry must be added to the next higher bit pair as shown in Figure 7. This dependency
of one bit addition on the result of the previous bit addition is what we call carry
propagation.

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Fig 7: Carry Propagate Adder: Connecting full adders to make a multi-bit carry-propagate
adder

Working Procedure
A carry propagate adder, more commonly referred to as a ripple carry adder (RCA), is a
type of adder used in digital logic composed of multiple full adders linked in a series. Each
full adder corresponds to one bit of the input operands and produces a sum and a carry-out,
which is then used as the carry-in for the next full adder in the chain.

Figure 7 depicts how the carry propagate adder operates:

Inputs and Outputs:

Inputs: Two binary numbers to be added, each typically represented as a multi-bit binary
value (e.g., A3 A2 A1 A0 and B3 B2 B1 B0 for a 4-bit adder).

Outputs: The binary sum of the inputs (S3 S2 S1 S0 for a 4-bit sum) and a carry-out (Cout),
which indicates an overflow if the result exceeds the bit capacity.

i. Least Significant Bit (LSB) Addition:

• The LSBs of the input numbers (A0 and B0) are added in the first full adder (FA0).
• The carry-in (Cin) for the first full adder is typically set to 0.
• The sum output (S0) from FA0 becomes the LSB of the final sum.
• The carry-out (Cout) from FA0 serves as the carry-in for the second full adder (FA1).

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ii. Sequential Addition:

• The next full adder (FA1) adds the next bit pair (A1 and B1) along with the carry-
in from FA0.
• This process continues sequentially, with each full adder using the carry-out from
the previous adder as its carry-in.
iii. Propagation Delay:
• The term "propagate" refers to the carry bit from each adder being passed along
to the next.
• As each adder waits for the carry from the previous adder, there is a delay before
the final sum and carry-out can be calculated, known as the propagation delay.
iv. Most Significant Bit (MSB) Addition:
• The final full adder in the chain (FA3 for a 4-bit adder) adds the MSBs (A3 and B3)
along with the carry-in from the previous stage (FA2).
• The sum output (S3) from FA3 is the MSB of the final sum.
• If there is a carry-out from FA3, this is often used as an overflow indicator,
signifying that the result is too large to be represented with the given number of
bits.

Ripple Effect
In a simple adder known as a ripple carry adder, the carry from each bit addition "ripples"
to the next, starting from the least significant bit (LSB) to the most significant bit (MSB). The
term "ripple" is used because the carry-out of one full adder must wait for the carry-out of
the previous full adder, causing a cascading or rippling effect. This process can introduce
delay since each bit addition must wait for the carry from the previous bit to be resolved
before it can complete its operation.

Delay in Propagation
The time it takes for a carry to propagate through all the stages of the adder is known as the
carry propagation time. This is a critical factor in the overall speed of the adder. In large
adders, where many bits are added in parallel, carry propagation time can significantly affect
the performance of the circuit, as each stage must wait for the completion of the previous
stage's carry before it can proceed.

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Overcoming Carry Propagation Delay

To overcome the limitations imposed by carry propagation delay, more sophisticated adder
designs have been developed. For example, the carry-lookahead adder is designed to
improve speed by calculating the carries in advance based on the inputs rather than waiting
for each stage to complete. This reduces the overall propagation time, allowing for faster
arithmetic operations.

Significance in Digital Systems

Understanding and managing carry propagation is crucial in digital system design, especially
in systems that require fast and efficient processing. It's a key factor in the design of
processors, where the speed of arithmetic operations can greatly influence the overall
performance of the system.

5.1 Difference between Binary Parallel Adder and Carry Propagation

Feature/Aspect Parallel Adder Carry Propagation

Definition A parallel adder is a digital circuit Carry propagation refers to the

that adds multiple binary numbers process by which a carry-out
simultaneously, bit by bit. from one-bit addition is carried
into the next-bit addition.

Primary Its primary function is to perform Its primary concern is the delay
Function fast arithmetic additions of binary associated with the carry
numbers. moving through successive
stages of addition.

Circuit A parallel adder is made up of Carry propagation is a

Complexity multiple full adders connected characteristic of the adder’s
together to add corresponding bits operation and not a circuit in
of input numbers at the same time. itself; it affects the complexity
of an adder circuit.

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Speed Parallel adders are generally faster The speed of an adder can be
than serial adders because they add significantly slowed down due
all bits at once. to the time it takes for the carry
to propagate through all the
bits.

Components Consists of multiple full adders or Consists of the carry logic

half adders (for the least significant within the full adders, which
bit). may be a simple connection (in
a ripple carry adder) or more
complex (in a carry-lookahead
adder).

Carry Handling Designed to handle carry internally The design specifically

but does not specifically address addresses how carry is handled
carry propagation delay. and aims to minimize the delay
of carry propagation.

Design Goal The goal is to perform parallel The goal is to manage or reduce
processing of addition to improve the delay introduced by the
overall computational throughput. carry to maintain or improve
the speed of the adder.

Typical Use Used in applications where quick, The concept is applied within
Case multi-bit binary addition is required, adder designs to optimize
such as in ALUs. performance, particularly in
high-speed computing
applications.

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SELF-ASSESSMENT QUESTIONS – 4

10. What does carry propagation in a binary adder refer to?

a) The process of adding two binary numbers together.
b) The movement of a carry-out from one stage of addition to the next.
c) The elimination of the carry bit in binary addition.
d) The conversion of binary numbers to decimal before addition.
11. What is the main disadvantage of carry propagation delay?
a) It increases the complexity of the adder.
b) It reduces the accuracy of the addition.
c) It increases the power consumption of the adder.
d) It slows down the overall addition process.

6. MAGNITUDE COMPARATOR
A digital magnitude comparator is a type of combinational circuit used to evaluate two binary
numbers and determine their relational status. This circuit is designed to take two inputs,
labelled A and B, and to provide three distinct outputs. These outputs signify whether the
first binary number, A, is greater than, equal to, or less than the second binary number, B.
The circuit's logical design, shown in Figure 8, ensures that each of these conditions is clearly
indicated via the corresponding output terminal.

Fig 8: Magnitude Comparator

The circuit operates by sequentially comparing the bits of two numbers, beginning with the
most significant bit (MSB) and proceeding to the least significant bit (LSB). For each pair of
bits at equivalent positions, the circuit examines whether the bit from the first number is
larger than the bit from the second.

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If it is, the A>B indicator is activated (set to 1), and the circuit concludes that the first
number exceeds the second. Conversely, if the bit from the second number exceeds the bit
from the first, the A<B indicator is activated, leading to the conclusion that the first
number is smaller than the second.

When the bits are identical (A=B), the comparison continues to the subsequent bit
level. This sequential comparison carries on until a difference is found or all bit positions
have been checked. If a discrepancy is identified, indicating that one number is larger or
smaller, the process halts, and the corresponding outcome is signalled.

If all the bits are equal, the circuit generates an A=B output, indicating that the two numbers
are equal.

6.1 1-Bit Magnitude Comparator

Fig 9: 1-bit Magnitude Comparator

A single-bit comparator is a device that evaluates two individual bits. It has two input
channels for the single-bit numbers and yields three outputs, indicating whether one binary
number is less than, equal to, or greater than the other.

Below is the truth table for a comparator that handles just one bit.

A B A<B A=B A>B

0 0 0 1 0

0 1 1 0 0

1 0 0 0 1

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1 1 0 1 0

The Logical expression for the above truth table can be derived as:
For A < B : A’B
For A = B: A’B’ + AB
For A > B: AB’

Circuit Diagram:

Fig 10: 1-bit Magnitude Comparator Circuit Diagram

Here's how the logic gates are typically arranged and function:

Case 1: A = B
The equality output can be determined using an XNOR gate since this gate outputs a high
signal (1) when both inputs are the same.

Logic: A=B = A XNOR B

Case 2: A > B
The greater than output can be determined using an AND gate and a NOT gate. Since A is
greater than B only if A is 1 and B is 0, you can think of this as A AND (NOT B).

Logic: A>B = A AND (NOT B) = AB’

Case 3: A< B
The less than output is the opposite condition of greater than; it's high when A is 0 and B is
1.

Logic: A<B = (NOT A) AND B = A’B

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SELF-ASSESSMENT QUESTIONS – 5

12. What is the main function of a magnitude comparator?

a) To add binary numbers
b) To subtract binary numbers
c) To compare the magnitudes of binary numbers
d) To multiply binary numbers
13. Which logic gate can be used to determine the equality of two single bits in a
1-bit magnitude comparator?
a) AND gate
b) OR gate
c) XOR gate
d) XNOR gate
14. How many outputs are there in a basic magnitude comparator?
a) One
b) Two
c) Three
d) It varies based on the number of input bits

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7. SUMMARY
In digital arithmetic, the half subtractor is the simplest circuit for subtracting two single
binary digits, outputting the difference and a borrow if needed. However, its inability to
account for borrow from previous digits is remedied by the full subtractor, which accepts an
additional input for borrow-in, allowing for seamless multi-bit binary subtraction. For
addition tasks, the parallel adder steps in, efficiently summing multi-bit binary numbers by
performing all bit additions simultaneously, significantly speeding up computations
compared to serial methods. This speed, however, introduces the concept of carry
propagation, where the carry-out from one bit's addition becomes the carry-in for the next,
potentially causing a ripple effect that can slow down the process in large-scale operations.
Finally, the magnitude comparator serves a crucial role in digital decision-making, it
compares binary values across multiple bits, indicating whether one number is greater than,
less than, or equal to another, thus directing computational logic and control flow within
digital systems. Together, these components form an essential toolkit for executing and
managing arithmetic operations and comparisons in the digital domain.

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8. TERMINAL QUESTIONS
1. Implement Half and Full Subtractor using Basic Gates. (2.1 and 3.1)
2. Construct 4-bit Parallel Adder (4.1)
3. Differentiate Binary Parallel Adder with Carry Propagation (5.1)
4. Construct 2- Bit Magnitude Comparator (6.1)
5. Explain the applications of Parallel Adder. (4.2)

9. ANSWERS
Self-Assessment Answers
1. 2
2. Difference and Borrow
3. XOR and AND gates
4. The need to borrow a bit from the next higher bit for subtraction
5. NOR
6. Difference = 0, Borrow-out = 0
7. A full subtractor can subtract two bits and consider a borrow from the next significant
bit.
8. To serve as the carry-in (Cin) for the next higher bit full adder.
9. It can lead to carry propagation delay.
10. The movement of a carry-out from one stage of addition to the next.
11. It slows down the overall addition process.
12. To compare the magnitudes of binary numbers
13. XNOR gate
14. Three

Terminal Answers
1. Refer to Sections 2.1 and 3.1.
2. Refer to Section 4.1.
3. Refer to Section 5.1.
4. Refer to Section 6.1.
5. Refer to Section 4.2.

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Unit 9
Advanced Combinational Circuits

Table of Contents

SL Fig No / Table SAQ /

Topic Page No
No / Graph Activity
1 Introduction - -
4-5
1.1 Learning Objectives - -
2 Encoder 1, 2, 3. 4, 5 1

2.1 4:2 Encoder - -

6-12
2.2 8:3 Encoder - -

2.3 Advantages and Drawbacks of Encoder - -

3 Decoder 6, 7, 9 2

3.1 4 Decoder - - 12-18

3.2 Advantages and Limitations of Decoder - -

4 Multiplexer 10, 11, 12, 13 3

4.1 Definition and purpose of a multiplexer - -

4.2 Basic operation - - 19-27

4.3 Types of Multiplexers: 2:1, 4:1, n:1 - -

4.4 Applications of Multiplexers - -

5 De-multiplexer Circuit - 4

5.1 Definition and purpose of demultiplexers - -

28-35
5.2 Demultiplexer Types: 1:2, 1:4 - -

5.3 Applications of DEMUX - -

6 Design of Code Converter 14, 15, 16, 17, 5
18, 19

6.1 Introduction to Code Converters - - 36-43

6.2 Binary to Gray Code Converter - -

6.3 Gray to Binary Code Converter -

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7 Summary - - 44
8 Terminal Questions - - 45
9 Answers - 45

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1. INTRODUCTION
Advanced combinational circuits extend the fundamental principles of digital logic to
perform more complex operations required in modern digital systems. They manipulate
binary information to encode, decode, select, route, and convert data in various applications
ranging from data communication to user interface management. Encoders are devices that
convert information from one format or code to another, typically from a more expansive set
of data inputs to a more streamlined output. In digital circuit design, an encoder might take
multiple input lines and encode them into a binary code represented by fewer output lines.
A common example is a keyboard encoder, which turns key presses into a form a computer
can understand. Decoders perform the inverse operation. They take a binary input and
decode it into a number of output lines, essentially expanding the encoded signal back into
its original state. Decoders are used in a multitude of applications, such as memory address
decoding, where the binary address input needs to be decoded to access a specific memory
location.

Multiplexers, or muxes, take several separate input signals and select one to pass through to
the output. They are effectively data selectors, controlled by additional inputs known as
select lines. Multiplexers are essential when multiple data signals must be sent over a single
line, such as in telecommunications networks. Demultiplexers, or demuxes, are the opposite
of multiplexers. They take a single input signal and distribute it to one of several output lines.
A demultiplexer is controlled by a set of select lines and is used to route a signal to one of
many devices. This is useful when a single data source needs to be connected to multiple
destinations, one at a time. Code Converters are specialised circuits that transform data from
one binary code to another, such as from binary-coded decimal (BCD) to binary or from
binary to grey code. These converters are vital in systems that need to interface different
coding standards, like digital watches, calculators, or digital systems interfacing with analog-
to-digital converters.

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1.1 Learning Objectives

At the end of this topic, students should be able to,
❖ Describe how an encoder consolidates multiple input signals into a simpler output code.
❖ Implement a decoder circuit to serve a particular decoding function.
❖ Demonstrate the use of a MUX in a practical digital circuit.
❖ Outline how a DEMUX distributes a single input across multiple outputs.
❖ Execute a conversion from one binary code to another using a code converter.

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2. ENCODER
An encoder is a combinational circuit that converts analogue or digital signals/data into a
coded format. In digital electronics, it typically refers to a device that converts multiple
binary inputs into a smaller number of outputs, which is a coded representation of the input
signals. Basic encoder is shown in Figure 1.

Fig 1: Encoder

Basic Functioning of an Encoder:

• Input Lines: An encoder has multiple input lines, but only one is activated at a time.
• Output Lines: It has fewer output lines than input lines. The number of output lines
depends on the number of input lines, following the formula 2n input lines to 'n' output
lines, where 'n' is the number of bits in the output.
• Encoding Process: When one of the input lines is activated (set to 1), the encoder
produces a binary code on the output lines corresponding to the activated input line's
index.

2.1 4:2 Encoder

A 4-to-2 encoder is a combinational circuit that takes four input signals and encodes them
into two outputs. This kind of encoder reduces the number of data lines (inputs) by encoding
four lines into two lines based on which input line is active. It essentially provides binary
representations for the input lines that are active.

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Fig 2: 4:2 Encoder

The 4-to-2 Encoder features four input lines labelled Y3, Y2, Y1, and Y0, and it produces two
output signals, A1 and A0. For the encoder to function correctly and provide the
corresponding binary code at the output, only one input line should be high ('1') at any given
moment, as shown in Figure 2.

INPUTS OUTPUTS

Y3 Y2 Y1 Y0 A1 A0

0 0 0 1 0 0

0 0 1 0 0 1

0 1 0 0 1 0

1 0 0 0 1 1

The truth table assumes that only one input will be active at any given time. According to
that from the truth table, we can write the Boolean functions for each output as,
A1 = Y3 + Y2
A0 = Y3 + Y1

These expressions mean that A1 is high if either Y3 or Y2 is high, and A0 is high if either Y3
or Y1 is high. The '+' symbol represents the logical OR operation.

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Circuit Diagram:

Fig 3: Circuit Diagram of 4:2 Encoder

The circuit based on the logical function of a 4-to-2 encoder:

Case 1: Output A0 (Least Significant Bit):

• A0 is set to high if the first or the third input is high (considering Y0 as the first input
and Y3 as the fourth). This is because we want A0 to represent the LSB of the binary
count of the input line number.
• The logical expression for A0 based on the inputs is: A0=Y1+Y3.
• In the circuit, this is achieved by connecting inputs Y1 and Y3 to a 2-input OR gate,
whose output is A0.

Case 2: Output A1 (Most Significant Bit):

• A1 is set to high if the second or the fourth input is high. This output signifies the MSB
of the binary count.
• The logical expression for A1 is: A1=Y2+Y3.
• Similar to A0, inputs Y2 and Y3 are connected to another 2-input OR gate, whose output
is A1.

Note:
In this circuit diagram,
• Each OR gate represents the logic sum (+) of the inputs connected to it.
• The Y3 input is connected to both OR gates because its binary representation is '11',
which sets both A1 and A0 high.
• Y2 input is connected only to the A1 OR gate, and Y1 input is connected only to the A0
OR gate, representing their binary count '10' and '01', respectively.
• Y0 is not connected because when it is high, both outputs A1 and A0 are low ('00').

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2.2 8:3 Encoder

An 8-to-3 encoder is a combinational circuit that reduces eight inputs to three outputs. The
eight inputs are typically labelled from Y0 to Y7, and the outputs are labelled as A0, A1, and
A2. The purpose of the encoder is to output a binary code corresponding to the activated
input line, assuming that only one input is active at any time.

Fig 4: 8:3 Encoder

To ensure the correct binary code is produced, just one out of the eight inputs should be high
('1') at any given moment.

The truth table for the octal to the binary encoder, provided below, illustrates this
correspondence.

Inputs Outputs

Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0 A2 A1 A0

0 0 0 0 0 0 0 1 0 0 0

0 0 0 0 0 0 1 0 0 0 1

0 0 0 0 0 1 0 0 0 1 0

0 0 0 0 1 0 0 0 0 1 1

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0 0 0 1 0 0 0 0 1 0 0

0 0 1 0 0 0 0 0 1 0 1

0 1 0 0 0 0 0 0 1 1 0

1 0 0 0 0 0 0 0 1 1 1

From the above Truth table, the Boolean functions can be written as:
A2=Y7+Y6+Y5+Y4
A1=Y7+Y6+Y3+Y2
A0=Y7+Y5+Y3+Y1

The Circuit Diagram is shown in Figure 5.

Fig 5: Circuit Diagram of 8:3 Encoder

These expressions mean that the output A0 is high if any of the inputs representing the least
significant bit of the binary numbers 1 to 7 is high. Similarly, A1 and A2 correspond to the
second and third least significant bits of the binary numbers.
The circuit diagram would show the inputs connected to OR gates arranged in such a way as
to reflect these expressions.

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2.3 Advantages and Drawbacks of Encoder

Advantages of Encoders:
• Data Simplification: Encoders can significantly reduce the number of data lines
needed by converting a larger set of data inputs into a more compact encoded format.
• Efficiency: By simplifying data, encoders make the transmission of information more
efficient, requiring fewer wires or channels, which can also lead to cost savings.
• Standardization: Encoders help standardise signals or data inputs so they can be
interpreted consistently across various systems.
• Space-saving: In hardware design, using encoders can save space on circuit boards and
chip designs by minimising the number of connections and circuits needed.
• Facilitate Digital Processing: Encoders are essential in systems that process digital
signals, like computers and electronic musical instruments, converting inputs into a
form that can be digitally processed.
Drawbacks or Limitations of Encoders:
• Ambiguity: Simple encoders can become ambiguous if multiple inputs are active at the
same time, potentially leading to incorrect encoding unless additional circuitry is used
to handle these situations.
• Error Handling: Encoders typically do not have built-in error detection or correction,
which can be a limitation in systems where data integrity is critical.
• Dependency on Inputs: Encoders rely on the assumption that input signals will be in
expected forms. If inputs are noisy or incorrect, the output will be compromised.
• Power Consumption: While encoders reduce the number of lines, the encoding process
may consume additional power, especially in complex encoders.
• Latency: Encoding data can introduce a small latency as the data is processed and
converted, which might be a concern in real-time systems.

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SELF-ASSESSMENT QUESTIONS – 1

1. What is the main function of an encoder in digital electronics?

a) To amplify digital signals
b) To convert analog signals to digital
c) To compress multiple inputs into a smaller number of outputs
d) To filter noise from digital signals
2. What would be the typical output of an encoder with 8 input lines?
a) 8 output lines
b) 3 output lines
c) 2 output lines
d) 1 output line

3. DECODER
A decoder is a combinational circuit that converts coded input signals into a set of outputs that
represent the original data before encoding. It performs the inverse operation of an encoder.
Decoders are widely used in digital electronics to facilitate the processing and interpretation
of complex data by breaking down encoded information into a more understandable or
usable form.

Basic Functioning of a Decoder:

• Input Lines: A decoder receives a binary number as its input, which is typically encoded
in a format like Binary Coded Decimal (BCD – 8421 code) or another binary-based code.
• Output Lines: The decoder has multiple output lines, and it activates one specific
output for each possible input code when it is enabled. For instance, a 3-to-8 decoder
has 3 input lines and 8 output lines.
• Decoding Process: The binary code on the input lines determines which single output
line is activated. The active output corresponds to the binary number on the input as
shown in Figure 6.

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Fig 6: Decoder

3.1 2: 4 Decoder
The figure below shows the logic diagram of the 2:4 decoder. A 2-to-4 decoder is a digital
circuit which decodes a 2-bit binary input into one of four outputs. Each of the four outputs
corresponds to one of the combinations of the two binary input bits, ensuring that only one
output is active at any time.

The enable pin (E Pin) is an additional control input that must be active (logic high) for the
decoder to operate. If the enable pin is not active (logic low), the decoder's outputs will all
be inactive (usually logic low), regardless of the 2-bit input.

Fig 7: 2:4 Decoder

Here's how the 2-to-4-line decoder with an enable pin functions:

• Inputs: Two Binary Inputs (A1, A0): These are the binary signals that the decoder will
interpret.
• Enable Input (E): This control input must be active for the decoder to operate.
• Outputs: Four Outputs (Y3, Y2, Y1, Y0): These correspond to the decoded output
signals. Only one output is active at any given time when the enable pin is active.

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Truth Table:
Here's the truth table for a 2-to-4 decoder with an enable pin:

Enable Inputs Outputs

E A1 A0 Y3 Y2 Y1 Y0

0 x x 0 0 0 0

1 0 0 0 0 0 1

1 0 1 0 0 1 0

1 1 0 0 1 0 0

1 1 1 1 0 0 0

From the above truth table, the Boolean expression can be written as:

Y3=E.A1. A0

Y2=E.A1. A0′

Y1=E.A1′. A0

Y0=E.A1′. A0′

Each output corresponds to a unique combination of input conditions, resulting in four

distinct product terms. To realise these conditions, we utilise four AND gates, each with three
inputs, along with two inverters. The circuit diagram of a 2-to-4 decoder is depicted in the
figure 8.

Circuit Diagram
The circuit diagram for a typical 2-to-4 decoder is as follows:

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Fig 8: Circuit diagram of 2:4 Decoder

i. Inputs:
The decoder has two binary input lines, typically labelled A1 (the more significant bit) and
A0 (the less significant bit).
ii. Inverters:
Two inverters are used to create the inverted signals of A1 and A0, which are needed for the
AND gates. These inverted signals are usually labelled as A1’ and A0’.

iii. AND Gates:

The decoder has four AND gates, each responsible for generating one of the four output
signals.

Each AND gate has three inputs: one from the enable line (E) and the other two from either
A1, A0, A1’ and A0’, depending on which output it's responsible for.

iv. Enable Line:

The enable line (E) is connected to each AND gate. If the enable line is inactive (logic low), all
the outputs will be low regardless of the input values. When E is high, the decoder functions
normally.

v. Outputs:
The four outputs are labelled Y0, Y1, Y2, and Y3. Each output corresponds to one of the
possible input combinations when the enable line is active:

Y0 is active when A1 is 0 and A0 is 0.

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Y1 is active when A1 is 0 and A0 is 1.

Y2 is active when A1 is 1 and A0 is 0.

Y3 is active when A1 is 1 and A0 is 1.
vi. Logic Connections:
Output Y0 is connected to AND gate inputs E, A1’ and A0’.
Output Y1 is connected to AND gate inputs E, A1’ and A0.
Output Y2 is connected to AND gate inputs E, A1, and A0’.
Output Y3 is connected to AND gate inputs E, A1, and A0.
The circuit diagram would show the inputs A1 and A0 connected to their respective inverters
and the outputs from these inverters, along with the direct inputs A1 and A0 connected to
the AND gates according to the decoder's logic. The enable line is also shown connected to
each AND gate to control the decoder's output.
The AND gates will only activate their respective outputs when their specific combination of
inputs is present and the enable line is high. This ensures that only one output is active at
any given time for a valid input combination.

3.2 Advantages and Limitations of Decoder

Advantages of Decoders:
• Data Demultiplexing: Decoders can distribute a single input signal to multiple
outputs, effectively functioning as demultiplexers, which is invaluable in routing signals
in digital systems.
• Simplifies Circuit Design: By translating encoded signals into explicit outputs,
decoders simplify the design of circuits that require a distinct action for each possible
input combination.
• Versatility: Decoders are used in a wide array of applications, from simple data routing
to complex tasks like memory address decoding, which is essential for accessing
specific memory locations in computers.
• Enable Digital Displays: Decoders are crucial for driving digital displays, such as
seven-segment displays, where they convert binary inputs into the required format to
light up specific segments.

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• Facilitate Instruction Execution: In CPUs, decoders translate opcode bits into sets of
control signals that drive the subsequent stages of instruction execution.

Limitations of Decoders:
• Input Limitations: Decoders rely on the assumption that input signals are clean and
well-defined. Noisy or incorrect inputs can lead to incorrect outputs.
• Complexity for Large Sets: The number of output lines increases exponentially with
the number of input lines. Therefore, decoders for large data sets can become quite
complex and bulky.
• Latency: Especially in large or complex decoders, there can be a noticeable delay
between the input signal and the output response, which might not be suitable for time-
sensitive applications.
• Power Consumption: Decoders with a large number of outputs can consume
considerable power, as each output line might drive a separate load.
• Limited Functionality: Standard decoders only translate binary codes to outputs and
cannot perform other logical functions or arithmetic operations.
• Static Function: Decoders are designed for specific functions and are not
programmable. If the input coding or required outputs change, the decoder circuit must
be redesigned or reconfigured if programmable logic devices are used.

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SELF-ASSESSMENT QUESTIONS – 2

3. What is the primary function of a decoder?

a) To combine multiple signals into one
b) To convert digital signals into analog signals
c) To convert encoded data into a more understandable form
d) To amplify signal strength
4. How many outputs does a 3-to-8 line decoder have?
a) 3
b) 8
c) 2
d) 16
5. In a decoder circuit, if all outputs are low, what could be the possible reason?
a) The input data is invalid
b) The enable signal is not activated
c) The decoder is malfunctioning
d) The decoder is working perfectly

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4. MULTIPLEXER
A multiplexer, often abbreviated as MUX, is a combinational circuit that selects one of several
input signals and forwards the selected input into a single line. A multiplexer functions as a
multi-input and single-output switch, channelling data from multiple sources to an output
destination.

The main characteristics of MUX are:

• Multiple Inputs: A multiplexer has several input lines, but only one of these inputs can
be connected to the output at any given time.
• Single Output: Despite the multiple input lines, there is only one output line through
which the selected input is sent.
• Selection Lines: To control which input is connected to the output, a multiplexer uses
selection or control lines. The number of selection lines determines the number of
inputs the multiplexer can handle, following the formula 2n, where 'n' is the number of
selection lines.
• Data Routing: Multiplexers can be used to route digital or analogue signals, making
them versatile components in electronic systems.

4.1 Purpose of a Multiplexer

The purpose of a multiplexer (MUX) is to manage and optimise the use of limited resources
by channelling multiple signals through a single data path or processing unit.

The primary purposes are:

• Efficient Data Routing: In many digital systems, there are more data sources than
destinations or more potential inputs than processing paths. A multiplexer efficiently
routes one of several input signals to a single output line based on selection criteria,
thus saving on circuit complexity and costs.
• Resource Conservation: Multiplexers allow multiple signals to share a single physical
channel or device, which conserves resources. This is particularly important in
telecommunications and networking, where the infrastructure costs are high.

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• Signal Selection: A MUX can dynamically select which signal to pass to the output. This
is useful in control systems where different sensors might need to be read at different
times, and all the data needs to be processed by a single unit.
• Functionality Expansion: In microprocessors and digital logic circuits, MUXes can
expand the functionality of a limited number of pins or connectors. For example, a
single processor pin, through a MUX, can be used to interface with multiple
input/output devices.
• Time Division Multiplexing: Multiplexers facilitate time division multiplexing, where
two or more signals are combined and transmitted over a single channel by assigning
each signal a different time slot, thereby increasing the effective bandwidth of the
medium.
• Complex System Simplification: By reducing the number of wires and the complexity
inherent in managing separate lines for each signal, multiplexers simplify the design
and analysis of complex digital systems.
• Speed Enhancement in Data Transfer: In digital circuits, multiplexers can increase data
transfer speeds by allowing faster devices to take turns using the slower parts of a
system, thereby optimising overall performance.

4.2 Basic Operation of a Multiplexer

The basic operation of a Multiplexer (MUX) involves selecting one of several input signals
and transmitting it to a single output line. A multiplexer acts like a digitally controlled multi-
position switch where the selection of the input line is governed by additional control signals,
often referred to as select lines as shown in figure 9.

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Fig 9: Logic Diagram of n:1 MUX

MUX operates as follows:

i. Multiple Inputs: A multiplexer has several input lines, denoted as I0, I1, I2, I3,…., In,
where 'n' is determined by the number of select lines. The number of inputs is
typically a power of 2 (2k, where 'k' is the number of select lines).
ii. Select Lines: The select lines or control lines, usually denoted as S0, S1, S2, S3, …., S k-
1, determine which input line is connected to the output. The binary value represented

by these select lines corresponds to the input line number that will be connected to
the output.
iii. Output: There is only one output line in a MUX. The selected input appears at this
output.
iv. Selection Process: When the MUX receives the binary select signal, it connects the
corresponding input line to the output. For example, if the select lines are set to the
binary value '01', I1 would be connected to the output.
v. Data Transmission: Once the connection is made, the signal present at the selected
input line is transmitted to the output.
vi. Blocking Other Inputs: All other input signals are blocked from reaching the output.
Only the selected input is passed through.

For instance, in a simple 4-to-1 MUX with two select lines (S1 and S0):
• If S1, S0 = 00, I0 is connected to the output.
• If S1, S0 = 01, I1 is connected to the output.
• If S1, S0 = 10, I2 is connected to the output.
• If S1, S0 = 11, I3 is connected to the output.

4.3 Types of Multiplexers

Multiplexers are categorised based on the number of input lines they can select from to
produce a single output.

Here are the common types of multiplexers, distinguished by their input-to-output ratios:
2:1 Multiplexer
4:1 Multiplexer
8: 1 Multiplexer

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16: 1 Multiplexer
32:1 Multiplexer and so on

Each of these multiplexers can be represented with a simple formula: a n:1 multiplexer has n
inputs and 1 output, with the number of select lines required being log2(n).

i. 2:1 Multiplexer:

Inputs: Has 2 input lines.

Select Lines: Requires 1 select line (since 21 = 2).

Operation: The select line determines which of the two inputs is routed to the output.

Use Cases: Simple selection scenarios like switching between two sources.

Fig 10: 2:1 MUX

Truth Table

S D1 D2 Y

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

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1 0 1 1

1 1 0 0

1 1 1 1

In the above truth table, we can observe:

When S (Select line) is set to 0, then D1 is connected to output i.e.,

If D1=0, then Y=0

If D1=1, then Y=1, similarly

When S (Select line) is set to 1, then D2 is connected to output i.e.,

If D2=0, then Y=0

If D2=1, then Y=1.

i.e.,

• When the select line S is low (logic level '0'), the MUX connects input I0 to the output.
• When S is high (logic level '1'), the MUX connects input I1 to the output.

Circuit Diagram

Fig 11: Circuit Diagram of 2:1 MUX

The 2-to-1 MUX can be implemented using basic logic gates in the following way:

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• AND Gates: Two AND gates are used, one for each input.
The first AND gate receives I0 and the inverted select line S’ as inputs.
The second AND gate receives I1 and S as inputs.
• Inverter: An inverter is used to create S from S.
• OR Gate: An OR gate combines the outputs of the two AND gates. The result is that if
S is '0', the OR gate outputs the value of I0, and if S is ‘1’, it outputs the value of I1.

ii. 4:1 Multiplexer:

Inputs: Has 4 input lines.

Select Lines: Requires 2 select lines (since 22 = 4).
Operation: The combination of the two select lines dictates which of the four inputs is
connected to the output.
Use Cases: More complex selection requirements, such as data routing within digital circuits.

Fig 12: 4:1 MUX

Truth Table

Input Output
S0 S1 Y
0 0 D0
0 1 D1
1 0 D2
1 1 D3

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In the above truth table, we can observe:

When S0 S1 (Select lines) are set to 00, D0 is connected to the output.
When S0 S1 (Select lines) are set to 01, D1 is connected to the output.
When S0 S1 (Select lines) is set to 10, D2 is connected to the output.
When S0 S1 (Select lines) are set to 11, D3 is connected to the output.
The Boolean function for output Y can be written as,
Y=S1’ S0’ I0 + S1’ S0 I1 + S1 S0’ I2 + S1 S0 I3

Circuit Diagram:

Fig 13: Circuit Diagram of 4:1 MUX

The 4-to-1 MUX can be implemented using basic logic gates in the following way:

• AND Gates: Four AND gates are used, each corresponding to one of the input lines. Each
gate will have three inputs: one from the input line and two from the select lines (either
direct or inverted).
• Inverter: Two inverters are used to create the inverse of the select lines, providing S1’
and S0’.
• OR Gate: A single OR gate combines the outputs of all four AND gates. The OR gate's
output is the multiplexer's output.

Similarly, users can design for 8:1, 16:1, and n:1 MUX.

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4.4 Applications of Multiplexers

The prominent applications of multiplexers:
• Data Routing: MUXes can direct data from multiple sources to a single destination,
making them ideal for switching and routing applications within digital systems.
• Communication Systems: In telecommunication, multiplexers allow multiple analog
or digital signals to share the same transmission line, such as in TDM (Time Division
Multiplexing) and FDM (Frequency Division Multiplexing).
• Computer Memory: MUXes can select from various memory addresses; thus, they are
used in the memory addressing systems of computers to read data from or write data
to specific memory locations.
• Arithmetic and Logic Units (ALUs): In ALUs within CPUs, multiplexers are used to
select the result of one of several arithmetic or logic operations.
• Information Sharing: They enable one single operational amplifier or ADC (Analog-to-
Digital Converter) to be shared among several input signals in a sequential manner,
saving on hardware.
• Signal Processing: Multiplexers are used in signal processing circuits to combine
multiple inputs into one single data stream for processing and analysis.
• Control Systems: In control systems, MUXes allow for the selection of different signal
paths or control signals based on the status of various sensors or inputs.
• Resource Management: They help in managing resources efficiently in embedded
systems by allowing different peripherals to share a single microprocessor or
microcontroller pin.
• Digital Audio/Video Broadcasting: Multiplexers combine multiple audio and video
signals for digital broadcasting over a single channel.
• Networking Equipment: Network routers and switches use multiplexers to manage
data coming from different devices over a single bandwidth channel.

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SELF-ASSESSMENT QUESTIONS – 3

6. What does a multiplexer do?

a) Converts analog signals to digital.
b) Combines multiple signals into one signal.
c) Separates a single signal into multiple signals.
d) Converts digital signals to analog.
7. How many select lines are needed for an 8-to-1 multiplexer?
a) 2
b) 3
c) 4
d) 8
8. In a 4-to-1 multiplexer, if the select lines are 00, which input is connected to
the output?
a) I0
b) I1
c) I2
d) I3

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5. DE-MULTIPLEXER CIRCUIT
A demultiplexer (DEMUX) is a combinational circuit that takes a single input signal and
channels it to one of several output lines, effectively performing the opposite operation of a
multiplexer. The selection of the output line onto which the input is routed is determined by
additional control signals known as select lines.

Demultiplexer features a single input, 'n' select lines, and up to 2^n possible output lines. The
specific output to which the input is routed is determined by the binary value represented
by the select lines.

Given 'n' select lines, there are 2^n potential binary combinations, with each unique
combination corresponding to one of the demultiplexer's outputs. Thus, a specific
combination of the select lines activates only one of the outputs at a time. This device is
commonly referred to as a De-Mux.

Characteristics of a Demultiplexer:
• Single Input: A DEMUX has one input line that receives the signal to be distributed.
• Multiple Outputs: The device features several output lines, but only one output line is
active at any given time.
• Select Lines: The select lines control which output line will be active. The number of
select lines determines how many outputs the DEMUX can manage, typically following
the formula 2n, where 'n' is the number of select lines.
• Data Distribution: A DEMUX distributes the single input signal to the selected output
line, leaving all other output lines inactive.

4.1 Purpose of De-multiplexers

The purpose of a demultiplexer (DEMUX) in digital circuits is to take a single input signal and
steer it to one of several output lines based on a set of selection inputs. It essentially performs
the reverse operation of a multiplexer.

Here are the primary purposes and uses of a demultiplexer:

• Distributing Data: A DEMUX can direct data from a single source to multiple
destinations. In data handling systems, this is crucial for routing signals to the
appropriate processing paths.

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• Signal Separation: In communication systems, demultiplexers are used to separate

multiplexed signals back into their original streams. This is important in systems that
use time-division multiplexing (TDM) or frequency-division multiplexing (FDM).
• Control Systems: In control applications, a DEMUX can channel control signals to
specific parts of a system. This is useful when a single controller operates multiple
subsystems, and it needs to control them individually at different times.
• Sequential Operations: A demultiplexer can be used to perform sequential operations
on multiple data blocks or devices, one at a time, with a single control signal.
• Memory Addressing: DEMUXes are used in memory systems to select individual
memory addresses to which data should be written or from which data should be read.
• Expanding Output Capacity: In digital systems with limited output pins, such as
microcontrollers, a demultiplexer can expand the number of devices the
microcontroller can interact with.
• Testing and Measurement: In test equipment, a DEMUX can route signals from a single
test point to multiple measurement devices, allowing for multiple tests to be conducted
sequentially with automated switching.
• Resource Optimization: By allowing a single data line to be connected to multiple
outputs, demultiplexers help in optimising resources in a system, minimising the need
for additional wiring and complexity.

5.2 Demultiplexer Types

Demultiplexers (DEMUX) are devices that take a single input signal and distribute it to one
of several output lines. The most common types are the 1:2, 1:4, 1:8, 1:16 and 1:32 etc
DEMUX.

i. 1:2 DEMUX
A 1:2 DEMUX takes a single input and directs it to one of two outputs, depending on the
state of a single control signal.
Basic Operation:
• Inputs: There is one data input line and one control input line (select line).
• Outputs: There are two output lines.

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• Control: The state of the select line determines which of the two output lines carries
the signal from the input.

Fig 14: 1:2 DEMUX

1:2 DEMUX is shown in Figure 14, which consists of 1 input D, Select line S, and two outputs
Y1, Y0

When the select line is low (0), the DEMUX routes the input signal to the first output (Output
0). When the select line is high (1), the input is routed to the second output (Output 1).

Truth Table

Select Input Output

S D Y1 Y0

0 0 0 0

0 1 0 1

1 0 0 0

1 1 1 0

Let's consider that the 1-to-2 Demultiplexer has two outputs, Y0 and Y1, and select and data
inputs, S and D, respectively. According to the preceding table, when S D = 0 1 (i.e., the
combination of the input line and the select line is active low and the input line is high), the
output Y0 is active.

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Similarly, Output Y1 is active when S=1 and D=1 i.e., the combination of Select line and input
line are active high.

The Boolean function for Y0 and Y1 can be expressed as,

Y0 = S’D

Y1=S D

Circuit Diagram

Fig 15: Circuit Diagram of 1:2 DEMUX

The circuit diagram of a 1-to-2 demultiplexer involves a single input, a single select line, and
two outputs. The demultiplexer routes the input signal to one of the two outputs based on
the state of the select line.

Implementation using logic Gates:

Input: The DEMUX has a single input line, usually labeled as D (for Data).
Select Line: There is one select line, labeled as S.
Outputs: There are two outputs, often labelled as I0 and I1.

Logic Gates Used:

AND Gates: Two AND gates are used to create the two possible paths for the input signal.
NOT Gate: A NOT gate is used to invert the select line signal for one of the AND gates.

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Connections:
• The input line D is connected to one input of each of the two AND gates.
• The select line S is directly connected to one input of the first AND gate (for output Q1)
and is connected through a NOT gate to the second AND gate (for output I0).

Operation:
• When the select line S is low (logic 0), the NOT gate inverts it to a high (logic 1), which
enables the second AND gate, routing the input D to output I0.
• Conversely, when S is high (logic 1), the first AND gate is enabled, and D is routed to
output I1.

ii. 1:4 DEMUX

A 1-to-4 demultiplexer is a combinational circuit that routes a single input signal to one of
four outputs based on the state of two selection lines. Essentially, it acts as a single-input,
four-output switch, as shown in Figure 16.

Fig 16: 1:4 DEMUX

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Truth Table

Select Input Output

S1 S0 D Y3 Y2 Y1 Y0

0 0 0 0 0 0 0

0 0 1 0 0 0 1

0 1 0 0 0 0 0

0 1 1 0 0 1 0

1 0 0 0 0 0 0

1 0 1 0 1 0 0

1 1 0 0 0 0 0

1 1 1 1 0 0 0

From the above truth table, Boolean expression can be derived as,
Y0 = S1’ S0’ D
Y1 = S1’ S0 D
Y2 = S1 S0’ D
Y3 = S1 S0 D

The above Boolean expressions can be implemented using four AND gates and 2 Not gates
as shown in the circuit diagram below in figure 17. One AND gate is enabled at a time by the
two select lines. The outputs are only active when the 'E' bit is HIGH. In addition, there is an
Enable / Strobe Input that functions as a global enable input.

Thus, input data is sent via the chosen gate and into the corresponding output based on the
combination of the selected inputs.

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Fig 17: 1:4 DEMUX Circuit Diagram

Inputs and Selection Lines:

• Single Input (I): The demultiplexer receives its input on this line.
• Selection Lines (S1, S0): There are two selection lines that control where the input will
be routed. These two bits can represent four combinations (00, 01, 10, 11),
corresponding to the four outputs.

Outputs:
Four Outputs (00,01,10,11): The demultiplexer has four output lines, but only one of these
outputs will carry the input signal at any time, as determined by the selection lines.

Internal Logic Gates:

• AND Gates: There are four AND gates within the demultiplexer, each corresponding to
one of the output lines.

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• Inverters: Two inverters are used to invert the selection lines for certain AND gates, as
not all outputs will be directly activated by the high state of the selection lines.

Operation:
• Selection Line 00: When S1 is 0 and S0 is 0, the input Din is directed to output Y0.
• Selection Line 01: When S1 is 0 and S0 is 1, the input Din is directed to output Y1.
• Selection Line 10: When S1 is 1 and S0 is 0, the input Din is directed to output Y2.
• Selection Line 11: When S1 is 1 and S0 is 1, the input Din is directed to output Y3.

5.3 Applications of DEMUX

• Data Routing: They are used to route a single signal to one of many devices, such as
directing data to the correct storage location in memory systems.
• Signal Processing: In signal processing, a DEMUX can separate different components
of a signal that have been multiplexed together.
• Control Systems: Demultiplexers can direct signals to different parts of a control
system based on the status of select lines.
• Communication Systems: In telecommunications, a demultiplexer is used at the
receiving end to separate multiplexed signals so they can be processed individually.

SELF-ASSESSMENT QUESTIONS – 4

9. How many control signals are needed for a 1:8 demultiplexer?

a) 2
b) 3
c) 4
d) 8
10. In a 1:4 demultiplexer, if the two selection lines are set to 10, which output line
will be active?
a) Output 0
b) Output 1
c) Output 2
d) Output 3

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6. DESIGN OF CODE CONVERTER

A code converter is a logic circuit that converts data from one binary code format-
BCD to binary, BCD to 7
segment, binary to BCD, binary to Grey code, and Grey code to binary—
to another binary code format etc.

6.1 Introduction to Code Converters

In general, numbers are coded in one way or another to indicate or utilise them as needed.
For example, the decimal code for the number nine is (9)d. In natural binary, the same is
recorded as (1001)b i.e., in Binary. Even though binary numbers are handled by all digital
computers, there are circumstances in which using the natural binary representation of
numbers is inconvenient or inefficient and requires the usage of another binary code.

Grey code is another type of code where the difference between any two consecutive
numbers is only one bit. The K-map reduction approach makes use of this code. The benefit
is that when numbers change frequently, the logic gates and transistors switch ON and OFF
frequently, which determines the circuit's power consumption; however, when only one bit
changes from number to number, switching is less frequent, which lowers the circuit's power
consumption.

6.2 Binary to Gray Code Converter

To translate binary code into its corresponding grey code, a logical circuit known as the
Binary to Grey Code Converter is used. The n-bit grey code can be obtained by placing the
MSB of 1 above and below the axis, reflecting the (n-1) bit code about an axis after 2n-1 rows,
and multiplying the resultant value by 1.

The following is the 4-bit binary to grey code conversion table:

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After analysing the Grey code (G3 G2 G1 G0), we discover that there is a single bit-change
that separates any two following integers.

When creating a logic circuitry to transform a given 4-bit natural binary number into a grey
number, the same table serves as the truth table. The inputs for this circuit are B3 B2 B1 B0,
and the outputs are G3 G2 G1 G0.

K-Map for the outputs:

For G0:

G0 = B’B0 + B1B0’

G1 = B1⊕ B2

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For G1:

G1 = B1’ B2 + B1B2’

G1 = B1⊕ B2

For G2:

G2 = B3’B2 + B3B2’

G2 = B2 ⊕ B3

For G3, its, B3 i.e., G3 = B3

The circuit can be designed as below,

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Fig 18: Circuit Diagram for Binary to Gray Code Converter

Applications of Binary to Gray Code Converter

Few applications of Binary to Gray Code Converter

• Boolean circuit minimisation
• Communication between clock domains
• Error correction
• Genetic algorithms
• Mathematical puzzles
• Position encoders

6.3 Gray to Binary Code Converter

After processing the converted code, which is now in grey form, we require the processed
data to be transmitted back in binary representation. Therefore, a converter that operates in
reverse of the previous converter is required. This is called a Gray-to-Binary converter.

The circuit can be designed with the help of the below truth table:

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K-map for B0

B0 = G2G1’G01 + G2’G1G0’ + G2’G1’G0 + G2G1G0

= Go’ (G1’G2 +G1G2’) + G0 ( G1G2 +G1’G2’)
= G0’ (G1 ⊕ G2) + G0 (G1 ⊕ G2)
= G0 ⊕ G1 ⊕ G2

K-map for B1

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B1 = G3’G2’G1 + G3’G2G1’ + G3G2G1 +G3G2’G1’

= G3’ (G2 ⊕ G1) + G3 (G2 ⊕ G1)
= G1 ⊕ G2 ⊕ G3

K-map for B2

B2 = G3’G2 + G3G2’
= G3 ⊕ G2

K-map for B3
B3 = G3

The Circuit Diagram can be designed using the expressions obtained from k-map

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Fig 19: Gray to Binary Code Converter Circuit Diagram

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SELF-ASSESSMENT QUESTIONS – 5

11. What is the first step in converting a binary number to Gray code?
a) Add the binary number to itself.
b) Shift the binary number one bit to the right.
c) Write down the most significant bit as the first bit of the Gray code.
d) Invert all the bits of the binary number.
12. Which of the following represents the correct Gray code for the binary number
1011?
a) 1110
b) 1101
c) 1010
d) 1001
13. Which of the following is the correct binary code for the Gray code 1100?
a) 1001
b) 1010
c) 1000
d) 1111
14. What is true about the most significant bit (MSB) when converting a Gray code
number to binary?
a) The MSB in Gray code is always 0.
b) The MSB in Gray code is always inverted to get the binary MSB.
c) The MSB in Gray code and binary code is the same.
d) The MSB in Gray code is obtained by performing an XOR operation with the
second most significant bit.

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7. SUMMARY
Encoders and decoders serve as the translators of the digital world, facilitating the
interaction between complex data and the systems that require a more streamlined form.
Encoders compress multiple binary inputs into a compact, encoded output, often with fewer
bits. This is particularly evident in devices like keyboards, where numerous keys are each
represented by a unique binary code, allowing for efficient communication with a computer.
Decoders work in reverse, expanding encoded data back into a detailed signal that can be
easily utilised or displayed. A classic example is the seven-segment display decoder, which
interprets a binary input to activate specific segments, creating a readable numerical display.

On the other hand, multiplexers (MUX) and demultiplexers (DEMUX) are the orchestrators
of data flow, ensuring signals are directed to the appropriate channels. A multiplexer
consolidates inputs from multiple sources into a single line, controlled by select signals,
optimising paths for data transmission and saving on circuit complexity. This makes MUXes
indispensable in systems with limited communication channels. Demultiplexers, the
counterpart to MUXes, distribute a single input across multiple outputs, one at a time, which
is crucial in systems like telecommunications to separate multiplexed signals into individual
streams for processing. Code converters complete the picture by altering data from one
binary format to another, such as binary to Gray code, ensuring that different digital systems
can understand and process the exchanged information seamlessly.

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8. TERMINAL QUESTIONS
1. Design 4: 2 encoders. (9.1)
2. Design a 2:4 decoder and explain its logical connections. (3.1)
3. Design 8:1 MUX and 1:8 Demux and implement using basic logic gates. (4.3, 5.2)
4. Elucidate Binary to grey code converter with its circuit diagram. (6.2)
5. Difference between MUX and DEMUX. (4 and 5).

9. ANSWERS
Self-Assessment Answers
1. To compress multiple inputs into a smaller number of outputs
2. 3 output lines
3. C) To convert encoded data into a more understandable form
4. 8
5. B) The enable signal is not activated
6. Combines multiple signals into one signal.
7. 3
8. 10
9. 3
10. Output 2
11. Write down the most significant bit as the first bit of the Gray code.
12. 1101
13. 1010
14. The MSB in Gray code and binary code is the same.

Terminal Answers
1. Refer to the section 2
2. refer to the section 3.1
3. Refer to the sections 4.3 and 5.2
4. Refer to the 6.2
5. Refer to the sections 4 and 5.

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 10
Introduction to Sequential Circuits

Table of Contents
SL Topic Fig No / Table SAQ / Page No
No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Introduction to Latches & Flip Flops - 1

2.1 Definition of Latches - -

4-16
2.2 Types of Latches - -

2.3 Advantages and Drawbacks of Latches - -

3 Flip- Flops - 2

3.1 Overview of Flip Flops - - 17-30

3.2 Different types of Flip Flops (SR, JK, D, T) - -

4 Summary - - 30
5 Terminal Questions - - 31
6 Answers - - 31

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1. INTRODUCTION
Sequential circuits are integral components of digital systems that not only respond to
present inputs but also consider the sequence of past inputs, making them capable of
exhibiting a wide range of behaviours over time. Unlike combinational circuits, where
outputs are solely a direct result of current inputs, sequential circuits incorporate memory
elements, such as flip-flops, that store previous states. This allows them to perform more
complex tasks, such as counting, timing, and storing data, by maintaining a history of what
has happened in the past. Synchronous sequential circuits, which change states in lockstep
with a clock signal, are the most common type, ensuring predictable behaviour suitable for
reliable system design. Asynchronous sequential circuits, though less common due to their
complexity, change states immediately with input changes without waiting for a clock. They
are used in specific applications where immediate response is required. The capability of
sequential circuits to remember and progress through a series of states based on a sequence
of events makes them foundational to digital devices, from the simplest counters to the
sophisticated central processing units at the heart of computers.

1.1 Learning Objectives

At the end of this unit, students should be able to:
❖ Identify the components that make up sequential circuits.
❖ Recall the difference between latches and flip-flops.
❖ Memorize the truth tables for basic latches and flip-flops.
❖ Describe how latches and flip-flops serve as memory elements.
❖ Compare the behaviour of SR, JK, D, and T flip-flops under various input conditions.

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2. INTRODUCTION TO LATCHES & FLIP FLOPS

Latches and flip-flops are the fundamental building blocks of sequential circuits, critical for
memory and data storage in digital systems. A latch is a bistable multivibrator, having two
stable states which allow it to store one bit of data. It operates with no clock signal, changing
states immediately with input triggers, which makes it a level-sensitive device. Flip-flops, on
the other hand, are edge-triggered devices that also store a single bit of data but are
controlled by a clock signal, changing states only on a specific edge of the clock pulse, either
rising or falling. This distinction makes flip-flops essential for synchronous systems where
precise timing is crucial. Both latches and flip-flops come in various configurations, such as
SR (Set-Reset), D (Data), JK, and T (Toggle), each with unique characteristics suited to
different digital storage and logic requirements. Their ability to maintain a state until
directed to change makes them indispensable in creating memory cells, counters, shift
registers, and more, forming the backbone of digital memory and state-based logic.

2.1 Definition of Latches

A latch is a digital electronic circuit that can store a single bit of data and has two stable states.
Because it has two stable states, it is also known as a bistable multivibrator. These two states
are referred to as the set and reset state, high or low state. It makes use of the feedback lane
to store the data. Because a latch in a digital device can only hold one bit of data at a time, it
can be set to store or reset at a specific interval until the signal is altered. The circuit operates
in two major states, depending on the enable signals. Both inputs are high when the enable
input is low and low when the enable input is high.

2.2 Types of Latches

The common types of latches are:
• SR latch
• Gated SR latch
• D latch
• Gated D latch
• JK latch
• T latch

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SR Latch
Gated SR latch
D Latch
Gated D Latch
JK Latch
T Latch

i. SR Latch (Set – Reset Latch)

The SR latch has two inputs, set (S) and Reset (R), and two outputs, typically labelled as Q and
Q' (the complement of Q). The Set input activates the latch, storing a high state, while the
Reset input deactivates it, returning it to a low state. The SR latch can be gated (controlled
by an enable signal) or ungated.
By interlinking two NOR gates, one can create an SR latch. Alternatively, it can also be
constructed using NAND gates. When the set input (S) is activated, the latch's output is driven
high. Conversely, activating the reset input (R) switches the latch's output to low. If both
inputs are deactivated, the latch preserves its last state.
Truth Table

R Q' (Complement of
S (Set) (Reset) Q (Output) Output)

0 0 No Change No Change

0 1 0 1

1 0 1 0

1 1 Invalid Invalid

The above truth table explains the behaviour of the SR latch in response to various
combinations of set and reset inputs.

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Circuit Diagram (SR Latch using NOR Gates)

The SR latch using NOR gates is one of the most common configurations:
Gates Configuration:
• Two NOR gates are used.
• The output of each NOR gate is connected to one input of the other, forming a feedback
loop.
Inputs:
• There are two inputs: Set (S) and Reset (R).
• Typically, active-high logic is used, meaning a high signal (logic 1) on the S input sets
the latch and a high signal on the R input resets it.
Outputs:
• There are two outputs: Q and Q' (also written as Q-bar), which are always inverse.
• Q is taken directly from the output of the first NOR gate.
• Q' is taken from the output of the second NOR gate.
Behavior:
• When S is high (1) and R is low (0), the output Q is set to high (1), and Q' is reset to low
(0).
• When R is high (1) and S is low (0), the output Q is reset to low (0), and Q' is set to high
(1).
• When both S and R are low (0), the latch retains its current state, making it a form of
memory.
• If both S and R are high (1), this creates an undefined condition for the latch, which
should be avoided.

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Characteristics:
• Set and Reset inputs to control the state.
• Can result in an invalid state if both Set and Reset are active simultaneously.
ii. Gated SR Latch
A Gated SR Latch introduces a control signal, often called "Enable" (E), to the basic SR latch
design. This control signal determines when the latch should respond to changes in the Set (S)
and Reset (R) inputs. The addition of the Enable signal transforms the latch into a gated device,
meaning it can be controlled synchronously, responding only when the Enable signal is active.

The gated SR latch is a variation of the standard SR latch that comes with an additional input
known as Enable, alongside the usual Set and Reset inputs. For the Set and Reset functions
to take effect, the Enable input must be in an active or high state. In essence, the Enable input
dictates when the Set and Reset inputs can alter the state of the latch. This Enable input is
typically connected to a control mechanism, such as a switch, and only when this control is
engaged will the Set and Reset inputs be able to influence the latch's state. If the Enable signal
is not active, then any signals present on the Set or Reset inputs will be disregarded, leaving
the latch's state unchanged. The behavior of the gated SR latch, including how the inputs
interact and affect the output, is detailed in its truth table and represented visually in its
circuit diagram within digital electronics contexts.

Below are the truth table and circuit diagram of the Gated SR latch in digital electronics.

Operation:

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• Inputs: In addition to the Set (S) and Reset (R) inputs, there is an Enable (E) input.
• Outputs: The outputs remain the same, Q and not-Q (Q').
• Control: The Enable input controls the operation of the latch. When Enable (E) is low,
the latch does not respond to changes in S or R inputs; when E is high, the latch operates
like a normal SR latch.

Circuit Description:
The Gated SR Latch is typically constructed with NAND gates:

First Level Gates:

• Two additional NAND gates are added to the basic SR latch design.
• These gates receive the S and R inputs but are gated by the Enable signal.
• The output of these gates feeds into the corresponding inputs of the SR latch portion.
iii. Second Level Gates:
• The second level consists of the basic cross-coupled NAND gates that form the core
SR latch.
• The outputs from the first level gates (which carry the conditioned S and R signals)
go into these NAND gates.
iv. Enable Control:
• When E is high, the S and R inputs are allowed to affect the state of the latch.
• When E is low, the outputs of the first level gates are forced to high, regardless of
the S and R states, causing the latch to maintain its current state due to the nature
of NAND gate operations.

Behavior:
i. When E = 0 (Disable):
No matter the S or R inputs, the latch retains its current state because the first level
gates output high signals, preventing any change in the latch's state.

ii. When E = 1 (Enable) and S = 0, R = 1:

The latch is reset, making Q = 0 and Q' = 1.

iii. When E = 1 (Enable) and S = 1, R = 0:

The latch sets Q = 1 and Q' = 0.

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iv. When E = 1 (Enable) and S = 0, R = 0:

The latch holds its previous state (no change).

v. When E = 1 (Enable) and S = 1, R = 1:

This is an undefined or invalid condition for the latch and should be avoided because
it can lead to both Q and Q' being low, which is not a stable state for a NAND-based
SR latch.

iii. D Latch
The D latch has a single data input, D, and an enable input. When the enable input is high, the
output Q takes the value of the D input, effectively 'latching' it. When the enable is low, the
output holds its value, regardless of the D input.

The D latch is also known as the data latch or delay latch. It relies on a single data input,
referred to as 'D'. Whatever data comes through this 'D' input when the clock signal occurs
determines the output of the D latch. When the clock signal is active, or 'high,' the D latch's
output will mirror the current input from 'D'. But if the clock signal is inactive, or 'low,' the
D latch will maintain its most recent output value. This type of latch is commonly found in
synchronous digital circuits, updating its output with the transition of the clock signal, either
on its rising or falling edge. It also features an ENABLE function; if this is active, the output
directly reflects the 'D' input, otherwise, the latch keeps holding onto its last output value.

Below are the truth table and circuit diagram of the Gated SR latch in digital electronics.

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Basic Components:
• D Input: The primary data input for the D latch.
• Enable (EN) or Clock (CLK): A control signal that determines when the D latch is open
to capturing the input signal.
• Q Output: The output that reflects the state of the D input when the latch is enabled.
• Q' Output: The complement of the Q output.

Logic Gates Used:

• AND Gates: Two AND gates are used to control when the D input is allowed to affect
the output.
• NOT Gate: An inverter is used to provide the complementary signal of the enable input
to one of the AND gates.
• NOR or NAND Gates: A pair of cross-coupled NOR or NAND gates form the core bistable
element that holds the value.

Circuit Connections:
• The D input feeds into one input of each of the two AND gates.
• The enable signal is connected directly to the other input of one AND gate and through
an inverter to the other input of the second AND gate.
• The outputs of the AND gates are connected to the cross-coupled NOR or NAND gates,
which create the latch mechanism.

Operation:
• When the enable signal is high (for an active-high D latch), the D input is allowed
through the AND gate to set the state of the latch.
• The cross-coupled gates hold this state, making Q equal to D, and Q' the opposite.
• When the enable signal goes low, the AND gates block any further changes to the input,
preserving the last state of Q and Q'.

Characteristics:
• Only one input for data, eliminating the risk of ambiguous states.
• Often called a "transparent" latch because when enabled, the output directly follows
the input.

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• The D latch is useful in digital circuits for temporarily storing data and preventing
changes to that bit when not enabled.
• It's a fundamental building block for flip-flops, which are used to build registers,
counters, and memory units in more complex digital systems.

iv. Gated D Latch

• The gated D latch is a special kind of latch equipped with two inputs, DATA and
ENABLE. If the ENABLE input is set to 1, the output directly mirrors the DATA input.
However, when ENABLE is at 0, the output remains unaffected by any changes in the
DATA input. By modifying a gated SR latch with the addition of an inverter between the
set and reset inputs, a gated D latch can be constructed. This setup ensures that the
outputs are always the inverse of one another.
The truth Table and Circuit diagram is as shown below:

Truth Table and Circuit Diagram:

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v. JK Latch

The JK latch operates similarly to the SR latch but is designed to handle the "invalid" state
where both inputs are high. In the case of the JK latch, when both J and K inputs are high, the
output toggles (switches from high to low or low to high).

The behaviour of the JK latch depends on the inputs:

• J = 0 and K = 0: The latch retains its current state; it does not change.
• J = 0 and K = 1: The latch is reset, and the Q output is set to 0.
• J = 1 and K = 0: The latch is set, and the Q output is set to 1.
• J = 1 and K = 1: The latch toggles its output. If Q was 0, it becomes 1, and vice versa.

Characteristics:
• Inputs J and K can be the same without causing an invalid state.
• Eliminates the indeterminate state issue found in SR latches.

vi. T Latch (Toggle Latch)

• Connecting the inputs of a JK latch together creates a T latch. When the input is high,
also known as logic level '1', the T latch's output will switch states as hown in the below
circuit diagram.

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2.3 Advantages and Drawbacks of Latches

Advantages of Latches:
• Simplicity: Latches have a simple design that makes them easy to understand and
implement in digital circuits.
• Speed: Due to their simplicity, latches can switch states very quickly, making them
suitable for high-speed operations.
• Low Power Consumption: Latches generally consume less power than more complex
storage devices because they do not require a clock signal.
• Cost-effective: They are relatively inexpensive to produce, contributing to reduced
costs in digital system design.
• Transparency: Level-sensitive latches can directly pass the input to the output when
enabled, which is useful in certain applications such as data sampling.
• Versatility: Latches can be building blocks for more complex sequential circuits like
flip-flops, counters, and registers.

Drawbacks of Latches:

• Sensitivity to Glitches: As level-sensitive devices, latches can be susceptible to glitches

on enable lines, potentially leading to unintended changes in state.
• Timing Challenges: In systems where precise timing control is required, the
asynchronous nature of latches can be a disadvantage, potentially causing race
conditions.

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• Limited Data Storage: Latches can only store a single bit of data, so they are not
suitable for applications requiring storage of multiple bits without using an array of
latches.
• Indeterminate States: Some types of latches, like the SR latch, can have indeterminate
states if both set and reset inputs are activated simultaneously.
• Lack of Data Stability: Without a clock signal to control updates, latches may not hold
data stably if inputs are changing rapidly.
• Need for Gating: To control when a latch can change state, additional gating logic is
often necessary, which can add to the complexity and power consumption.

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SELF-ASSESSMENT QUESTIONS – 1

1. _____________________ is a latch in digital electronics?

a) A type of digital sensor
b) A logic gate
c) A basic memory element that stores one bit of information
d) A type of microprocessor
2. Which type of latch is known for having an undefined state when both inputs
are active?
a) D Latch
b) T Latch
c) JK Latch
d) SR Latch
3. What is the primary characteristic of a D Latch?
a) It toggles its output with each clock pulse.
b) It has an undefined state.
c) It stores the value of the data input when the enable signal is active.
d) It requires two separate inputs to change its state.
4. How does a JK Latch differ from an SR Latch?
a) It has a single input.
b) It can toggle when both inputs are high.
c) It does not store data.
d) It changes state without a control signal.

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SELF-ASSESSMENT QUESTIONS – 1

5. The T Latch can be constructed by connecting which two inputs of a JK Latch?

a) J and Q
b) J and K
c) S and R
d) D and CLK
6. Which latch type acts as a 1-bit memory and changes its state only when the
enable signal is present?
a) Edge-triggered latch
b) Transparent latch
c) Asynchronous latch
d) Gated latch
7. In a D Latch, if the enable (EN) input is low, what will happen to the output
when the data (D) input changes?
a) The output will toggle.
b) The output will change to match the D input.
c) The output will reset to 0.
d) The output will not change.

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3. FLIP- FLOPS
Flip-flop is popularly known as the basic digital memory circuit. It can exist in one of two
possible states: logic 1 (High) or logic 0 (Low). As a type of sequential circuit, a flip-flop stores
a single bit of binary data. This digital circuit features two outputs that always reflect inverse
states of each other. Additionally, due to its ability to maintain one of two stable states, it is
often referred to as a Bistable Multivibrator.

3.1 Overview of Flip Flops and their significance in sequential logic

Flip-flops are essential elements in sequential logic, acting as the primary storage elements
for binary data. They are fundamental for creating memory units because they have the
capability to maintain a binary state indefinitely until triggered to switch states by an
external signal, typically a clock pulse.

Structure and Functionality:

A flip-flop is constructed using gates and can store one bit of information, which can be a
logic '1' or a logic '0'. It has one or more inputs and typically two outputs, one being the
complement of the other. The state of a flip-flop remains constant over time unless it is
explicitly changed by an input pulse.

Edge-Triggered:
Flip-flops are edge-triggered devices, meaning they change states only during specific
transitions of a clock signal, allowing for synchronous data processing and control.

Memory Storage:
The flip-flop's ability to store data makes it the cornerstone of digital memory, including
registers, buffers, and latch circuits.

State Machines:
State machines, which are vital in digital design for implementing complex behaviors, rely
heavily on flip-flops to remember the current state and transition to new states.

Synchronization:
Flip-flops ensure that data operations across a digital system are synchronized with the clock
signal, leading to predictable and reliable system behavior.

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Data Processing:
In CPUs and other processing units, flip-flops hold intermediate results, control bits, and
other crucial binary data for processing tasks.

Counting and Division:

Flip-flops are used in counters and frequency dividers because of their ability to toggle states
in a controlled manner.

3.2 Different types of Flip Flops (SR, JK, D, T) with their characteristics
Flip-flops are versatile and fundamental components used in the design of sequential
circuits, with each type having unique characteristics that make them suitable for specific
applications.
The different types of flip-flops are:
• SR Flip Flop
• JK Flip Flop
• D Flip Flop
• T Flip Flop

i. S-R (Set-Reset) Flip-Flop:

In flip-flop when power is first turned on, the state of a flip-flop can be unpredictable,
oscillating between being set (Q=1) or reset (Q'=0). For many applications, it's important to
have the flip-flop start in a specific state, either set or reset. This initial state can be
established using the preset (PR) and clear (CLR) inputs of the flip-flop.

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The circuit diagram depicts an SR flip-flop, which is constructed using two cross-coupled
NOR gates. An SR flip-flop is a type of digital memory circuit that has two stable states and is
capable of storing a single bit of information. The 'S' and 'R' stand for "Set" and "Reset,"
respectively. The circuit diagram also includes a clock input (CK), indicating that this is a
clocked SR flip-flop, which means it responds to changes in the inputs in synchrony with the
clock signal.
Circuit Diagram and Operation:
• The Set (S) and Reset (R) inputs are the control inputs for the flip-flop. Depending on
their state, they control the output of the flip-flop.
• The Clock (CK) input is used to synchronize the changes in state with the clock signal,
ensuring that changes in the output occur only at specific times (on the rising or falling
edge of the clock signal).
• The two outputs, Q and Q', represent the current state and the complement of the
current state, respectively.

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The truth table represents how the outputs Qn (current state) and Qn+1 (next state)
responds to the inputs S, R, and the clock signal:
• When S = 0, R = 0: No change. The flip-flop maintains its current state, whether it's a 0
or 1.
• When S = 0, R = 1: Reset. The flip-flop sets the Qn+1 output to 0, indicating that the flip-
flop has been reset, regardless of the current state Qn.
• When S = 1, R = 0: Set. The flip-flop sets the Qn+1 output to 1, indicating that the flip-
flop has been set, regardless of the current state Qn.
• When S = 1, R = 1: This condition is typically not allowed because it can lead to an
undefined state in basic SR flip-flops. It is often omitted or treated as a "don't care"
condition, as indicated by the dashes in the Qn+1 column.

The equation of SR Flip-flop can be obtained using K-Map

i.e., Qn+1= R’Qn + S

Characteristics of S-R Flipflop

The SR flip-flop, also known as a Set-Reset flip-flop, is one of the most basic types of flip-flops
and exhibits the following characteristics:
1. Bistable: It has two stable states, which it can maintain until an external input forces it
to change. This makes it suitable for storing a single bit of binary information.

2. Inputs: It has two inputs, labeled S (Set) and R (Reset). The Set input, when activated,
sets the state of the flip-flop so that the output Q is 1 and Q' is 0. The Reset input, when
activated, resets the flip-flop so that the output Q is 0 and Q' is 1.

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3. Outputs: It has two outputs, Q and its complement Q' (also written as �‾Q). These
outputs represent the current state of the flip-flop.

4. Indeterminate State: If both S and R are activated simultaneously, the flip-flop enters an
indeterminate state, which is generally considered an invalid or illegal state for the
circuit. The flip-flop’s behavior in this situation is undefined and can lead to
unpredictable results.

5. Edge-triggered or Level-triggered: Depending on the design, SR flip-flops can be either

edge-triggered, changing state at the transition edge of a clock pulse, or level-triggered,
changing state when the clock signal is at a particular level.

6. Asynchronous or Synchronous: Basic SR flip-flops are asynchronous; they change state

immediately based on their inputs. However, they can be made synchronous by adding a
clock signal, which then coordinates changes in state across multiple flip-flops.

7. Latch-like Behavior: In the absence of a clock input, the SR flip-flop behaves like a latch,
changing its output state as soon as the inputs change.

8. No Data Lockout: Unlike D flip-flops, the SR flip-flop doesn't have a data input that is
locked out while the clock is inactive. Its state is directly controlled by the S and R inputs.

Note:
The SR flip-flop is often used in digital circuits where a clear definition of the set and reset
conditions is required, and it forms the basis for more complex flip-flops like the D, JK, and T
flip-flops. However, due to the problematic indeterminate state when both S and R are high,
design care must be taken when using SR flip-flops to ensure that this condition is avoided.

ii. J-K Flip Flop

The below diagram shows the basic representation of JK flipflop which consists of Clear
(CLR), Preset (PR) and Clock (CLK).

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Circuit Diagram:
• Inputs: The flip-flop has two inputs, J and K, analogous to the Set (S) and Reset (R)
inputs of an SR flip-flop but with additional functionality.

• Clock (CLK): The CLK input is used to synchronise the changes in the state of the flip-
flop with the clock signal.

• Outputs: There are two outputs, Q and Q’ (Q not), which are always the inverse. Q
represents the current state, and Q’ represents the complement of the current state.

The JK flip-flop is constructed with a pair of NAND gates that form the basic flip-flop
structure, along with two additional NAND gates that handle the input logic. The feedback
from the output Q and its complement Q’ allows the flip-flop to toggle when both J and K are
high.

Truth Table Explanation:

The truth table for the JK flip-flop is as follows:
• J = 0 and K = 0: The flip-flop maintains its current state (Qn to Qn+1).
• J = 0 and K = 1: The flip-flop resets (sets Qn+1 to 0 regardless of Qn).
• J = 1 and K = 0: The flip-flop sets (sets Qn+1 to 1 regardless of Qn).
• J = 1 and K = 1: The flip-flop toggles its current state (Qn+1 becomes the complement
of Qn).

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The behavior of the JK flip-flop eliminates the indeterminate state found in the SR flip-flop
(when S = R = 1) by making use of the toggle function when both inputs are high. This makes
the JK flip-flop very useful for counting applications and more complex sequential logic
circuits. The clock input ensures that the state changes occur only at specific times (the rising
or falling edge of the CLK signal), which makes the circuit's behavior predictable and
controllable.

The quation can be obtained using K-map,

i.e., Qn+1 = JQn’ + K’Qn

Characteristics of JK Flipflop
The JK flip-flop is a refined version of the SR flip-flop and possesses several important
characteristics that make it suitable for a variety of digital applications:
1. Edge-Triggered: The JK flip-flop responds to inputs only at the transition edges of the
clock signal (either the rising edge or the falling edge), making it suitable for
synchronous systems where operations need to be timed precisely.
2. State Control: It has two inputs, J (set) and K (reset), which control the state of the flip-
flop in a similar manner to the set and reset inputs of an SR flip-flop, but with an
additional toggle feature.
3. Toggle Function: When both J and K inputs are high at the triggering edge of the clock,
the JK flip-flop toggles its output. This means that the output state switches from 0 to 1
or from 1 to 0, which is a feature not present in the basic SR flip-flop.
4. Elimination of Indeterminate State: Unlike the SR flip-flop, the JK flip-flop does not
have an indeterminate or forbidden state. When J = K = 1, the flip-flop simply toggles
its state, making it more reliable in state-driven applications.

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5. Feedback Mechanism: The outputs are fed back to the inputs through additional
gating, which enables the toggle behavior.
6. No Race Conditions: The JK flip-flop is designed to prevent race conditions that can
occur in the SR flip-flop when both S and R inputs are high.
7. Versatility: The JK flip-flop can be used in a variety of digital circuits, including
counters, shift registers, and storage registers, due to its predictable and controllable
state changes.
8. Master-Slave Configuration: Some JK flip-flops are designed in a master-slave
configuration to further ensure that the outputs change state only on the clock's
inactive-to-active transition, providing additional stability.

The JK flip-flop, while versatile and robust for many digital applications, does have a
potential drawback known as the "race condition." This occurs specifically in a particular
type of JK flip-flop known as the asynchronous or level-triggered JK flip-flop.

The race condition is a phenomenon that can occur in JK flip-flops when both the J and K
inputs are high, and the circuit is not properly synchronized with the clock signal. This
condition is specific to JK flip-flops because they are designed to toggle their output when
both J and K inputs are high. If J and K inputs are both high, the flip-flop is instructed to toggle.
Given enough time while the clock is still high, the flip-flop might toggle back and forth
multiple times.

iii. D Flip-flop
A D flip-flop, also known as a data or delay flip-flop, is a type of flip-flop or latch that captures
and holds the value of the data input (D) that is present on its input line just before a clock
pulse and then holds this value until the next clock pulse. It is a fundamental memory
element in digital circuits.

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Circuit Diagram:
The D flip-flop shown here consists of two NOR gates configured in a feedback loop, which
forms the memory element, and additional gating to manage the D input and the clock (CLK)
signal.
• D Input: This is the data input of the flip-flop.
• CLK Input: This is the clock input, which coordinates the timing of the data capture.
• Q Output: This is the main output that shows the state of the flip-flop.
• Q’ Output: This is the complement or inverse of the Q output.

When the CLK signal is triggered (typically on the rising edge), the flip-flop captures the
value present on the D input and reflects this value on the Q output. The Q’ output always
holds the opposite value to Q.

Truth Table:
The truth table for the D flip-flop shows how the output state at time t+1 (the state after the
clock edge) depends on the input state D at time t (the state at the clock edge):

This truth table indicates that the next state of the flip-flop (Q(t+1)) is solely determined by
the D input, regardless of the current state of Q. The D input is "written" to the flip-flop at the

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moment of the clock pulse, and the flip-flop maintains this state until the next clock pulse.
This is why D flip-flops are considered to be ideal for digital data storage applications; they
reliably capture and store a value until it needs to be updated.

The equation can be obtained by using K-Map:

i.e., Qn+1 = D

Characteristics of D Flip-Flop:
1. Single Data Input: Unlike the SR or JK flip-flops, the D flip-flop has only one data input.
2. Edge-Triggered: D flip-flops are edge-triggered, meaning that they sample the input and
change their output only at the moment of a clock edge (rising or falling, depending on
the design of the flip-flop).
3. Output Stability: The output (Q) of a D flip-flop remains stable throughout the clock
cycle; it only changes state when a clock pulse is received, making it immune to the
glitches that might affect level-triggered devices like latches.
4. Simple State Control: Because it has only one input, the D flip-flop does not require
additional control logic to prevent undefined states. The output state simply mirrors the
D input after the clock edge.
5. Data Lockout: When the clock is not at the active edge, changes to the D input have no
effect on the output, which is a form of data lockout. This characteristic makes D flip-flops
very useful for data storage and transfer operations, where it is necessary to control
when data is captured and released precisely.
6. No Ambiguous States: Since there is only one input, the D flip-flop doesn't have the issue
of indeterminate states that can be a problem with SR flip-flops.

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iv. T (Toggle) Flip Flop

A T flip-flop, also known as a toggle flip-flop, is a type of flip-flop that changes its output state
with each clock pulse when its T (toggle) input is in the high (logic 1) state. It is a simple form
of flip-flop that is commonly used for counting applications, such as digital counters, because
of its ability to toggle its state.

In truth table Qn represents the Current State, and Qn+1 represent the next state.

Circuit Diagram:
The T flip-flop in the diagram uses JK flip-flop architecture where the J and K inputs are tied
together to form the single T input. This setup simplifies the control of the flip-flop, making
it change its state (toggle) whenever the T input is high (logic 1) and the clock (CLK) is
triggered.
• T Input: The toggle control input. When high, it will cause the flip-flop to toggle its state
at the next clock edge.
• CLK Input: The clock input synchronises the toggling with the clock signal's rising or
falling edge (depending on the flip-flop's design).
• Q Output: The main output of the flip-flop, which will hold the current state or toggle
based on the T input and clock.
• Q’ Output: The complementary output of the flip-flop, which always holds the opposite
state of Q.

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Operation:
The T flip-flop operates as follows:
• When T is low (0), the flip-flop retains its state regardless of the clock input, so Q
remains in its current state (Qn).
• When T is high (1), the flip-flop toggles its state on each clock pulse. This means if Q
was 0, it becomes 1, and if it was 1, it becomes 0.

In the truth table, the first two rows indicate that when T is 0, the output state Qn+1 does not
change from the current state Qn, regardless of whether Qn is 0 or 1. The last two rows show
that when T is 1, the output Qn+1 toggles from the current state Qn; if Qn is 0, it changes to
1, and if Qn is 1, it changes to 0.

Characteristics of T Flip-Flop:
1. Single Input (T): The T flip-flop has one primary input, the T or toggle input.
2. Output States: It has two outputs, Q and Q’, with Q’ being the complement of Q.
3. Edge-Triggered: Like other flip-flops, the T flip-flop is typically edge-triggered,
meaning it will only change its state on the rising or falling edge of the clock signal,
depending on the design.
4. Toggling Behavior: When the T input is high, the flip-flop will change (toggle) its state
on each clock pulse. If the T input is low, the flip-flop will not change its state, effectively
holding the previous state.
5. Simple Counting: Because of its simple toggling behavior, the T flip-flop can be used to
implement binary counters by connecting a series of flip-flops in a certain configuration
where the output of one flip-flop is connected to the toggle input of the next.

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SELF-ASSESSMENT QUESTIONS – 2

8. What type of flip-flop is used for building counters?

a) SR Flip-Flop
b) D Flip-Flop
c) JK Flip-Flop
d) T Flip-Flop
9. Which flip-flop will change its state with every clock pulse when the T input
is high?
a) D Flip-Flop
b) T Flip-Flop
c) SR Flip-Flop
d) JK Flip-Flop
10. Which flip-flop has a characteristic equation Q(next) = D?
a) SR Flip-Flop
b) D Flip-Flop
c) JK Flip-Flop
d) T Flip-Flop
11. What is the undefined or forbidden state in an SR flip-flop?
a) When S=0 and R=0
b) When S=1 and R=0
c) When S=0 and R=1
d) When S=1 and R=1
12. Which flip-flop can be referred to as a universal flip-flop due to its versatility?
a) SR Flip-Flop
b) D Flip-Flop
c) JK Flip-Flop
d) T Flip-Flop

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13. Which flip-flop is known as a data or delay flip-flop?

a) SR Flip-Flop
b) D Flip-Flop
c) JK Flip-Flop
d) T Flip-Flop

4. SUMMARY
Latches and flip-flops are critical memory elements in digital circuits, each designed to store
a single bit of data. Latches, which are level-triggered, change their output as long as the
enable signal is present and include several types: the SR (Set-Reset) latch with potential for
an undefined state, the D latch known for its transparent operation, the JK latch that
eliminates the SR's undefined state by toggling, and the T latch which toggles when enabled.

Flip-flops, on the other hand, are edge-triggered by a clock signal and are vital for
synchronous circuit functionality. They come in similar variants as latches: the SR flip-flop
with a clocked control but an undefined state when both inputs are active, the D flip-flop that
captures the input state on a clock edge, the JK flip-flop that can set, reset, or toggle without
undefined states, and the T flip-flop used for counting due to its toggle feature.

The choice between using a latch or a flip-flop in a digital system depends on the specific
requirements for data storage, with flip-flops being preferred for their precise control over
data state changes synchronised with a clock signal. Both are utilised across various
applications, from simple data storage to complex timing and sequencing operations.

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5. TERMINAL QUESTIONS
1. Explicate latches and its characteristics.
2. Explain the SR latch with its circuit diagram and truth table.
3. Elucidate the advantages and limitations of latches.
4. Explain JK and SR flipflop and obtain their expressions.
5. Differentiate between Latches and Flipflops.

6. ANSWERS
Self-Assessment Answers
1. A basic memory element that stores one bit of information
2. SR Latch
3. It stores the value of the data input when the enable signal is active.
4. It can toggle when both inputs are high.
5. J and Q
6. Gated latch
7. The output will not change.
8. T Flip-Flop
9. T Flip-Flop
10. D Flip-Flop
11. When S=1 and R=1
12. JK Flip-Flop
13. D Flip-Flop

Terminal Answers
1. Refer to the section 2.1
2. Refer to the section 2.2
3. Refer to the section 2.3
4. Refer to the section 3.2
5. Refer to the sections 2 and 3

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BACHELOR OF COMPUTER APPLICATIONS

SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 11
Types of Flip-Flops

Table of Contents

SL Topic Fig No / Table SAQ / Page No

No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 S-R Flip Flop 1, 2, 3, 4 1

2.1 Construction and Symbol Representation - -

2.2 Truth table and characteristic equation - - 4-11

2.3 Clock signal and triggering of SR Flip Flops - -

2.4 State transition diagram and excitation - -

table
3 D Flip Flop 5, 6, 7, 8 2

3.1 D Flip-Flop construction and behaviour - -

12-18
3.2 Truth Table and Excitation Table - -

3.3 Timing diagrams and clocking - -

4 J-K Flip Flop 9, 10, 11 3

4.1 Design, symbol, and operation - - 19-24

4.2 Clock signal and toggle operation - -

5 T Flip Flop 12, 13, 14 4

5.1 T Flip Flop concept and operation - - 25-30

5.2 Toggling behaviour and applications - -

6 Summary - - 31
7 Terminal Questions - - 31
8 Answers - - 32

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1. INTRODUCTION
Flip-flops constitute the core of digital memory, pivotal in sequential logic circuits. They
store a single bit of binary data. They are distinguished by their ability to change states
synchronously with a clock signal, which makes them the quintessential element for timing
and control within digital systems. There are several types of flip-flops, each tailored to
specific functionalities and applications. The SR (Set-Reset) flip-flop is the simplest type,
capable of setting or resetting its state based on input conditions, but it is cautious to use due
to its potential for an undefined state when both inputs are active. The D (Data) flip-flop,
valued for its simplicity and predictability, captures the value of the data input at a clock edge
and maintains that value until the next edge. This makes it ideal for data storage and transfer.

The JK flip-flop is an evolution of the SR flip-flop, designed to eliminate the ambiguity of the
SR's undefined state by allowing the flip-flop to toggle its output when both inputs are high.
This makes the JK flip-flop versatile for a variety of applications, including counters and more
complex sequential logic circuits. The T (Toggle) flip-flop, often derived from the JK flip-flop
by tying the J and K inputs together, changes its output state with each clock pulse when
enabled, hence its use in counting applications. Each type of flip-flop has been engineered to
address specific operational needs in digital systems, from the simple storage of a bit in
registers to the intricate management of state transitions in computational logic units. Their
ability to maintain or change state in a controlled, clock-synchronized manner makes flip-
flops indispensable in the architecture of modern digital systems.

1.1 Learning Objectives

At the end of this unit, students should be able to:
 Recall the characteristic tables for each type of flip-flop.
 Explain the differences between S-R, D, J-K, and T flip-flops regarding their inputs, outputs,
and behaviour.
 Construct truth tables for each flip-flop type based on given input conditions.
 Design a digital circuit using a combination of S-R, D, J-K, and T flip-flops to perform a
specified function, such as counting or memory storage.

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2. S-R FLIP FLOP

An S-R (Set-Reset) flip-flop, also known as an SR latch, is a fundamental digital storage
element capable of storing one bit of information.

It has two inputs, labelled 'S' (Set) and 'R' (Reset), and two outputs, 'Q' and the complement
of Q, usually denoted as Q or Q'.

The flip-flop holds one of two possible states:

 a set state where Q=1 and Q=0, or
 a reset state where Q=0 and Q=1.

2.1 Construction and Symbol Representation

The basic block diagram has S and R inputs, a clock pulse in between, and complemented o
utputs Q and Q', as shown in Figure 1.

Fig 1: Basic Block Diagram of SR Flip-Flop

Construction of SR Flip-Flop
There are two ways to build an SR flip:
 One using two NOR gates plus two AND gates and
 The other uses four NAND gates
i. Construction using two NOR gates and two AND gates:

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Fig 2: Construction of SR Flipflop using two AND and two NOR gates.

Figure 2 illustrates the construction of an SR flip-flop using two AND and two NOR gates.

Construction:
1. NOR Latch Core: The central part enclosed in the dashed box is a basic NOR latch
composed of two cross-coupled NOR gates. This is the memory element that stores the
state of the flip-flop. The cross-coupling means the output of one NOR gate feeds into
an input of the other and vice versa, allowing the circuit to maintain its current state.
2. AND Gates for Gating: The AND gates serve as the gating mechanism that allows the
SR flip-flop to be controlled by a clock signal. The Set (S) input and the Reset (R) input
are each connected to one input of the two AND gates. The other input of both AND
gates is connected to the Clock pulse signal.
3. Outputs Q and Q’: The outputs of the flip-flop are labelled Qn and Qn’, where Qn’ is the
inverse of Qn. These outputs are taken from the NOR gates and represent the stored
binary state of the flip-flop.

Operation:
 Setting the Flip-Flop: When the Set input (S) is high, and the Clock pulse is also high,
the AND gate passes the signal to the second NOR gate. If the Reset (R) is low at this
time, the flip-flop sets, meaning Qn becomes high and Qn’ becomes low.
 Resetting the Flip-Flop: When the Reset input (R) is high and the Clock pulse is high,
the AND gate passes the signal to the first NOR gate. If the Set (S) is low at this time, the
flip-flop resets, meaning Qn becomes low and Qn’ becomes high.

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 Memory State: When both Set and Reset are low, the output of the AND gates do not
allow any change to the NOR latch, thus maintaining its state, regardless of the Clock
input.
 Forbidden State: If both Set and Reset inputs are high at the same time when a Clock
pulse occurs, it can lead to an undefined state for the flip-flop. This condition should be
avoided in normal operation.
ii. Construction using four NAND gates:

Fig 3: Construction of SR Flipflop using Nand Gates

Figure 3 illustrates the construction of an SR flip-flop using four NAND gates, creating what
is often referred to as a NAND SR latch or flip-flop.

Construction:
 NAND Latch Core: The central part of the diagram (the dashed box labelled "NAND
Latch") shows two NAND gates connected in a feedback loop to form the basic memory
storage element, a latch. The output of each NAND gate feeds back into one input of the
other gate. This setup allows the circuit to maintain its state (either set or reset)
without input changes.
 Control Gates: The other two NAND gates act as control gates for the latch. The Set (S)
input goes to one NAND gate, and the Reset (R) input goes to the other NAND gate.
 Clock Gating: The clock pulse is used to enable the SR flip-flop. It is connected to the
second input of both control NAND gates. This means the set and reset conditions can
only be applied when a clock pulse is present, making the flip-flop sensitive to the
clock's edges.

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Operation:
 Setting the Flip-Flop (S = 1, R = 0): When the Set input is active (logic 1), and the Reset
input is inactive (logic 0), and a clock pulse is present, the output of the flip-flop (Q) will
be set to logic 1, and the not-Q (Q’) output will be set to logic 0.
 Resetting the Flip-Flop (S = 0, R = 1): When the Reset input is active, and the Set input
is inactive, and a clock pulse is present, the flip-flop will be reset, which means the Q
output will be logic 0, and the not-Q (Q’) output will be logic 1.
 Unchanged State (S = 0, R = 0): When both inputs are inactive, the flip-flop retains its
previous state, regardless of the clock input. This is due to the feedback loop within the
NAND latch core.
 Invalid State (S = 1, R = 1): When both inputs are active simultaneously, it leads to an
undefined state for a basic SR latch. However, in a clocked environment, this condition
can be managed by ensuring that the clock signal does not coincide with this input
condition.

2.2 Truth Table and Characteristic Equation.

The truth table for an SR flip-flop lists the outputs based on the inputs:

 S=0, R=0 (Hold State): The flip-flop maintains its current state. If Qn (current state) is
0, it stays 0; if Qn is 1, it stays 1.
 S=0, R=1 (Reset State): The flip-flop is reset, which means Qn+1 (next state) is 0,
regardless of the current state.

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 S=1, R=0 (Set State): The flip-flop is set, which means Qn+1 is 1, regardless of the
current state.
 S=1, R=1 (Invalid State): This is an undefined or invalid state for a basic SR flip-flop. The
next state is unpredictable and represents an 'X' in the truth table.

Characteristic Equation:
The characteristic equation of the SR flip-flop is not typically expressed in a simple algebraic
form like that of other flip-flops but can be derived from the truth table. It describes the next
state (Qn+1) in terms of the current state (Qn) and the inputs S and R:

K-Map is shown below:

Qn+1 = ( SR + SR’ ) ( Qn + Q’n ) + Qn ( S’R’ + SR’ )

Qn+1 = S + QnR’

2.3 Clock Signal and Triggering of SR Flip Flops

Fig 4: Timing Diagram of SR Flip-flop

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The timing diagram provides a graphical representation of how the output Q of an SR flip-
flop responds to various combinations of Set (S) and Reset (R) inputs over time, with
consideration of the Clock (Clk) signal.

Here’s how to read the timing diagram:

1. Clock (Clk) Signal: The bottom row shows the clock signal, which alternates between
high (1) and low (0). The transitions from low to high (rising edge) are where the SR
flip-flop will potentially change states.
2. Set (S) and Reset (R) Inputs: The first two rows represent the inputs to the flip-flop.
A high level (1) means the input is active, and a low level (0) means the input is inactive.
3. Output (Q): The third row shows the output of the flip-flop. Changes in the output
typically occur at the rising edge of the clock signal when the flip-flop is triggered.

Now, let's analyze the specific segments of the timing diagram:

 Set: When the clock signal rises while S is high (1) and R is low (0), the flip-flop is set,
and the output Q goes high (1).
 No Change: If the clock signal rises while both S and R are low (0), the output Q does
not change and remains at its previous state.
 Reset: When the clock signal rises while S is low (0) and R is high (1), the flip-flop is
reset, and the output Q goes low (0).
 No Change: Again, if the clock signal rises while both S and R are low (0), the flip-flop
retains its previous state, and there is no change in output Q.
 Invalid: When S and R are both high (1) during the rising edge of the clock signal, this
is an invalid condition for the SR flip-flop. Typically, the output state for this condition
is not defined (hence the "Invalid" label). However, in practice, this state is often
avoided by design.
 Unknown State: The last segment shows another rising edge of the clock where S is
high (1) and R is high (1), leading to an unknown or uncertain state for the output Q
(indicated by a "?"). This is because basic SR flip-flops should not have both S and R
active at the same time, as it leads to an unpredictable output.

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2.4 Excitation Table

An excitation table is used to determine the necessary inputs to cause a transition from a
present state to a desired next state.

For an SR flip-flop, the excitation table lists the current state (Qn), the next state (Qn+1), and
the required inputs (S and R) to achieve that transition:

In this table, 'X' denotes a "don't care" condition, meaning that the input can be either '0' or
'1' and will not affect the outcome for the particular transition:
 To maintain the current state (hold), if Qn is '0', then S should be '0', and R can be 'X'
(don't care). Similarly, if Qn is '1', then R should be '0', and S can be 'X'.
 To transition to state '1' (set), if the current state is '0', then S should be '1', and R should
be '0'.
 To transition to state '0' (reset), if the current state is '1', then S should be '0', and R
should be '1'.

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SELF-ASSESSMENT QUESTIONS – 1

1. What does SR in SR flip-flop stand for?

a) Set-Right
b) Synchronize-Reset
c) Set-Reset
d) Save-Restore
2. In an SR flip-flop, what is the state of the output when S=0 and R=0?
a) Indeterminate
b) Set
c) Reset
d) No Change
3. What is the output Q when S=1 and R=0 in an SR flip-flop?
a) 0
b) 1
c) Q (previous value)
d) Indeterminate
4. What is the condition to avoid in an SR flip-flop to prevent an indeterminate
output?
a) S=0, R=0
b) S=1, R=0
c) S=0, R=1
d) S=1, R=1

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3. D FLIP FLOP
A D flip-flop, also known as a data or delay flip-flop, is a type of digital storage device widely
used in electronics for its simplicity and reliability. It is a sequential logic circuit that has a
single input for data (labelled 'D'), a clock input (Clk), and usually two outputs (Q and Q’,
which is the complement of Q).

Fig 5: Basic Block Diagram of ‘D’ Flip flop

3.1 D Flip-Flop Construction and Behaviour

A D flip-flop is typically constructed from other basic flip-flops like an SR flip-flop or a JK flip-
flop by modifying the inputs so that the 'set' and 'reset' conditions are controlled by a single
data input.

Construction:
 Using an SR Flip-Flop: To construct a D flip-flop, you can connect the S input to the D
input through an inverter for the R input. This ensures that S and R are never the same,
eliminating the possibility of an invalid state. During the positive clock edge, if D is high,
S will be high, and R will be low, setting the flip-flop. If D is low, S will be low, and R will
be high, resetting the flip-flop.

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Fig 6: Construction of ‘D’ Flipflop using SR Flip-Flop

Figure 6 shows a D flip-flop constructed from a gated SR flip-flop with an additional
inverter. The D flip-flop is created to ensure that the SR flip-flop receives
complementary inputs, thus avoiding any indeterminate state.
1. SR Flip-Flop Core: At the heart of this D flip-flop is a gated SR flip-flop, which consists of
NAND gates connected in a feedback loop to form the basic bistable element. The
outputs of the NAND gates (Q and Q’) are the state outputs of the flip-flop.
2. Gating with the Clock: The clock signal (Clk) is used to gate the inputs of the SR flip-flop.
This means that the Set (S) and Reset (R) inputs of the SR flip-flop are only active when
the clock signal allows it.
3. Inverter: To ensure the D flip-flop's correct operation, the data input (labelled "Data")
is fed directly to the S input of the SR flip-flop and the R input through an inverter. This
guarantees that S and R are never high simultaneously, which would be an invalid state
for the SR flip-flop.

Behavior:
 Data Input High (Logic 1): When the data input is high and the clock signal transitions
(typically on the rising edge), the S input of the SR flip-flop will be high, and the R input
will be low (because of the inversion). This will set the flip-flop, making Q high and Q’
low.
 Data Input Low (Logic 0): Conversely, when the data input is low and the clock signal
transitions, the S input will be low, and the R input will be high (due to the inversion).
This will reset the flip-flop, making Q low and Q’ high.
The behaviour of this D flip-flop constructed from an SR flip-flop is such that on the
triggering edge of the clock signal, the output Q takes the value of the Data input. This

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means that the D flip-flop acts as a one-bit memory cell that stores the value of the
Data input when the clock edge occurs, maintaining that value until the next clock
edge.
 Using a JK Flip-Flop: Connect both J and K inputs together to the D input. This way, the
flip-flop toggles when D is high, and it holds the previous state when D is low. An
additional logic gate (usually an AND gate) is often used to control the input with the
clock signal.

Fig 7: Construction of ‘D’ Flip-Flop using JK Flip-Flop

Figure 7 shows a D flip-flop constructed using a JK flip-flop. The J and K inputs of a standard
JK flip-flop are driven by the same signal, but in this case, the signal is the D input through an
inverter for the K input.

1. JK Flip-Flop Core: The core flip-flop is a JK type, which traditionally has two inputs: J
(set) and K (reset). The JK flip-flop can toggle its output when both J and K are high,
hold the current state when both are low, set when J is high and K is low, and reset when
J is low and K is high.
2. D Input: The D input is the data input for the flip-flop. In this configuration, it directly
feeds the J input of the JK flip-flop.
3. Inverter: The D input also connects to the K input but through an inverter. This ensures
that K is always the opposite of J.
4. Clock Pulse (CP): The CP input is the clock signal for the flip-flop. The flip-flop changes
state according to the J and K inputs only on the triggering edge of the CP (typically the
rising edge).

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Behavior:
 Data Input High (Logic 1): When D is high, J will be high, and K will be low because of
the inverter. Upon the triggering clock edge, the JK flip-flop will be set, and the output
Q (denoted Qn) will become high.
 Data Input Low (Logic 0): When D is low, J will be low, and K will be high. Upon the
triggering clock edge, the JK flip-flop will reset, and the output Q will become low.

The behavior of this configuration is identical to a standard D flip-flop:

 On the clock's rising edge, if D is '1', the flip-flop sets (Q becomes '1').
 On the clock's rising edge, if D is '0', the flip-flop resets (Q becomes '0').

This setup effectively turns the JK flip-flop into a D flip-flop because, on every clock pulse,
the output Q takes the value of the D input, ensuring that the Q output follows the D input
synchronously with the clock. This construction is particularly useful when you have a JK
flip-flop available and need it to perform as a D flip-flop in a digital circuit.

3.2 Truth Table and Excitation Table

The truth table shows how the output Q of the D flip-flop responds to the D input when a
clock pulse occurs:

Truth Table of D Flip Flop

The truth table shows how the output Q of the D flip-flop responds to the D input when a
clock pulse occurs:
 When the CLK is at the rising edge, if D is 0, the output Q will be 0 after the clock edge.
 When the CLK is at the rising edge if D is 1, the output Q will be 1 after the clock edge.

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The CLK column indicates the condition under which the output will reflect the input,
specifically at the rising edge of the clock signal. The Q column indicates the output state after
the rising edge has occurred.

The characteristic table shows what the next stage of the output (Qn+1) will be based on
the current input (D) and the current state of the output (Q):

Characteristics Table of D Flip-flop

The characteristic equation of D Flip-Flop is given by:

The characteristic table is used to determine the behaviour of the flip-flop in sequential
circuit design, showing that the D flip-flop will always output the value that is present on its
input D when the next clock edge occurs.

Excitation Table:

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Excitation Table
In the Excitation table, Qn indicates the flip-flop's current state, and D n denotes the flip-flop's
current input. Meanwhile, Qn+1 signifies the flip-flop's subsequent state.

3.3 Timing Diagrams and Clocking

Fig 8: Timing Diagram of ‘D’ Flip-Flop

 At each rising edge of the Clk signal, the D flip-flop captures the value present on the D
input and outputs it on the Q output. This happens at the exact moments indicated by
the dashed red lines. The output Q changes to match the D input precisely at these rising
edges.
 Between clock pulses, even if the D input changes, the output Q remains constant,
reflecting the value of D from the last clock edge. This illustrates the edge-triggered
nature of the D flip-flop.

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SELF-ASSESSMENT QUESTIONS – 2

5. What does the 'D' in D flip-flop stand for?

a) Delay
b) Data
c) Dual
d) Dynamic
6. What is the output of a D flip-flop if the input D is '0' and a clock pulse is
given?
a) 0
b) 1
c) The output toggles
d) The output is unpredictable
7. How many data inputs does a D flip-flop have?
a) 0
b) 1
c) 2
d) 4
8. Which of the following statements is true for a D flip-flop?
a) It has an indeterminate state like an SR flip-flop.
b) It can be used as a memory buffer.
c) It requires two clock pulses to change its state.
d) It toggles the output when the input is high.

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4. J-K FLIP FLOP

A JK flip-flop is a type of digital storage device, or bistable element, that has two stable states
and is commonly used in electronic logic circuits. It is an extension of the SR flip-flop with
the addition of logic that allows it to "toggle" its state. The JK flip-flop has two inputs
traditionally labelled J and K, respectively, a clock input, and usually two outputs Q and Q’(the
complement of Q).

4.1 Design, Symbol, and Operation.

JK flip-flop, which is a complex digital circuit that is used to store a single bit of data. The
components of a JK flip-flop are shown in figure 9.

Fig 9: Basic block diagram of JK Flip-Flop

1. J and K Inputs: These are the main data inputs of the JK flip-flop. The behaviour of the
flip-flop changes based on the combination of high and low signals applied to these
inputs.
 J stands for "Jump," which sets the flip-flop when high.
 K stands for "Kill," which resets the flip-flop when high.
 When both J and K are high, the flip-flop toggles its state.
2. CLK (Clock Input): The flip-flop's behaviour is synchronised with a clock signal, typically
acting on the rising or falling edge of this signal. Changes to the outputs occur only during
these clock transitions.

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3. Q (Output): This is the main output of the flip-flop. It represents the current state stored
in the flip-flop.
4. Q′ (Complementary Output): This is the inverse of the Q output. If Q is high, Q′ will be
low, and vice versa.
5. PR (Preset Input): This asynchronous input is used to set the flip-flop directly to a high
state (Q=1), regardless of the state of J, K, or CLK inputs. It is an active-low input, meaning
applying a low signal will activate the preset condition.
6. CLR (Clear Input): This is another asynchronous input used to reset the flip-flop directly
to a low state (Q=0), irrespective of the J, K, or CLK inputs. It is also an active-low input,
so a low signal will activate the clear condition.

Operation:

Fig 10: Construction of JK Flip-Flop

Figure 10 illustrates the JK flip-flop, a type of sequential circuit that can be used as a memory
device. It is constructed using a combination of logic gates, and it has two inputs (J and K), a
clock input (Clk), and two outputs (Q and Q’).

1. Input Gates: The inputs J and K are each connected to a NAND gate. These gates also
receive the clock signal Clk. These are the input processing gates that prepare the
signals for the flip-flop core.

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2. RS Flip-Flop Core: The central part of the diagram highlighted in red is an RS flip-flop
formed by the cross-coupling of two NAND gates. This arrangement forms the memory
component of the flip-flop, capable of storing a single bit of information.
3. Feedback Loop: The outputs of the RS flip-flop core are fed back into the input gates.
This feedback loop ensures that the JK flip-flop has a toggle function when both J and K
inputs are high.
4. Clock Input: The Clk input is fed to the NAND gates that process the J and K inputs. The
clock signal synchronises the changes to the flip-flop's state.

Behaviour
The JK flip-flop's operation is based on the values of J and K and the clock signal and shown
in the below truth table.
 Hold (J=0, K=0): If both J and K are low when a clock pulse occurs, the flip-flop will
maintain its current state.
 Reset (J=0, K=1): If J is low and K is high at the time of a clock pulse, the flip-flop will
reset, setting Q to low and Q′ to high.
 Set (J=1, K=0): If J is high and K is low at the time of a clock pulse, the flip-flop will set,
setting Q to high and Q′ to low.
 Toggle (J=1, K=1): If both J and K are high, the flip-flop will toggle its output with each
clock pulse. That is, if Q was high, it becomes low, and if it was low, it becomes high.

But, if the clock signal is high and the intent is to toggle the output, the output will rapidly
oscillate between high ('1') and low ('0') until the clock signal returns to low. This problem is
known as a race condition.

This can be solved by making the pulse -triggered or edge-triggered flip flop.

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Truth Table of JK Flip Flop.

The Characteristics equation is given by:

Qn+1 = Q’n (JK + JK’) + Qn (J’K’ + JK’)

= JQn’ + KQn

Excitation Table

Excitation Table of JK Flip Flop.

The excitation table for a JK flip-flop is designed to show what inputs are required (J and K)
to transition from the current state (Qn) to the next state (Qn+1) after a clock pulse.

 0 to 0 Transition: When both the present state and next state are 0, the J input must
remain at 0, and the K input can be either 0 or 1.
 0 to 1 Transition: The present state is 0 and is to change to 1. This can happen either
when J=1 and K=0 (Set Condition) or when J=K=1 (toggle condition). Thus, J has to be
1, but k can be at either level for this transition.
 1 to 0 Transition: The present state is 1 and is changed to 0. This can happen either
when J=0 and K=1 or when J=K=1. Thus, K has to be 1, but J can be at either level.

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 1 to 1 transition: When both the present state and the next state are 1, the K input
remain at 0 while the J input can be 0 or 1.

4.2 Clock Signal and Toggle Operation

Fig 11: Timing Diagram of JK flip flop

The depicted circuit is designed to respond to a rising edge on the Clk input, triggering a
transition in the output Q's state. The change in output occurs exclusively on the rising edge
of the clock signal.

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Edge-triggered JK Flip-Flop Truth Table

SELF-ASSESSMENT QUESTIONS – 3

9. What is the characteristic equation of a JK flip-flop?

a) Qn+1 = JQ'n + K'Q
b) Qn+1 = J + K'Q
c) Qn+1 = JQ'n + KQ
d) Qn+1 = J'Q + K'Q'n
10. Which input condition on a JK flip-flop is used to hold the current state?
a) J = 1, K = 1
b) J = 0, K = 1
c) J = 1, K = 0
d) J = 0, K = 0
11. What happens in a JK flip-flop when the clock signal is low, regardless of J
and K inputs?
a) It toggles
b) It sets
c) It resets
d) No change occurs
12. What does a JK flip-flop do when both J and K inputs are high?
a) It resets
b) It sets
c) It toggles
d) It remains in the previous state

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5. T FLIP FLOP
A T flip-flop, or Toggle flip-flop, is a type of flip-flop that changes its output state (toggles) on
each triggering edge of the input pulse when its T input (toggle input) is high (logic level '1').
When the T input is low (logic level '0'), the flip-flop maintains its current state. It is
essentially a JK flip-flop with the J and K inputs tied together to form a single T input.

Fig 12: Basic block diagram of T flip flop.

 T (Toggle Pin): This is the input to the flip-flop. When the T input is high (logic level
'1') and a clock pulse occurs, the output state of the flip-flop will toggle. If T is low (logic
level '0'), the flip-flop will not toggle and will retain its current state.
 Clock: This input is used to synchronise changes in the state of the flip-flop. The T flip-
flop reacts to changes at the T input only on the triggering edge of the clock signal,
which is typically the rising edge.
 Q (Output): This is the primary output of the flip-flop. It represents the current state,
which can be '0' or '1'. This outputs changes according to the state of the T input when
the clock edge occurs.
 Q′ (Inverted Output): This output complements Q. If Q is high, Q′ will be low, and vice
versa. It is also referred to as the inverted output because it always represents the
opposite state of Q.

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5.1 T Flip Flop Concept and Operation

Fig 13: Construction of T flip flop.

Figure 13 depicts a T flip-flop constructed using two AND gates and two NOR gates. Here is
the correct explanation based on the typical construction using AND and NOR gates:

Construction:
1. AND Gates: These gates are connected to the T input and the Clk (Clock) input. The
output of these AND gates is connected to the inputs of the two NOR gates. The function
of these AND gates is to gate the T input with the clock signal so that the NOR gates only
receive input when the clock signal is high (on its rising edge).
2. NOR Gates: These gates form the core of the flip-flop. The cross-coupled NOR gates
create a feedback loop that maintains the state of the flip-flop. One of the NOR gates'
outputs is the Q output, and the other is the Q′ (not-Q) output.

Behavior:
 Toggle (T=1): When the T input is high and the clock signal transitions from low to
high (rising edge), the output of the AND gates become high, which affects the NOR
gates' inputs and causes the flip-flop to toggle its state. If Q was 0, it becomes 1, and if
it was 1, it becomes 0. Q′ is always the inverse of Q.
 Hold (T=0): When the T input is low, regardless of the clock signal, the output of the
AND gates remains low, and the flip-flop retains its current state. The Q and Q ′ outputs
do not change.

Outputs:
 Q (Output): This is the main output of the flip-flop, representing the stored bit.

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 Q′ (Inverted Output): This is the complementary output, which is always the opposite
of Q.

Truth Table
The truth Table of T Flip Flop is shown below. This truth table shows the relationship
between the clock input, the T input, and the resulting next state (Qn+1) of the flip-flop.

Clk T Qn+1

0 X Qn

1 0 Qn

1 1 Qn’

Truth Table for T Flip-flop

 Clk: This column shows the state of the clock input. The T flip-flop is typically edge-
triggered, meaning it will only change state on a specific edge of the Clk signal. However,
this table includes a state where Clk is '0', indicating that when the clock is not at the
triggering edge (in this case, the rising edge), the state of T does not matter (denoted
by 'X'), and the flip-flop's output will not change.
 T: This is the toggle input for the flip-flop. When T is high ('1') and the Clk transitions
from low to high, the flip-flop will toggle its state. When T is low ('0'), the flip-flop will
maintain its current state.
 Qn+1: This column shows the next state of the flip-flop after the clock input's triggering
edge. It is the state that the flip-flop will transition to from its current state (Qn).

K-Map

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Q(n+1) = TQn’ + T’Qn

= T XOR Qn

Excitation Table:
The provided table is the excitation table for a T (Toggle) flip-flop. From the truth table, we
can infer the following points.

When Q retains its state either from '0' to '0' or '1' to '1', T = '0'

When Q changes its state from '1' to '0' or '0' to '1', T ='1'.

Excitation Table for T Flip-flop

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5.2 Toggling Behaviour and Applications.

Fig 14: Timing Diagram of T Flip Flop

A T flip-flop inverts its current input state. If the T flip-flop is set to '1', then a '1' at the current
state will result in a '0' at the output, and the opposite is true as well.

Suppose the initial condition (at time T0) has the current state (Qn) as '0', then the
subsequent state (Qn+1) will be '1'.

At moment T1, the toggle (T) signal transitions from a low state to a high state, triggering the
T flip-flop to change states. As a result, the output states Qn and Qn+1 will switch, causing
Qn to go high and Qn+1 to go low.

At moment T2, the toggle (T) signal shifts from high back to low. This causes the output of
the flip-flop to remain stable or hold its previous state.

At moment T3, the toggle (T) signal once again moves from a low state to a high state,
prompting a state change in the device. Consequently, Qn transitions from a low to a high
state, and Qn+1 transitions from a high to a low state.

At moment T4, the toggle (T) signal reverts from high to low. The output holds its state
consistently until the time reaches T5.

By examining the timing diagram from T1 to T5, we can see that the toggle (T) signal has
undergone two full cycles, whereas the outputs Qn and Qn+1 have only completed a single

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cycle. This demonstrates the T flip-flop's capability to act as a frequency divider, effectively
halving the input frequency.

SELF-ASSESSMENT QUESTIONS – 4

13. What does the 'T' in a T flip-flop stand for?

a) Transfer
b) Toggle
c) Trigger
d) Transform
14. How does a T flip-flop behave when the T input is high?
a) It resets
b) It sets
c) It toggles its output
d) It holds its current state
15. What is the characteristic feature of a T flip-flop?
a) It has two inputs
b) It toggles the output on every clock pulse
c) It can only set, not reset
d) It can only reset, not set

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6. SUMMARY
Flip-flops are essential components in digital circuits, serving as memory elements that store
binary information. The SR flip-flop, with its Set and Reset inputs, is the simplest type, but it
has a potentially problematic indeterminate state when both inputs are high. The JK flip-flop
resolves this by allowing the flip-flop to toggle its output when both inputs are active, making
it a versatile choice for applications like counters. The D flip-flop, with its single Data input,
captures and stores the value of the input at the clock's edge, making it ideal for reliable data
storage and transfer. Lastly, the T flip-flop is a derivative of the JK flip-flop, with both inputs
tied together to form a single Toggle input. It changes its output state with each clock pulse
when the Toggle is high, serving effectively in frequency division by halving the clock signal.
Typically, flip-flops are edge-triggered, reacting only at the transition of the clock signal,
which ensures precise control over timing and synchronization in digital systems.

7. TERMINAL QUESTIONS
1. Explain the construction and behaviour of SR and JK flip flop.
2. Design the excitation table for JK flip flop, D flip flop and T flip flop.
3. Obtain the characteristics equation for SR flip flop and D flip flop
4. Explain the timing Diagram of the JK flip flop.
5. Write a short note on Race Conditions.

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8. ANSWERS
Self-Assessment Answers
1. Set-Reset
2. 2.No Change
3. 1
4. . S=1, R=1
5. Data
6. 0
7. 1
8. It can be used as a memory buffer.
9. Qn+1 = JQ'n + K'Q
10. J = 0, K = 0
11. No change occurs
12. It toggles
13. Toggle
14. It toggles its output
15. It toggles the output on every clock pulse

Terminal Answers
1. Refer to sections 1.1 and 3.1.
2. Refer to sections 3.1, 2.2, 4.1.
3. Refer to sections 1.4, 2.2.
4. Refer to sections 3.2
5. Refer to sections 3

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BACHELOR OF COMPUTER APPLICATIONS

SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 12
Synchronous Counters

Table of Contents

SL Topic Fig No / Table SAQ / Page No

No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Overview and Design of Synchronous Counters - 1
4-6
2.1 Definition and purpose of counters - -
3 Types of Counters 1, 2, 3, 4, 5, 6, 7 2

3.1 Decade Counters - -

3.2 Ring Counters - -

3.3 Johnson Counters - - 7-28

3.4 Synchronous Up Counters - -

3.5 Synchronous Down Counters - -

3.6 Synchronous Up/Down Counters - -

4 Applications of Synchronous Counters - - 29
5 Summary - - 30
6 Terminal Questions - - 31
7 Answers - - 31

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1. INTRODUCTION
Counters are digital logic devices that increment or decrease their value in response to a
series of input pulses, typically clock signals. They are integral components of digital systems
for counting events, measuring time, or sequencing operations.

The main properties of a counter are timing, sequencing, and counting. Counter works in two
modes: Up Counter and Down Counter.

Counters are broadly Classified as : Asynchronous counter and Synchronous counter

Synchronous counters are digital counters where all the flip-flops are driven by a common
clock signal. The term "synchronous" refers to the fact that the state transitions of the flip-
flops occur simultaneously in response to the clock signal. This synchronisation ensures that
the output of the counter represents a coherent count sequence at any given moment,
making synchronous counters essential for precise timing and sequence generation in digital
circuits.

Synchronous counters are fundamental in digital systems, and their design often uses flip-
flops like JK or T flip-flops, combined with additional logic gates to ensure the correct count
sequence. The synchronized operation makes them reliable and predictable, which is
essential for the accurate timing and control required in complex digital systems.

1.1 Learning Objectives

At the end of this unit, students should be able to:
 Identify the basic components that make up a synchronous counter.
 Explain the operation of a binary synchronous counter.
 Demonstrate the construction of a simple synchronous counter using flip-flops and logic
gates.

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2. OVERVIEW AND DESIGN OF SYNCHRONOUS COUNTERS

Synchronous counters are digital counters where all the flip-flops (which make up the
counter) are driven by a single clock signal. This synchronisation ensures that all bits in the
counter change state simultaneously in response to the clock pulse, making the counter's
operation more predictable and reliable than asynchronous counters, where flip-flops do not
switch simultaneously.

The synchronous nature of these counters provides a clear advantage regarding speed and
reliability. Since all changes occur simultaneously, there is no propagation delay, as found in
asynchronous counters, where the output of one flip-flop serves as the clock input to the
next.

2.1 Definition and Purpose of Counters

A counter is a digital device that stores and displays the number of times a particular event
or process has occurred, often in response to input signals known as clock pulses. Counters
are made up of a series of flip-flops arranged in a specific configuration that enables them to
represent a count value in binary form. Each flip-flop corresponds to one bit of the output,
which collectively represents a binary number.

Purpose of Counters
The primary purposes of counters include:
 Event Counting: They can keep track of the number of occurrences of an event, such as
the number of items passing on a conveyor belt or the number of people entering a
room.
 Time Measurement: Counters can measure time intervals. For instance, they can
determine the duration between two events by counting the number of clock cycles that
occur in the interim.
 Frequency Division: They can divide the frequency of the input clock signal by
producing an output signal with a frequency that is a fraction of the input. This is
common in digital clocks and timing applications.
 Sequencing: Counters can generate sequential logic states to control the operation of
digital circuits, such as stepping through the different stages of a process.

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 Digital Clocks and Timers: In digital watches or clocks, counters are used to keep track
of seconds, minutes, and hours.
 Signal Pulse Shaping: By producing output pulses of a specified width, counters can
shape incoming signals into desired forms.
 Computer Memory Addressing: They are used in computer systems to generate
sequential memory addresses for reading and writing operations.
 Programmable Operations: In programmable devices, counters can help execute
operations for a specified number of cycles or during certain intervals.

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SELF-ASSESSMENT QUESTIONS – 1

1. What is the primary function of a counter in digital circuits?

a) To store data
b) To amplify signals
c) To keep track of the number of occurrences of an event
d) To convert analog signals to digital
2. Counters in digital electronics are used to:
a) Implement decision-making logic
b) Implement memory storage
c) Perform arithmetic operations
d) Sequence events in a defined order
3. Which type of counter is used for generating a timing sequence?
a) Ripple counter
b) Synchronous counter
c) Ring counter
d) All of the above
4. Counters are typically constructed using which type of digital circuit
component?
a) Operational amplifiers
b) Diodes
c) Resistors
d) Flip-flops
5. The output of a counter is usually in which form?
a) Analog voltage levels
b) Binary code
c) Continuous current
d) Complex numbers

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3. TYPES OF COUNTERS
Synchronous counters can be categorised based on their counting sequences or their specific
applications. Here are several common types:
1. Decade Counters
2. Ring Counters
3. Johnson Counters
4. Synchronous Up Counters
5. Synchronous Down Counters
6. Synchronous Up/Down Counters

Synchronous
Decade Johnson Synchronous Synchronous
Ring Counter Up/Down
Counters Counters Up Counters Down Counters
Counters

3.1. Decade Counters

The basic Binary Coded Decimal (BCD) counter, often referred to as a Decade counter, is a
fundamental type of digital counting circuit that is widely used in various electronic
applications.

A decade counter, also known as a BCD (Binary Coded Decimal) counter, is a digital counting
circuit that counts from zero to nine and then resets to zero. It's called a "decade" counter
because it goes through ten unique states, corresponding to the ten decimal digits (0 through
9), before returning to the initial state.

Operation of BCD (Decade) Counters:

 4-bit Output: The counter has a 4-bit output representing decimal numbers 0 through
9 in binary form. The bits are usually denoted as Q0 (LSB), Q1, Q2, and Q3 (MSB).
 Clock Input: The counter advances its count state by one with each clock pulse, which
serves as a signal for the counter to change its state.
 Sequential Counting: Starting from an initial state of 0000, with each clock pulse, the
counter increments its value in binary. When it reaches the binary representation of
the decimal number 9 (1001), it requires special handling to reset on the next pulse.

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 Reset Mechanism: Once the counter reaches 9, the next clock pulse causes the counter
to reset back to 0000, ensuring that the counter only cycles through the decimal digits
0-9.
 Cascading: To count beyond 9, BCD counters can be cascaded so that the reset pulse,
after reaching 9 can trigger the next counter to increment, allowing for multi-digit
decimal counting.

Example: 4-Bit Synchronous Decade Counter

Fig 1: 4-bit Synchronous Decade Counter

The figure illustrates a 4-bit synchronous decade counter and the Components of the Decade
Counter is as shown below:
 Flip-flops (FF0 to FF3): The counter consists of four flip-flops (FF), each representing
a single bit of the 4-bit binary output. These flip-flops are typically JK flipflop, which can
be set, reset, or toggled based on their inputs.
 Clock (CLK): The CLK signal is the driving force for the flip-flops. All flip-flops are
triggered simultaneously by this common clock signal, making the counter
synchronous.
 Additional Logic Gates: The counter includes a combination of AND and OR gates that
feedback into the flip-flops to reset the counter from the binary representation of 9
(1001) to 0 (0000) on the next clock pulse.
 Output (Q0 to Q3): Each flip-flop has an output (Q0 to Q3) representing one bit of the
binary count. The least significant bit (LSB) is Q0, and the most significant bit (MSB) is
Q3.

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Operation:
 The counter advances its count on the rising edge of each clock pulse. The LSB (Q0)
toggles with every clock pulse.
 The next flip-flop (Q1) toggles when Q0 is high, and so on, resulting in a binary count
sequence.
 The count sequence follows a binary progression: 0000, 0001, 0010, ..., 1001 (decimal
0 to 9).
 Once the counter reaches 9 (1001), the additional logic gates detect this state and reset
the counter to 0000 on the next clock pulse. This reset function ensures the counter
never shows a binary number above 9, keeping the output within the range of a single
decimal digit.

Truth Table:
A truth table for a 4-bit synchronous decade counter will show how the outputs of the
counter (Q0 to Q3) change in response to the clock pulses (CLK). The counter will count from
0 to 9 (0000 to 1001 in binary) and then reset to 0.

Here is a representation of the truth table for a 4-bit synchronous decade counter:

CLK Q3 Q2 Q1 Q0 Decimal
Equivalent

↑ 0 0 0 0 0

↑ 0 0 0 1 1

↑ 0 0 1 0 2

↑ 0 0 1 1 3

↑ 0 1 0 0 4

↑ 0 1 0 1 5

↑ 0 1 1 0 6

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↑ 0 1 1 1 7

↑ 1 0 0 0 8

↑ 1 0 0 1 9

↑ 0 0 0 0 0

Timing Diagram:
The timing diagram shows the state of the clock signal and the corresponding states of the
outputs Q0 to Q3 over time. Each vertical line represents a clock pulse where the following
occurs:

Fig 2: Timing Diagram of 4-bit Synchronous Decade Counter

 CLK: The clock signal rises and falls, triggering the flip-flops.
 Q0: Toggles on every clock pulse, as indicated by its state change at each CLK rising
edge.
 Q1 to Q3: These outputs toggle at half the frequency of the preceding flip-flop. For
example, Q1 toggles every time Q0 transitions from high to low.

Applications:
 Clock Circuits: In digital clocks and timers, BCD counters are used to count seconds,
minutes, and hours. They are particularly useful in clocks because they align with the
decimal system used to read time.

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 Frequency Dividers: These counters can divide the frequency of an input signal, which
is useful in creating precise timing intervals.
 State Machines: BCD counters can advance a machine through a predefined sequence
of states.
 Sequencers: In sequencing applications, such as control systems or signal processing,
BCD counters provide a means to move through a series of steps or stages in a process.

3.2 Ring Counter

Ring Counter is a type of shift register with a feedback loop where the output of the last flip-
flop is fed back into the first input.

Fundamental Operation:
 In a ring counter, a single '1' (or '0') circulates around the flip-flops.
 At any given time, all flip-flops but one will contain '0'; the exception contains a '1'.
 The '1' moves or "shifts" one position with each clock cycle, creating a repeating pattern
of states that is as long as the number of flip-flops in the ring.

Characteristics:
 Unidirectional Shift: The '1' bit moves in one direction only. If it starts as the LSB, it
will move towards the MSB with each clock pulse.
 Exclusive State: Only one flip-flop holds the '1' at any time, making it simple to decode
the counter's position.
 Length of Sequence: For an n-bit ring counter, the sequence will have n distinct states,
each representing a unique binary number with a single '1'.

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 Reset Required: To start the sequence, the counter must be initialised into a state
where there is exactly one '1' among the flip-flops. This is typically done by a clear
operation followed by a preset.

Fig 3: Ring Counter

The circuit diagram shown in figure 3 is a Ring Counter. Specifically, this is a 4-bit Ring
Counter composed of D-type flip-flops.

Components:
 Flip-flops (FF-0 to FF-3): There are four D-type flip-flops, which are the main storage
elements in the counter.
 Clock (CLK): This input signal synchronises the operation of all flip-flops, ensuring that
they change state simultaneously on the clock's rising edge.
 Clear (CLR): This input asynchronously resets all flip-flops to 0, clearing the counter.
 Preset (PR): This input sets the flip-flops to a predefined state. In the case of a ring
counter, one flip-flop is typically preset to '1' while the rest are cleared to '0'.
 Output (Q0 to Q3): These are the outputs of the flip-flops, which represent the counter's
current state.
 ORI (Original Input): This is often the initial input to the counter, which may be used to
set the initial state of the ring counter to '1' for one flip-flop.

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Operation:
A Ring Counter circulates a '1' through the flip-flops. In a 4-bit Ring Counter:
 Initially, one flip-flop (usually FF-0) is preset to '1', and the rest are cleared to '0'.
 With each clock pulse, the '1' is shifted to the next flip-flop in the sequence.
 After four clock pulses, the '1' returns to its original position, completing a cycle.

Behavior:
The Ring Counter will go through a predictable sequence of states. For a 4-bit counter, it has
4 unique states:
1. Initially, the state might be 1000 (if FF-0 is preset to '1').
2. After the first clock pulse, it shifts to 0100.
3. After the second pulse, it shifts to 0010.
4. After the third pulse, it shifts to 0001.
5. The sequence repeats from the initial state after the fourth pulse.

Truth Table:
The truth table for a ring counter will illustrate the state of each flip-flop (FF) for every clock
cycle. In a 4-bit ring counter, which is the typical example, you have four flip-flops (FF0 to
FF3). At the start, one flip-flop is set to '1', and the rest are set to '0'. With each clock pulse,
the '1' shifts to the next flip-flop in the sequence and repeats as shown in the below table.

Clock Cycle FF3 FF2 FF1 FF0 State Description

Initialisation 0 0 0 1 Initial State

1 0 0 1 0 ‘1’ shifts left

2 0 1 0 0 ‘1’ shifts left

3 1 0 0 0 ‘1’ shifts left

4 0 0 0 1 ‘1’ returns to FF0

(Start of new cycle)

Repeat

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Applications:
 Sequence Generation: The distinct state sequence of a ring counter is useful for timing
and control applications where a specific sequence of activations is required.
 Position Encoding: Ring counters can serve in systems that need to track a position in
a cycle, such as a rotating machine or an electronic lock.
 Digital State Machines: They can drive state machines through a series of states in a
controlled manner.

3.3 Johnson Counters

The Johnson counter, also called the "twisted ring counter," is a variation of the standard
ring counter with an enhancement that expands its utility and counting sequence.

Key Characteristics of a Johnson Counter:

 Inversion Feedback: The primary distinguishing feature of a Johnson counter is that
the inverted output (Q’) of the last flip-flop is fed back to the input of the first flip-flop.
This feedback mechanism ensures that each complete cycle of the counter goes through
a series of states twice the number of flip-flops used.
 2n Counting Sequence: With 'n' flip-flops, a Johnson counter goes through a sequence
of 2n unique states, making a full cycle before returning to the initial state. This is why
it's often referred to as a "Mod 2n" counter, where 'Mod' indicates the modulus or the
number of unique states in the counting cycle.

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Fig 4: Johnson’s Counter

The figure 4 shows a Johnson counter, which is a type of shift register that passes a stream
of logic high ('1') followed by a stream of logic low ('0') through a series of flip-flops. This
particular diagram shows a 4-stage Johnson counter, also known as a "twisted ring counter."

Components of the Johnson Counter:

 Flip-Flops (FF-0 to FF-3): These are typically D-type flip-flops (DFF), which store a
single bit of data. Each flip-flop's output (Q) feeds the input (D) of the next flip-flop in
the series.
 Clock (CLK): The clock input synchronizes the shifting of data through the flip-flops.
 Clear (CLR): This input asynchronously resets all flip-flops to 0 when activated,
clearing the counter.

Operation:
 The inverted output (Q’) of the last flip-flop (FF-3) is fed back to the input of the first
flip-flop (FF-0).
 On each clock pulse, the data is shifted one position through the counter.
 The Johnson counter generates a unique sequence of states. For a 4-stage counter like
this, it would generate an 8-bit pattern before repeating.
 The pattern for a 4-stage Johnson counter would be: 0000, 1000, 1100, 1110, 1111,
0111, 0011, 0001, and then back to 0000.

Truth Table:

Clock Q0 Q1 Q2 Q3

0 0 0 0 0

1 1 0 0 0

2 1 1 0 0

3 1 1 1 0

4 1 1 1 1

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5 0 1 1 1

6 0 0 1 1

7 0 0 0 1

REPEAT

The truth table represents the state of a 4-bit Johnson counter (also known as a "twisted
ring counter") at each clock cycle. A Johnson counter goes through a unique sequence of
states that are twice the number of bits in the counter. For a 4-bit counter, this means
there will be 8 unique states.

The truth table contains the following:

 Clock: This column represents the clock cycles, which are the timing pulses that trigger
changes in the counter's state.
 Q0 to Q3: These columns represent the output of each of the four flip-flops in the
counter. Q0 is the output of the first flip-flop, Q1 is the output of the second, and so on.

Key points:
 The Johnson counter produces a sequence of states that are non-repeating until the
entire sequence is completed.
 Each flip-flop in the Johnson counter toggles between '0' and '1' in a sequential fashion,
which creates a "snake-like" pattern through the series of flip-flops.
 The counter has a "memory" of the past state, as the next state depends on the inversion
of the last flip-flop's output.
 The number of unique output states of a Johnson counter is double the number of flip-
flops, thus a 4-bit Johnson counter has 8 unique states.

Advantages of Using a Johnson Counter:

 Regular and Predictable States: The counter provides a predictable series of states that
can be easily decoded or used for sequencing tasks without complex logic.

 Reduced Glitches: Since the counter advances through its states in a predictable
manner, the chance of temporary glitches is reduced, which can happen in
asynchronous designs.

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 Efficient Utilization of Flip-Flops: A Johnson counter uses a smaller number of flip-flops

compared to other counters to produce a large sequence of states, making it efficient in
terms of hardware.

Applications:
Johnson counters find applications in digital logic design wherever a sequence of states is
required, such as:
 Driving sequential logic in state machines.
 Generating timing signals in control applications.
 Producing non-overlapping signals for driving multi-phase clocks or control signals.
 Creating visual patterns in LED displays or lighting systems.

3.4 Synchronous Up Counters

A synchronous up counter is a type of digital counter that counts upwards in a binary
sequence on each clock pulse. All the flip-flops in a synchronous counter are driven by a
common clock signal, which makes their outputs change state simultaneously. This
synchronisation eliminates the ripple effect seen in asynchronous counters, leading to more
reliable and faster operation.

Example: 4-bit Synchronous Up Counter

The 4-bit up counter depicted in figure 5 employs JK flip-flops. An external clock signal is
supplied simultaneously to all flip-flops.

JK flip-flops are commonly chosen for counter designs due to their ability to switch states
when both inputs are high, controlled by the timing of the clock signal.

The first flip-flop's inputs are tied to a logic high state (logic 1), enabling it to change its state
with each incoming clock pulse. Consequently, the synchronous counter operates using a
solitary clock signal, transitioning its state with each clock pulse.

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Fig 5: 4-bit Synchronous Up Counter

The first JK flip-flop's output (Q) feeds into the input of the second flip-flop. Additionally, the
next two flip-flops are controlled by external AND gates, with inputs received from the
outputs of preceding flip-flops.

Directly connecting the output of FF1 (Q1) to the input of FF2 would disrupt the counter's
correct sequence. If such a direct connection existed, FF2 would toggle on the third clock
pulse when the Q1 is high, which corresponds to a binary count of 2 (010 in binary), leading
to an erroneous count sequence that presents 7 (0111 in binary) instead of the expected 4
(0100 in binary).

Incorporating AND gates at the inputs of FF2 and FF3 rectifies this issue. The output of the
AND gate becomes high only when both preceding outputs, Q0 and Q1, are high.
Consequently, during the following clock pulse, the counter will correctly indicate a binary
count of 2 (0001 in binary).

Similarly, FF3 will toggle on the fourth clock pulse, but only when Q0, Q1, and Q2 are
simultaneously high. Q3 remains unchanged until the eighth clock pulse and will stay high
through the sixteenth clock pulse. Following the sixteenth clock pulse, all flip-flop outputs
revert to zero, resetting the count.

In the up counter, the binary counting begins at 0000 and ascends to 1111. To comprehend
the function of the depicted up counter circuit, it's essential to understand the JK Flip-flop.

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Within this circuit, the J and K inputs of the flip-flop are interconnected, leading to only two
possible scenarios: either both inputs are set high or both are set low.

When both inputs are high, the JK flip-flop will toggle its state. Conversely, when both inputs
are low, the flip-flop maintains its current state.

Operation:
1) Upon the initial clock pulse, the outputs of all flip-flops rest at 0000.
2) With the second clock pulse, since the J and K inputs are high, the state of the first JK
flip-flop (FF0) toggles. As a result, FF0 alters its state with each clock pulse. This results
in a Least Significant Bit (LSB) that toggles between states, yielding an output of 0001.
3) At the third clock pulse, the subsequent flip-flop (FF1) receives high inputs and
transitions its state. At this juncture, FF0 reverts to a state of 0, which in turn influences
FF1 to generate an output of 0010.
4) During the fourth clock pulse, FF1's state persists since its inputs are low, keeping its
previous state intact. Although FF2 receives an output from FF1, it remains unchanged
due to the intervening AND gate. Meanwhile, FF0 toggles back to a high state, resulting
in an output of 0011.
5) At the fifth clock pulse, FF2 is activated and changes its state. FF0's output is low, and
FF1 also remains low, leading to an output of 0100.

This sequence continues until the count reaches 1111. The functioning of the synchronous
counter is elucidated in the following table, detailing the transitions of each flip-flop with the
corresponding clock pulses.

Truth Table:
The truth table lists the state of each flip-flop after each clock pulse, showing the binary count
sequence. In a 4-bit synchronous up counter using JK flip-flops with J and K inputs tied high,
the truth table would typically look like this:

Clock Q3 Q2 Q1 Q0 Output (Binary)

0 0 0 0 0 0000

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1 0 0 0 1 0001

2 0 0 1 0 0010

3 0 0 1 1 0011

4 0 1 0 0 0100

5 0 1 0 1 0101

6 0 1 1 0 0110

7 0 1 1 1 01110

8 1 0 0 0 1000

9 1 0 0 1 1001

10 1 0 1 0 1010

11 1 0 1 1 1011

12 1 1 0 0 1100

13 1 1 0 1 1101

14 1 1 1 0 1110

15 1 1 1 1 1111

3.5 Synchronous Down Counters

A synchronous down counter is a digital counter that decrements its binary value by one with
each input clock pulse. All flip-flops in a synchronous counter receive the clock signal at the
same time, which means their outputs change state simultaneously. This synchronous
operation avoids the ripple effect that occurs in asynchronous counters, leading to quicker
and more reliable counting sequences.

Here’s how a synchronous down counter typically operates:

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1. Initialization: The counter may start from a maximum value, with all flip-flops being
set to '1'.
2. Clock Pulse: Each clock pulse causes the counter to decrease its binary value by one.
In synchronous counters, the clock pulse affects all flip-flops simultaneously.
3. Decrementing Sequence: The binary value represented by the outputs of the flip-flops
decreases in sequence (e.g., from 1111 to 1110, then 1101, and so on).

Fig 6: 4-bit Synchronous Down Counter

Figure 6 presents a 4-bit synchronous down counter constructed with JK flip-flops. This
counter decrements its count with each clock pulse.

Components:
 JK Flip-Flops (Q0 to Q3): There are four JK flip-flops, each representing one bit of the
counter. The flip-flops are labeled from Q0 (least significant bit, LSB) to Q3 (most
significant bit, MSB).
 Clock (CLK): A common clock signal is distributed to all flip-flops, ensuring their
synchronous operation.
 Vdd: This is the supply voltage for the flip-flops.

Operation:
 Q0 Flip-Flop: This flip-flop toggles with every clock pulse since its J and K inputs are
constantly high, which is characteristic of a JK flip-flop in toggle mode.
 Q1 Flip-Flop: This flip-flop toggles only when Q0 is high. An AND gate controls the J and
K inputs, receiving Q0 as one of its inputs. When Q0 is '1', and a clock pulse arrives, Q1
will toggle.

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 Q2 Flip-Flop: This flip-flop toggles only when both Q0 and Q1 are high. Its J and K inputs
are connected to an AND gate that receives inputs from Q0 and Q1. Q2 toggles only
when Q0 and Q1 are both '1' and a clock pulse occurs.
 Q3 Flip-Flop: This flip-flop toggles only when Q0, Q1, and Q2 are high. Its J and K inputs
are connected to an AND gate that receives inputs from Q0, Q1, and Q2. Q3 will toggle
when all three are '1' and a clock pulse is received.

Counting Sequence:
 The counter starts from an initial value, typically the maximum value for down
counters, which would be '1111' for a 4-bit counter.
 With each clock pulse, the counter decrements by one in binary sequence. After '0000',
if the counter continues to receive clock pulses, it will wrap around to '1111' and
continue counting down.

Truth Table:
The truth table of a 4-bit synchronous down counter would start at '1111' and decrement
with each clock pulse:

Clock Q3 Q2 Q1 Q0 Output (Binary)

0 1 1 1 1 1111

1 1 1 1 0 1110

2 1 1 0 1 1101

3 1 1 0 0 1100

4 1 0 1 1 1011

5 1 0 1 0 1010

6 1 0 0 1 1001

7 1 0 0 0 1000

8 0 1 1 1 01110

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9 0 1 1 0 0110

10 0 1 0 1 0101

11 0 1 0 0 0100

12 0 0 1 1 0011

13 0 0 1 0 0010

14 0 0 0 1 0001

15 0 0 0 0 0000

3.6 Synchronous Up/Down Counters

A synchronous up/down counter is a digital counter that can increment (count up) or
decrement (count down) its value in response to an input clock signal, depending on the state
of a direction control input. Unlike asynchronous counters, where each flip-flop is triggered
by the output of the previous one, all flip-flops in a synchronous counter are triggered
simultaneously by the same clock signal. This design leads to faster operation and less
propagation delay through the device.

The first flip-flop's inputs are tied to a logic high state (logic 1), enabling it to change its state
with each incoming clock pulse. Consequently, the synchronous counter operates using a
solitary clock signal, transitioning its state with each pulse.

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Fig 7: 4-bit Synchronous Up/Down Counter

Figure 7 illustrates a 4-bit synchronous up/down counter, which can count in both ascending
and descending order based on the status of the Up/Down control line. The counter uses JK
flip-flops, triggered by a common clock signal (CLK) and controlled by the Up/Down line to
determine the counting direction.

Components:
 JK Flip-Flops (Q0 to Q3): These are the storage elements for each bit of the counter.
Their outputs change state with each clock pulse, depending on the logic conditions at
their J and K inputs.
 Up/Down Control Line: This line determines the counting direction. When the line is
high, the counter counts up. When the line is low, the counter counts down.
 Clock (CLK): A clock signal synchronises the operation of all flip-flops.
 Vdd: The supply voltage for the flip-flops.
 Logic Gates: AND and OR gates are used to set the J and K inputs of the flip-flops based
on the counter's current state and the Up/Down control line.

Operation:

1. Counting Up (Up/Down line is high):

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 For each flip-flop, the J input is connected to Vdd (logic high), and the K input is
connected to the Q output through an AND gate. This configuration causes each flip-
flop to toggle when the AND gate conditions are satisfied.

 The Q0 flip-flop toggles with every clock pulse since its J and K are always high.

 The Q1 flip-flop toggles when Q0 is high, Q2 toggles when both Q0 and Q1 are high,
and Q3 toggles when Q0, Q1, and Q2 are high.

2. Counting Down (Up/Down line is low):

 The AND gates are connected in such a way that they now use the inverted outputs
of the flip-flops (Q’) to determine when to toggle the flip-flops.

 Q0 still toggles with every clock pulse because its J and K inputs remain high.

 Q1 will now toggle when Q0 is low, Q2 when both Q0 and Q1 are low, and Q3 when
Q0, Q1, and Q2 are low.

Counting Sequence:
 For Up Counting (assuming Up/Down is high):

 Starts from 0000, increments to 0001, 0010, ..., up to 1111, then wraps around to
0000.

 For Down Counting (assuming Up/Down is low):

 Starts from 1111, decrements to 1110, 1101, ..., down to 0000, then wraps around
to 1111.

Truth Table
The truth table will vary depending on whether the counter is set to count up or down. The
Up/Down line determines the counting mode. When the line is high, the counter is in "up"
mode, and when the line is low, it is in "down" mode.

Below table shows a combined truth table that reflects both modes for a full counting cycle.
The table will show the transition from '1111' to '0000' (down count) and then back to '1111'
(up count).

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Up/Down Clock Q Q Q Q Output

3 2 1 0 (Binary)

Down (0) 0 1 1 1 1 1111

Down (0) 1 1 1 1 0 1110

Down (0) 2 1 1 0 1 1101

Down (0) 3 1 1 0 0 1100

Down (0) 4 1 0 1 1 1011

… … … … … … …

Down (0) 14 0 0 0 1 0001

Down (0) 15 0 0 0 0 0000

Up (1) 16 0 0 0 1 0001

Up (1) 17 0 0 1 0 0010

Up (1) 18 0 0 1 1 0011

Up (1) 19 0 1 0 0 0100

Up (1) 20 0 1 0 1 0101

… … … … … … …

Up (1) 30 1 1 0 1 1101

Up (1) 31 1 1 1 0 1110

Up (1) 32 1 1 1 1 1111

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SELF-ASSESSMENT QUESTIONS – 2

6. What does a decade counter count up to before resetting?

a) 2^4
b) 1010
c) 1001
d) 1111
7. Which of the following counters will have a sequence of 10 states?
a) Binary counter
b) BCD counter
c) Johnson counter
d) Ring counter
8. What is the main characteristic of a ring counter?
a) All flip-flops are reset simultaneously
b) Only one flip-flop is set at any given time
c) It counts up to 2^n
d) It counts down from 2^n

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9. How many states does a 4-stage Johnson counter have?

a) 4
b) 8
c) 16
d) 32
10. What is another name for a Johnson counter?
a) Twisted Ring Counter
b) Binary Counter
c) Decade Counter
d) Modulus Counter
11. A synchronous up counter is also known as?
a) Ripple Counter
b) Asynchronous Counter
c) Parallel Counter
d) Serial Counter
12. What additional signal line does a synchronous up/down counter have
compared to a regular counter?
a) Reset
b) Enable
c) Up/Down
d) Clock

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4. APPLICATIONS OF SYNCHRONOUS COUNTER

Counters are widely used in digital electronics due to their precise timing and the fact that
all bits change state simultaneously:

1. Timekeeping Devices: They are used in clocks, watches, and timers to keep track of
time intervals and generate precise time-related signals.
2. Frequency Division: In digital circuits, they divide the frequency of a clock signal by a
known integer, which is useful in creating lower-frequency signals from a high-
frequency clock source.
3. Digital Electronics: Counters are fundamental in microprocessors and
microcontrollers as program counters, instruction cycle counters, and for various
timing operations.
4. Digital Meters: They are used in odometers and digital meters to count events or
quantities, such as the number of rotations of a wheel or the number of gallons of water
passing through a pipeline.
5. Data Sampling: Synchronous counters can control the timing of data sampling in
analog-to-digital conversion processes, ensuring samples are taken at consistent
intervals.
6. Pulse Width Modulation (PWM): They generate PWM signals for controlling the
speed of motors, LED dimming, and other applications where a variable output is
required from a digital signal.
7. Memory Addressing: In memory circuits, they can be used to generate sequential
addresses for reading or writing operations.
8. Test and Measurement Equipment: They are essential in counters and frequency
meters used for measurement and diagnostics in electronic laboratories.
9. Sequential Logic Circuits: Synchronous counters can be used to generate specific
sequences of binary numbers required to control the operation of sequential logic
circuits.
10. Communication Systems: They find applications in serial-to-parallel and parallel-to-
serial conversion necessary for data encoding and decoding.
11. Digital Signal Processing: Counters can be part of more complex digital signal
processing systems where certain operations must be synchronised with a clock signal.

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5. SUMMARY
Synchronous counters are digital counting circuits where all the bits change state in sync
with a common clock signal. This coordinated operation allows for rapid and accurate
counting, free from the delays characteristic of asynchronous counters.

These counters come in various types, each with specific applications:

 Decade Counters count from 0 to 9 and are widely used in devices that display
numerical information.
 Ring Counters maintain a single '1' among flip-flops, circulating it with each clock
pulse, which is useful for sequence generation.
 Johnson Counters are enhanced ring counters providing double the count states and
are used for more complex sequence generation.
 Synchronous Up Counters count incrementally from zero up to a maximum value and
are used in various timing applications.
 Synchronous Down Counters work oppositely, counting down from a set value to
zero, ideal for countdown timers.
 Synchronous Up/Down Counters combine the functionalities of up and down
counters, adding versatility for applications that require bidirectional counting.

The design of synchronous counters can be simple or complex, tailored with additional
logic to meet diverse operational requirements. Their reliability and precision make them
essential in many digital systems, from simple clocks to advanced control systems.

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6. TERMINAL QUESTIONS
1. Define Synchronous Counter. Explain its purpose.
2. Design a 4-bit Ring Counter and explain its truth table.
3. Explain decade counters with a neat diagram.
4. Design a Synchronous Up/Down Counter with its truth table.
5. Design a 4-bit Johnson counter and mention its application.

7. ANSWERS
Self-Assessment Answers
1. To keep track of the number of occurrences of an event
2. Sequence events in a defined order
3. Synchronous counter
4. Flip-flops
5. Binary code
6. 1001
7. BCD counter
8. Only one flip-flop is set at any given time
9. 8
10. Twisted Ring Counter
11. Parallel Counter
12. Up/Down

Terminal Answers
1. Refer to Section 1.1.
2. Refer to Section 2.2.
3. Refer to Section 2.1.
4. Refer to Section 2.6.
5. Refer to Section 2.3.

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BACHELOR OF COMPUTER APPLICATIONS

SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 13
Asynchronous Counters

Table of Contents

SL Topic Fig No / Table SAQ / Page No

No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Overview and Design of Asynchronous Counters - 1
- - 4-6
2.1 Definition and Purpose of Asynchronous
Counters
3 Construction of an asynchronous counter using 1 2
flip-flops
3.1 Ripple Counters and its design - -

3.1.1 Asynchronous Up Counter - - 7-21

3.1.2 Asynchronous Down Counter - -

3.1.3 Asynchronous Up/Down Counter - -

3.1.4 Modulus Asynchronous Counter - -

4 Summary - - 22
5 Terminal Questions - - 22
6 Answers - - 23

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1. INTRODUCTION
An asynchronous counter, also known as a ripple counter, is a type of digital counter in which
the flip-flops that make up the counter are not all triggered by the same clock pulse. Instead,
the first flip-flop is driven by the external clock pulse, and then each subsequent flip-flop is
triggered by the output of the preceding one. This creates a "ripple" effect as the flip to the
new state travels through the flip-flops. Asynchronous counters are valuable when the
counting speed is not a significant concern, and their design simplicity offers a cost-effective
solution for many practical applications in digital electronics. However, due to their inherent
propagation delays, they are not ideal for high-speed counting operations where
synchronous counters would be preferred.

1.1 Learning Objectives

At the end of this unit, students should be able to:
 List the types of flip-flops that can be used to construct an asynchronous counter.
 Explain the principle behind the operation of an asynchronous counter.
 Construct a truth table for a simple asynchronous counter.
 Analyse the ripple effect in asynchronous counters and how it affects the overall counting
speed.

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2. OVERVIEW AND DESIGN OF ASYNCHRONOUS COUNTERS

Asynchronous counters, or ripple counters, are fundamental digital devices that increment
their count state following the sequence of an incoming clock signal with a distinct
characteristic — the flip-flops within the counter are not triggered simultaneously. Each flip-
flop in the sequence is triggered by the output of the previous one, causing the count to
"ripple" through the counter, hence the name. This design simplicity allows for easy
implementation with a minimal number of components, as each flip-flop only needs to be
connected to the subsequent one without complex wiring or additional gating for
synchronisation. However, this simplicity comes at the cost of speed due to the cumulative
propagation delay from each flip-flop's output to the next flip-flop's clock input, making
asynchronous counters suitable for applications where high-speed operation is not critical.

The design of asynchronous counters typically revolves around a series of flip-flops, such as
D-type or JK-type, with the output of one serving as the clock input for the next in the chain.
To construct an asynchronous counter, one begins by connecting the clock signal to the first
flip-flop; subsequent flip-flops are then added, with each one's clock input connected to the
previous flip-flop's output. This creates a sequential triggering effect with each clock pulse.
The number of flip-flops used determines the modulus of the counter; for example, a 4-bit
counter, with each flip-flop representing a binary digit, can count from 0 to 15 (2^4 - 1). The
design process also involves managing the reset mechanism, which is crucial for setting the
counter back to zero once it reaches its maximum count value, allowing it to cycle repeatedly
through its count range.

2.1 Definition and Purpose of Asynchronous Counters

An asynchronous counter, commonly called a ripple counter, is a sequential logic circuit
composed of flip-flops where the clock pulse drives only the first flip-flop, and all subsequent
flip-flops are driven by the output of the preceding flip-flop. This configuration means that the
input to each flip-flop is "asynchronous" with respect to the original clock signal; hence, the
state changes "ripple" through the flip-flops, which is the origin of the name.

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Purpose of Counters
The primary purpose of an asynchronous counter is to count the number of clock pulses,
which is reflected in the binary output of the flip-flops. These counters can count upwards
or downwards and are used in digital electronics for a variety of purposes:
1. Timing Applications: They generate time delays or act as simple timers in low-speed
timing applications due to the inherent propagation delays between flip-flops.
2. Frequency Division: They serve as frequency dividers, where the output frequency is
a fraction of the input frequency based on the number of stages in the counter.
3. Event Counting: They count occurrences of events, which are represented as digital
signals, to keep track of quantities or events over time.
4. State Sequencing: They can also be used to create a sequence of states for controlling
the operation of digital systems, although the delay between state transitions must be
accounted for in the system design.

Characteristics of Asynchronous Counter

1. Ripple Effect: The key feature of an asynchronous counter is that a change in state
"ripples" through the flip-flops. This is because the clock signal is applied only to the
first flip-flop; the rest of the flip-flops receive the clock signal from the output of the
previous flip-flop in the chain.
2. Propagation Delay: Each flip-flop's output has to change before triggering the next
flip-flop, introducing a delay known as propagation delay. This delay accumulates with
each additional flip-flop, making the counter slower as the number of bits increases.
3. Simplicity: Asynchronous counters have a simpler design and require fewer
components than synchronous counters, as they do not require additional circuitry to
align the clock signals.
4. Modulo Count: The count of an asynchronous counter is often described by its
"modulus." A "mod-8" counter, for example, counts from 0 to 7 (2^3 - 1 for a 3-bit
counter).
5. Design: Constructed from D-type or JK-type flip-flops, the output of one flip-flop serves
as the clock input for the next, and so on. The input to the first flip-flop is the external
clock pulse.

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SELF-ASSESSMENT QUESTIONS – 1

1. _____________________ is an asynchronous counter.

a) A counter where all flip-flops are clocked simultaneously.
b) A counter where each flip-flop is clocked by the output of the previous
one.
c) A counter that does not need a clock signal.
d) A counter that can only count downwards.
2. What is the primary purpose of an asynchronous counter?
a) Convert analog signals to digital ones.
b) To count the number of occurrences of an event.
c) To amplify electrical signals.
d) To store data permanently.
3. Which characteristic is a drawback of asynchronous counters?
a) High-speed operation.
b) Simplicity of design.
c) Propagation delay.
d) Low power consumption.
4. Asynchronous counters are also known as:
a) Parallel counters.
b) Ripple counters.
c) Synchronous counters.
d) Decade counters.
5. What happens in an asynchronous counter when the first flip-flop changes
state?
a) The counter resets.
b) The state change ripples through to the next flip-flop.
c) All flip-flops change state simultaneously.
d) The counter stops counting.

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3. CONSTRUCTION OF AN ASYNCHRONOUS COUNTER USING FLIP-

FLOPS

Constructing an asynchronous counter, commonly known as a ripple counter, using flip-flops

involves a series of fairly straightforward steps:

Step 1: Select Flip-Flops

 Type of Flip-Flops: Choose JK or D-type flip-flops as they are commonly used for
counters. JK flip-flops are particularly versatile for this application.

Step 2: Define the Counter Size

 Number of Bits: Determine how many bits your counter will have. This depends on
the range of numbers you want to count. For example, a 4-bit counter can count from
0 to 15.

Step 3: Configure the First Flip-Flop

 Clock Input: Connect the clock input (CLK) of the first flip-flop directly to your external
clock source. This flip-flop will serve as the least significant bit (LSB) of your counter.

 Toggle Mode: For JK flip-flops, connect the J and K inputs to a logic high (Vcc) so that
the flip-flop toggles its output with each clock pulse. For D flip-flops, connect the
inverted output (Q’) back to the D input.

Step 4: Chain the Flip-Flops

 Connecting Subsequent Flip-Flops: For each subsequent flip-flop, connect its clock
input to the output (Q) of the previous flip-flop. This way, each flip-flop will toggle
when the preceding one goes from high to low, creating a ripple effect.

 Ensure Toggle Mode: Similar to the first flip-flop, ensure that all subsequent flip-flops
are in toggle mode by connecting their J and K inputs to a logic high or by connecting
Q’ to D in case of D flip-flops.

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Step 5: Reset/Set (Optional)

 Adding Reset/Set: If you require the ability to reset or set your counter, you can add
additional logic gates or use the preset/clear inputs on the flip-flops if available. A reset
button can set all flip-flops to 0, and a set button can set them to a predefined state.

Step 6: Test the Counter

 Verify Functionality: Power the circuit and apply clock pulses. Observe the output of
the flip-flops at each pulse to ensure that the counter is incrementing (or
decrementing) as expected.

Step 7: Debugging
 Troubleshooting: If the counter does not behave as expected, check all connections,
ensure that all flip-flops are in the correct mode, and verify that the clock signal is
reaching all flip-flops correctly.

3.1 Ripple Counters and its design

Ripple counters can be categorised based on their counting sequence and the way they
handle the binary data. The main types are:

Types of ripple counters:

 Asynchronous Up Counter
 Asynchronous Down Counter
 Asynchronous Up/Down Counter
 Modulus Asynchronous Counter

Modulus
Asynchronous Up Asynchronous Down Asynchronous
Asynchronous
Counter Counter Up/Down Counter
Counter

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3.1.1 Asynchronous Up Counter

An asynchronous up counter is a type of digital counter that counts upwards in a binary
sequence.

Designing 2-bit ripple up counter.

Fig 1: 2-bit ripple up counter

Figure 1 depicts a basic 2-bit ripple (asynchronous) up counter constructed using two T-type
flip-flops, labelled as FF-A and FF-B. This counter increases its binary count with each clock
pulse applied to it. Here’s an overview of how this counter operates:
1. Clock Input (CLK): The CLK input is the external clock signal that initiates the counting
process. It is directly connected to the clock input of the first flip-flop, FF-A.
2. Logic 1 Connection: Both T inputs of the T flip-flops are connected to Logic 1 (or high
voltage), which means these flip-flops will toggle their state with each clock pulse they
receive.
3. FF-A (First Flip-Flop): This is the least significant bit (LSB) of the counter. FF-A receives
the clock signal directly. As it is a T flip-flop with the T input connected to Logic 1, it will
toggle its output QA with each clock pulse.
4. FF-B (Second Flip-Flop): The output of FF-A, QA, is connected to the clock input of FF-
B. Therefore, FF-B will toggle its output QB only when a rising (or falling, depending on
the flip-flop design) edge is detected on its clock input, which happens every time QA
changes from high to low. This means FF-B will change its state on every second clock
pulse, as it waits for QA to complete a full cycle (0 to 1 to 0).

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This arrangement effectively counts in binary as follows:

 When the count is 00 and a clock pulse arrives, FF-A toggles to 1 (count is now 01).
 When the next clock pulse arrives, FF-A toggles back to 0 and the falling edge (transition
from 1 to 0) triggers FF-B to toggle to 1 (count is now 10).
 This sequence continues, with the counter cycling through 00, 01, 10, and 11, then
repeating.

In an alternative configuration using JK flip-flops with both J and K inputs permanently

connected to logic high, the behavior would be identical, as JK flip-flops also toggle their
output when both J and K inputs are high.

The counter's output can be observed at the outputs of FF-A and FF-B (QA and QB),
representing the least and most significant bits of the binary count, respectively. This type of
counter is useful for simple counting applications where the speed of counting is not critical
due to the delay between the toggling of the flip-flops.

Truth Table:

Clock Pulse (n) QA (LSB) QB (MSB) Binary Output

0 0 0 00

1 1 0 01

2 0 1 10

3 1 1 11

4 0 0 00

... (repeats) ... ... ...

 Clock Pulse (n): Represents the number of clock cycles.

 QA (LSB): Represents the output of flip-flop A (least significant bit).
 QB (MSB): Represents the output of flip-flop B (most significant bit).
 Binary Output: The combination of QB and QA represents the 2-bit binary count.

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The counter starts with both flip-flops in the reset state (00). With each clock pulse, FF-A
toggles its state. FF-B only toggles when FF-A's output goes from high to low, which is every
second clock pulse. After the fourth clock pulse, the counter resets back to the initial state
(00), and the cycle repeats. This is a modulo-4 counter since it has four unique states.

3.1.2 Asynchronous Down Counter

Fig 2: 2-bit Asynchronous Down Counter

The Figure 2 shows a 2-bit asynchronous down counter, constructed using two JK flip-flops.
This counter will count down from 3 to 0, which is the inverse of counting up from 0 to 3.
Below is an explanation of its operation:

Flip-Flops Configuration:
 Both JK flip-flops are configured in the toggle mode by connecting the J and K inputs to
the high logic level.

Clocking:
 The CLK input is provided to the first flip-flop (FF-A), which acts as the least significant
bit (LSB).

 The second flip-flop (FF-B), which serves as the most significant bit (MSB), receives its
clock input from the Q’ (inverted output) of FF-A.

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Counting Operation:
1. Initial State (11):
 The counter starts in the state 11 (which is 3 in decimal), meaning both Q outputs
of the flip-flops are set to high.

2. First Clock Pulse:

 FF-A toggles on the first clock pulse because its J and K inputs are high. Its Q output
goes low.

 The counter state changes to 10 (which is 2 in decimal).

3. Second Clock Pulse:

 FF-A toggles again, and its Q output goes high.

 The rising edge of FF-A's Q’ output (transition from low to high) triggers FF-B to
toggle.

 FF-B's Q output goes low.

 The counter state changes to 01 (which is 1 in decimal).

4. Third Clock Pulse:

 FF-A toggles, and its Q output goes low.

 FF-B does not toggle because its clock input (connected to FF-A's Q’) has not
changed.

 The counter state changes to 00 (which is 0 in decimal).

5. Fourth Clock Pulse:

 FF-A toggles, its Q output goes high.

 The rising edge of FF-A's Q’ output triggers FF-B to toggle, its Q output goes high.

 The counter resets back to the initial state 11.

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Counter States:
 The counter moves through the following states: 11, 10, 01, 00, and then repeats the
sequence.

Truth Table
For a 2-bit asynchronous (ripple) up counter, the truth table tracks the output of the flip-
flops (FF0 for LSB and FF1 for MSB) over a sequence of four clock pulses. Here's the truth
table reflecting the counter's operation:

Clock Pulse FF0 (LSB) QA FF1 (MSB) QB Binary Output

1 1 0 01

2 0 1 10

3 1 1 11

4 0 0 00

Asynchronous Up/Down Counter

An asynchronous up/down counter is a type of digital counter capable of counting in either
an increasing (up) or decreasing (down) sequence of numbers. It is termed "asynchronous"
because the flip-flops within the counter do not switch states in exact synchronisation with
the clock signal. Instead, each flip-flop is triggered by the state change of the preceding flip-
flop in the chain, leading to a slight delay or "ripple" effect as the change propagates through
the counter.

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Fig 3: Asynchronous Up/Down Counter

Figure 3 shows a 4-bit asynchronous up/down counter circuit. This type of counter can count
in both ascending (up) and descending (down) order depending on how it's triggered by the
clock input.

Operation:
1. Flip-Flops (FF0 to FF3): Each JK flip-flop represents one bit of the counter, with FF0
being the least significant bit (LSB) and FF3 being the most significant bit (MSB).
2. Clock (C) Inputs: The clock input to the first flip-flop (FF0) is directly from an external
clock source, while the subsequent flip-flops receive the clock input from the Q’
(complement) output of the previous flip-flop.
3. JK Inputs: The J and K inputs of each flip-flop are tied to a high voltage level (Vdd),
which means each flip-flop is in toggle mode when a clock pulse is received.
4. Counting Up: For counting up, the Q’ outputs are used to trigger the next flip-flop in
the sequence. When FF0 toggles from 1 to 0 (on its Q’ output), it provides a clock pulse
to FF1, causing it to toggle. This continues in a ripple effect through to FF3.
5. Counting Down: For counting down, the Q outputs would typically trigger the next flip-
flop in the sequence. However, in the provided diagram, the connections for counting
down are not explicitly shown. In a standard down counter, the Q output of one flip-
flop is used to clock the next flip-flop instead of the Q’ output used in the up counter.

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6. Asynchronous Nature: The term "asynchronous" is due to the fact that not all flip-
flops are clocked at the same time. There is a delay as the clock pulse ripples through
the flip-flops, which is why it's also known as a ripple counter.
7. Binary Counting Sequence: The counter progresses through a binary counting
sequence. For an up counter, it goes from 0000 to 1111 (0 to 15 in decimal), and for a
down counter, it goes from 1111 to 0000 (15 to 0 in decimal).
8. Output: The outputs Q0 to Q3 represent the binary count value of the counter at any
given time, with Q0 being the output of the first flip-flop and Q3 being the output of the
fourth flip-flop.

Truth Table:
A 4-bit asynchronous up/down counter has two modes of operation: it counts up from 0 to
15 (0000 to 1111 in binary) and down from 15 to 0 (1111 to 0000 in binary). The exact
structure of the truth table would depend on the design of the counter, especially how the
up/down mode is controlled.

Let's assume we have a Mode input where:

 Mode = 0: the counter counts up.
 Mode = 1: the counter counts down.

Mode Clock Q3 Q2 Q1 Q0 Description

0 ↑ 0 0 0 0 Initial state

0 ↑ 0 0 0 1 Count up to 1

0 ↑ 0 0 1 0 Count up to 2

... ... ... ... ... ... ...

0 ↑ 1 1 1 1 Count up to 15

1 ↑ 1 1 1 0 Count down to 14

1 ↑ 1 1 0 1 Count down to 13

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... ... ... ... ... ... ...

1 ↑ 0 0 0 0 Count down to 0

The Clock column with "↑" denotes a rising edge of the clock signal, which is the typical event
that triggers a change in state for an asynchronous counter. The Q3 to Q0 columns represent
the outputs of the four flip-flops within the counter, with Q3 being the most significant bit
(MSB) and Q0 being the least significant (LSB).

3.1.3 Modulus Asynchronous Counter

A modulus asynchronous counter, or mod counter, refers to a type of counter that goes
through a prescribed number of states or counts before resetting to its initial state. The term
"modulus" (often abbreviated as "mod") refers to the number of unique states the counter
will sequence through before returning to the start. The "asynchronous" part of the name
indicates that the flip-flops within the counter do not switch states simultaneously; each flip-
flop changes state only after the previous one does. This is why these counters are also
known as ripple counters.

Key Points About Modulus Asynchronous Counters:

1. Count Sequence: In a mod-N counter, the counter progresses through N states (from
0 to N-1) before resetting—for example, a mod-10 counter counts from 0 to 9.
2. Flip-Flop Configuration: They typically use JK or T flip-flops with the outputs of one
flip-flop connected to the clock input of the next, creating a chain where the state
change ripples through.
3. Asynchronous Operation: The flip-flops do not switch states at the exact same time.
There is a delay from the output change of one flip-flop to the triggering of the next,
which can introduce a ripple effect visible in the output.
4. Reset Mechanism: To ensure that the counter only goes through N states, additional
logic is required to reset the counter back to zero after the Nth state. This is often done
with additional gates that monitor the outputs of the flip-flops and generate a reset
pulse when the maximum count is reached.

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5. Propagation Delay: Due to the ripple effect, there is a cumulative delay in the
transition from one state to the next, which is more pronounced as the number of flip-
flops increases. This limits the maximum speed of the counter.

Fig 4: Block Diagram of Modulus-N Asynchronous Counter

The image shows a block diagram of an N-bit asynchronous counter combined with a
combinational logic circuit. Here's how it works:

1. Asynchronous Counter: The N-bit asynchronous counter (also known as a ripple

counter) is driven by a clock signal (CLK). It counts in binary with each clock pulse, but
due to its asynchronous nature, there is a small delay between the changes in output of
the flip-flops that make up the counter (hence the term "ripple"). The outputs of the
counter are Q0 to QN−1, representing each bit of the counter's binary output.
2. Combinational Logic Circuit: The outputs of the counter are fed into a combinational
logic circuit. This logic circuit processes the counter outputs according to certain rules
defined by its internal logic gates (such as AND, OR, NOT, XOR, etc.). The purpose of
combinational logic can vary. It might detect certain patterns or states of the counter
outputs, generate specific signals, or transform the counter outputs into a different
form.
3. Output (Y): The combinational logic circuit generates an output (Y), which is based on
the current state of the counter's outputs. This output can be used to perform a variety
of functions, such as resetting the counter, enabling another part of the circuit, or
indicating that a certain condition has been met, i.e., the combinational logic circuit

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generates a reset signal after the counter reaches a specific count, denoted as M. Since
the reset (CLR) input on the flip-flops is active LOW, the logic circuit must output a LOW
signal (Y=0) to initiate the reset.
4. Reset (Cr): There is a reset input (Cr) that is typically used to set the counter back to a
predetermined state (usually zero). The reset can be triggered by a condition internal
to the system or an external signal. For instance, the combinational logic circuit might
detect when the counter has reached its maximum count and then generate a reset
signal to start the count over again.

This arrangement is commonly used in digital systems where you need the counter to
perform a specific task after counting to a certain number or where the counter's output
needs to be decoded or further processed for control purposes.

Example - Mod-6 Asynchronous Counter:

Let's consider a mod-6 asynchronous counter. It will have the following sequence of states:
0 (000 in binary)
1 (001 in binary)
2 (010 in binary)
3 (011 in binary)
4 (100 in binary)
5 (101 in binary)

In this case, the counter is designed to count up to 6 distinct states (from 0 to 5) and then
reset, which is why it's called a MOD-6 counter (modulus-6).

1. N-bit Asynchronous Counter:

 This is the main counting module composed of flip-flops. Since it is a 3-bit counter,
there are three flip-flops (denoted by Q0, Q1, and QN−1, where QN−1 is Q2 for a 3-bit
counter).
 The counter increases its count with each clock pulse (CLK) that is received, but the
counting is asynchronous. This means that the change in state for each flip-flop is
triggered by the change in state of the previous flip-flop in the sequence, not directly
by the clock pulse.
 As a MOD-6 counter, it naturally counts from 0 to 5 in binary (000 to 101).

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2. Combinational Logic Circuit:

 The outputs Q0, Q1, and QN−1 (where QN−1 represents the MSB, in this case, Q2) of
the counter are connected to a combinational logic circuit. The role of this circuit
is to monitor the counter's state.
 The combinational logic circuit is designed to output a high signal (1) on the Y
output when the counter reaches the pre-defined count M. This signal is used to
reset the counter before it reaches its maximum state of 5 (for a MOD-6 counter).
 When the counter reaches the pre-defined state that corresponds to the count of 6
(binary 110), the combinational logic circuit's output (Y) becomes active.
3. Reset Terminal (Cr):
 The output of the combinational logic circuit is connected to the reset terminal (Cr)
of the flip-flops.
 The reset signal is typically active low, meaning that the flip-flops will reset to their
initial state (all outputs go to 0) when they receive a LOW signal.
 In this case, when the counter reaches the count of 6, the combinational logic will
output a LOW signal (Y=0) if designed accordingly, which triggers the reset and
causes the counter to return to 0 (000 in binary).
4. MOD-6 Counter Operation:
 The counter starts at 0 (000) and increments with each clock pulse.
 Once it reaches 5 (101 in binary), the next clock pulse would naturally increase the
count to 6 (110 in binary).
 At this point, the combinational logic circuit detects this state and activates the
reset signal (Y=0), which resets the counter to 0.

In essence, the combinational logic circuit acts as a controller that allows the asynchronous
counter to act as a MOD-6 counter, even though it has enough flip-flops to count higher (up
to 7 for a 3-bit counter). This functionality is especially useful in timing applications where
a specific count interval is needed before an action is taken, such as in timing circuits, digital
clocks, or sequence generators.

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SELF-ASSESSMENT QUESTIONS – 2

6. An asynchronous up counter is also known as a:

a) Ripple up counter
b) Synchronous counter
c) Down Counter
d) Binary counter
7. In a 3-bit asynchronous up counter, the number of possible states is:
a) 6
b) 7
c) 8
d) 9
8. In an asynchronous down counter, if the present state is '101', what is the
next state?
a) 100
b) 110
c) 111
d) 000
9. An asynchronous down counter is triggered by the:
a) Rising edge of the clock
b) Falling edge of the clock
c) Level of the clock
d) None of the above
10. What additional input is required for an asynchronous up/down counter
compared to a standard up or down counter?
a) Reset input.
b) Enable input.
c) Up/Down control input.
d) Clock input.

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11. What does a modulus-5 asynchronous counter do when it reaches the count
of 5?
a) It stops counting.
b) It resets to zero.
c) It continues to count up to 10.
d) It switches to down counting mode.
12. Which of the following is true about a modulus counter?
a) It can only count up.
b) It counts to a predetermined value before resetting.
c) It only counts down.
d) It does not need a clock signal.
13. An asynchronous counter is called 'ripple counter' because:
a) The output ripples from high to low.
b) The count ripples from the last flip-flop to the first.
c) The count transitions have a rippling delay passing from one flip-flop to
the next.
d) It generates a ripple effect in the external circuit.
14. How can an asynchronous up/down counter be made to hold its current
count?
a) By setting the up/down control input to high.
b) By setting the up/down control input to low.
c) By stopping the clock signal.
d) By toggling the up/down control input.
15. In a modulus asynchronous counter, the combinational logic circuit is used
to:
a) Increase the speed of counting.
b) Detect a specific count and generate a reset signal.
c) Change the direction of counting.
d) Enable the counter.

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4. SUMMARY
An asynchronous counter is a fundamental digital circuit constructed with a series of flip-
flops where the output of one serves as the clock for the next, creating a delay or "ripple"
effect in changing states. It comes in various types to suit different applications: an up
counter that counts sequentially from zero to its maximum state, a down counter that counts
in reverse from a preset number down to zero, and an up/down counter which combines the
capabilities of both, allowing the count direction to be controlled by an additional input
signal. There's also the modulus counter, designed to count to a predetermined number
that's less than the maximum number the flip-flops can count to base on their quantity. It
automatically resets to zero when the desired count is reached, making it particularly useful
in timing and control applications where specific count intervals are mandated. The choice
among these counters is driven by the specific needs such as count direction, precision, and
complexity of the digital system they are integrated into.

5. TERMINAL QUESTIONS
1. Define an asynchronous counter and explain why it is called a ripple counter.
2. Elucidate the construction of an Asynchronous counter using flip-flops.
3. Design a 2-bit ripple-up counter with its truth table.
4. Write a short note on the Asynchronous Down Counter.
5. Design MOD-8 counter and mention the states.

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6. ANSWERS
Self-Assessment Answers
1. A counter where each flip-flop is clocked by the output of the previous one.
2. To count the number of occurrences of an event.
3. Propagation delay.
4. Ripple counters.
5. The state change ripples to the next flip-flop.
6. Ripple up counter
7. 8
8. 100
9. Falling edge of the clock
10. Up/Down control input.
11. It resets to zero.
12. It counts to a predetermined value before resetting.
13. The count transitions have a rippling delay passing from one flip-flop to the next.
14. By stopping the clock signal.
15. Detect a specific count and generate a reset signal.

Terminal Answers
1. Refer to the section 1.1
2. Refer to the section 2
3. Refer to the section 2.1.1
4. Refer to the section 2.1.2
5. Refer to the section 2.1.

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BACHELOR OF COMPUTER
APPLICATIONS
SEMESTER 1

FUNDAMENTALS OF COMPUTERS &

DIGITAL SYSTEMS

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Fundamentals of Computers & Digital Systems Manipal University Jaipur (MUJ)

Unit 14
Shift Registers
Table of Contents

SL Fig No / Table SAQ /

Topic Page No
No / Graph Activity
1 Introduction - -
3
1.1 Learning Objectives - -
2 Overview and Use of Shift Registers 1

2.1 Definition and purpose of shift registers - -

2.2 Types of Sift Register - -

2.2.1 Serial-In-Serial-Out (SISO) 1, 2, 3 - 4-22

2.2.2 Serial-In-Parallel-Out (SIPO) 4, 5 -

2.2.3 Parallel-In-Serial-Out (PISO) 6, 7 -

2.2.4 Parallel-In-Parallel-Out (PIPO) 8, 9 -

3 Applications of Shift Registers - 2 22-24
4 Summary - - 25
5 Terminal Questions - - 26
6 Answers - - 26

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1. INTRODUCTION
Shift registers are a type of sequential logic circuit, primarily used for the storage and
movement of data. They consist of a series of flip-flops, each flip-flop capable of storing a
single bit of data, connected in a chain so that the output of one flip-flop becomes the input
of the next. This setup allows for the ‘shifting’ of data from one flip-flop to the next, either to
the left or to the right, with each clock pulse.

The fundamental operation of a shift register is to take data (usually a binary number) and
shift it through a series of stages. Each stage represents a single flip-flop. With each clock
cycle, the data moves one position over, either in a serial manner (one bit at a time) or in
parallel (multiple bits at a time).

1.1 Learning Objectives

At the end of this unit, students should be able to:
❖ Recall the basic definition of a shift register and its purpose in digital circuits.
❖ Identify the different types of shift registers: SISO, SIPO, PISO, and PIPO.
❖ Summarize the functions of different shift register configurations.
❖ Explain how data is transferred and transformed in various types of shift registers.

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2. OVERVIEW AND USE OF SHIFT REGISTERS

A shift register is a digital memory circuit found in electronics that allows for the storage and
movement of data bits in a sequential manner. At their core, shift registers are sequences of
flip-flops connected in series, where the output of one flip-flop is connected to the input of
the next. This arrangement allows for the sequential passing of data bits from one flip-flop
to the next with each clock cycle, effectively ‘shifting’ the data along the register.

The basic operation of a shift register involves loading data into the register and then moving
it through the register one step at a time. Depending on the type of shift register, data can be
inputted and outputted in either serial or parallel format.

Shift registers are integral to digital circuit design, providing a simple yet powerful means
for data handling and manipulation. They bridge the gap between parallel and serial data
processing and find applications in various domains, including computing, communication,
control systems, and digital signal processing.

Uses of Shift Registers:

Shift registers have a wide range of applications in digital systems:
1. Data Storage: They can temporarily hold data during processing or while being
transferred from one place to another within a system.
2. Data Conversion: They are instrumental in converting data from serial to parallel
format or vice versa. This is particularly useful in communication interfaces where data
needs to be transmitted serially over long distances.
3. Data Manipulation: Shift registers can be used for simple data manipulation tasks like
bit shifting, which is fundamental in certain arithmetic operations.
4. Timing Adjustments: They can help synchronise data streams by aligning data bits to
the correct timing before further processing.
5. Signal Delay: By passing a signal through a shift register, a controlled delay can be
introduced, which is useful in timing and synchronisation tasks.
6. Pattern Generation: They can generate or recognise certain patterns of bits which can
be used in digital signal processing or in creating test signals for circuit diagnostics.

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7. Expansion of IO Ports: In microcontroller applications, shift registers can expand the

number of input/output ports available, allowing the microcontroller to control more
devices or read more sensors.

2.2 Types of Shift Registers

There are several types of shift registers based on their input and output configurations:
• Serial-In, Serial-Out (SISO): Shifts data in and out one bit at a time in a serial format.
• Serial-In, Parallel-Out (SIPO): Accepts data serially and, after all bits are shifted in,
outputs them in parallel.
• Parallel-In, Serial-Out (PISO): Loads data in all at once in parallel and then shifts it out
bit by bit in serial.
• Parallel-In, Parallel-Out (PIPO): Loads and retrieves data in parallel, allowing for
faster data access compared to serial configurations.

2.2.1 Serial-In, Serial-Out (SISO)

The Serial-In, Serial-Out (SISO) shift register is a type of digital storage device that reads data
one bit at a time in a serial format (a single line of data) and outputs it in the same way. In
the SISO configuration, each flip-flop (FF) stores one bit of data, and the bits are shifted from
one flip-flop to the next each time a clock pulse (CLK) is received.

Fig 1: SISO Shift Register

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Figure 1 shows the SISO shift register. It consists of:

1. Serial Input (D3): This is where the data enters the shift register. On each clock pulse,
this bit is shifted into the first flip-flop (FF3).
2. Flip-flops (FF3 to FF0): These are the storage elements of the shift register. Each flip-
flop can hold one bit of data. In this diagram, there are four flip-flops, making this a 4-
bit shift register. The output of each flip-flop is connected to the input of the next flip-
flop in the chain.
3. Clock (CLK): This signal coordinates data shifting. On the rising or falling edge of the
clock signal (depending on the flip-flop design), the data at the input of a flip-flop is
transferred to its output and, hence, into the input of the next flip-flop.
4. Serial Output (Q0): This is where the data exits the shift register. After four clock
pulses, the bit entered at D3 will appear at Q0.

In operation, when the first clock pulse arrives, the bit at D3 is transferred into FF3. On the
second clock pulse, this bit moves from FF3 to FF2, and a new bit is read into FF3. This
process continues with each clock pulse, so the data is ‘shifted’ through the register. After
four clock pulses, the first bit that entered at D3 would be at the output Q0, having travelled
through each flip-flop.

Example:

Fig 2: SISO Shift Register Circuit Diagram

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Initially, the four D flip-flops are all configured in reset mode, which causes all of the flip-
flops’ outputs in the circuit to be low, or “0”. This circuit operates in the shift right mode,
which allows the stored bit to be shifted to the right side in order to produce serial output
when the data is input at the left end of the flip flop.

Let us take an example of the binary number 1111 and see how the given data is stored
within this register.

Working:
1. Initial Reset: Initially, all the flip-flops in the shift register are reset, which sets all
outputs to zero. Therefore, the initial state of the outputs Q3, Q2, Q1, and Q0 is “0000”.
2. First Data Input (D3): The first bit of the binary number “1011”, which is the Least
Significant Bit (LSB), is ‘1’. This bit is fed into the input D3 of the first flip-flop. At the
first clock pulse’s falling edge, flip-flop FF3 captures this input, making Q3 high (‘1’),
while the rest remain low (‘0’). The output state now reads “1000”.
3. Second Data Input: With the second clock pulse, another ‘1’ is input into D3. The
previous ‘1’ at Q3 is shifted to flip-flop FF2, causing Q2 to become high. Now, Q3 and Q2
are ‘1’, while Q1 and Q0 remain ‘0’. The output state now reads “1100”.
4. Third Data Input: As the third clock pulse arrives, the third bit, ‘1’, enters D3. The
sequence shifts right, with Q3’s ‘1’ moving to Q2, Q2’s ‘1’ moving to Q1, and the new ‘1’
from D3 making Q3 high again. Q0 is still ‘0’. The output state now reads “1110”.
5. Fourth Data Input: Finally, the fourth bit, ‘1’, is entered into D3. With the fourth clock
pulse, the entire sequence shifts right once more: Q3’s ‘1’ goes to Q2, Q2’s ‘1’ to Q1, Q1’s
‘1’ to Q0, and D3’s ‘1’ makes Q3 high. Now all outputs are high (‘1’). The output state
now reads “1111”.

Truth Table:

CLK Q3 Q2 Q1 Q0
Initially (Reset) 0 0 0 0
1st Falling Edge 1 0 0 0
2nd Falling Edge 1 1 0 0
3rd Falling Edge 1 1 1 0

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4th Falling Edge 1 1 1 1

The truth table lists the outputs of the shift register’s flip-flops (Q3, Q2, Q1, Q0) after each
falling edge of the clock (CLK). It represents the state of the shift register after each clock
pulse when a ‘1’ is being serially input into the shift register.
• Initially, all flip-flops are reset to ‘0’.
• At the 1st falling edge of CLK, ‘1’ is loaded into Q3 (the most significant bit), while the
rest remain ‘0’.
• At the 2nd falling edge, this ‘1’ moves to Q2, while a new ‘1’ is loaded into Q3.
• At the 3rd falling edge, the ‘1’ in Q2 moves to Q1, Q3’s ‘1’ moves to Q2, and a new ‘1’ is
loaded into Q3 again.
• Finally, at the 4th falling edge, the ‘1’ in Q1 moves to Q0, completing the sequence. The
shift register now holds the binary value ‘1111’.

Timing Diagram:

Fig 3: Timing Diagram of SISO Shift register

The timing diagram visualises the same process over time, illustrating the sequential
movement of the high state through the flip-flops with each clock pulse. It shows how the
binary ‘1’s are shifted through the register:
• The CLK line shows four falling edges, numbered 1 through 4, which trigger the shifting
action.

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• The Din line represents the serial data input, which is held high (‘1’) throughout the
process.
• The Q3 to Q0 lines show the output of each flip-flop in the shift register over time.

2.2.2 Serial-In, Parallel-Out (SIPO)

SIPO stands for Serial-In, Parallel-Out. This term describes a type of shift register that accepts
data serially – that is, one bit at a time, through a single input line. After a series of shifts, the
data is available at the output lines in parallel, with each output line representing a bit from
the serial input.

Figure 4 shows Serial-In, Parallel-Out (SIPO) shift register.

Fig 4: Circuit Diagram of Serial-In-Parallel-Out

Components:
• FF1 to FF4: These are flip-flops, which are the building blocks of the shift register. Each
flip-flop can store one bit of data.
• CLK (Clock): It provides the timing signal for the flip-flops, telling them when to take
in and pass on data.
• CLR (Clear): This control signal is used to reset all flip-flops, clearing the register.
• Serial Input: This is where the serial data is entered into the shift register.
• Q_A to Q_D: These are the outputs of each flip-flop, representing the parallel output of
the shift register.

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Operation:
1. Initialization: Before starting, the CLR line is activated to reset all flip-flops, ensuring
the register starts from a known state (usually all 0s).
2. First Clock Pulse: The first bit (most significant bit in this case) of the serial input is
“1”. On the first clock pulse, this bit is shifted into FF1, which now holds the value “1” at
Q_A.
3. Second Clock Pulse: The next bit, “1”, is now at the serial input. FF1 passes its current
value “1” to FF2, and FF1 takes the new “1” from the serial input. Now, FF1’s output Q_A
and FF2’s output Q_B both hold the value “1”.
4. Third Clock Pulse: The third bit, “0”, enters FF1. The previous values in FF1 and FF2
are shifted into FF2 and FF3, respectively. Now, FF1’s Q_A is “0”, FF2’s Q_B is “1”, and
FF3’s Q_C is “1”.
5. Subsequent Pulses: This process continues for each clock pulse. The bits are shifted
down the line of flip-flops until they reach the end.

At the end of the process, after enough clock pulses, the entire binary input “1101” will be
stored across the flip-flops and can be read out from the parallel outputs Q_A to Q_D
simultaneously. This is useful when converting serial data to parallel form for interfaces that
require parallel data inputs.

Example:
Let’s take a 4-bit data input example for SIPO like 1101.
1. When the first flip flop is applied with the second clock pulse set to “0,” QA, QB, QC, and
QD all become “0.” Because of the shift right operation, the second data output will
become “0100”.
2. If the first flip flop is applied with the third clock pulse set to “1,” then QA becomes “1,”
QB becomes “0,” QC becomes “1,” and QD becomes “0.” As a result, the shift right process
will cause the third data output to become “1011. “
3. The first flip flop becomes “1,” QA becomes “1,” QB becomes “1,” QC becomes “0,” and
QD becomes “1” if we apply the fourth clock pulse as “1.” As a result, the shift right
operation will cause the third data output to become “1101”.

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Truth Table:
The truth table is as shown below:

Timing Diagram

Fig 5: Timing Diagram of SIPO for input 1011.

The timing diagram you’ve provided is for a Serial-In, Parallel-Out (SIPO) shift register
operation. Here’s how to interpret the diagram:
• The topmost line labelled ‘1’, ‘0’, ‘1’, and ‘1’ represents the serial input data bits being
fed into the shift register.
• The next four lines, labelled QA, QB, QC, and QD, represent the outputs of four flip-flops
(FF) in the shift register, from the first to the fourth.
• The CLK line indicates the clock pulses applied to the shift register.

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The operation over four clock cycles can be explained as follows:

1. At the first clock pulse (rising edge indicated), ‘1’ is shifted into QA. Since this is the first
data bit, QB, QC, and QD remain at ‘0’.
2. At the second clock pulse, the ‘1’ that was in QA shifts to QB, and the new input ‘0’ is
shifted into QA. QC and QD remain at ‘0’.
3. At the third clock pulse, the ‘0’ in QA shifts to QB, the ‘1’ from QB shifts to QC, and the
‘1’ that was in QC shifts to QD. A new ‘1’ is shifted into QA.
4. At the fourth clock pulse, the ‘1’ in QA shifts to QB, the ‘0’ from QB shifts to QC, and the
‘1’ from QC shifts to QD. Another ‘1’ is shifted into QA.

After four clock pulses, the outputs of the flip-flops are:

• QA = 1 (the last input bit)
• QB = 1 (the third input bit)
• QC = 0 (the second input bit)
• QD = 1 (the first input bit)

So, the bits have been shifted in order 1101, starting from QA to QD. The arrows indicate the
direction and the movement of data bits from one flip-flop to the next with each clock pulse.

2.3.3 Parallel -In-Serial-Out (PISO)

PISO stands for Parallel-In, Serial-Out. It is a type of shift register used in digital circuits to
collect input data in parallel form – that is, multiple bits entering the register simultaneously –
and then to shift this data out of the register serially, one bit at a time.

In a PISO shift register, the entire data word is loaded into the register at once, with each bit
of the word going into a separate flip-flop within the register. After being loaded, the data
bits are then shifted out one by one with each clock pulse. This process continues until the
entire data word has been read out in a serial format.

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Fig 6: Circuit Diagram of PISO Shift Register.

The Figure 6 represents a Parallel-In, Serial-Out (PISO) shift register. This shift register takes
parallel data input, stores it, and then shifts it out serially. Here’s how it works based on the
diagram provided:
1. The parallel data inputs are labelled A, B, C, and D.
2. Each data input is connected to the corresponding D input of a flip-flop (D-type flip-
flops are used in this case).
3. The CLK (clock) input triggers the shifting operation at each rising edge (or falling edge,
depending on the design of the flip-flop).
4. The Shift/Load line determines the mode of operation. When Shift/Load is low (‘0’), the
parallel data on inputs A, B, C, and D is loaded into the register. When Shift/Load is high
(‘1’), the register shifts the data.
5. Gates G1 to G6 are used to control the loading and shifting operation. When loading,
these gates pass the parallel data to the flip-flops. When shifting, they isolate the
parallel inputs and connect the output of one flip-flop to the input of the next, allowing
the serial shifting of data.
6. In the given configuration, when the register is in shift mode, the Q output of flip-flop A
(Qa) will be the first to be shifted out, followed by Qb, Qc, and Qd, with each clock pulse.

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As the clock pulses continue, the data moves from left to right (from Da to Qd). The serial
data output is taken from Qd, which is the output of the last flip-flop in the chain. This output
gives the serial data stream after all the data has been loaded and the Shift/Load control line
has been set to shift mode.

Example:
Let choose the input data as 1011 i.e., A=1, B=0, C=1 & D=1.

1. Step 1: Loading Data in Parallel

The parallel data ‘1011’ is loaded into the flip-flops D0 to D3 of the PISO shift register.

The data is assigned to the flip-flops such that D0 receives ‘1’, D1 receives ‘0’, D2 receives ‘1’,
and D3 receives ‘1’.

2. Step 2: Preparing for Serial Output

A 2-to-1 multiplexer is connected to the shift register to control the serial output.

The select line of the multiplexer is connected to the clock signal to switch between the flip-
flop outputs.

3. Step 3: Serial Output via Clock Cycles

The clock signal is used to shift the data through the flip-flops and to control the multiplexer.

With each clock pulse, data is shifted from D0 to D3, moving towards the multiplexer’s
output.

a. Clock Cycle 1: The ‘1’ from D0 is presented at the output of the multiplexer as the first
bit of the serial output.
b. Clock Cycle 2: The flip-flops shift the data. ‘0’ from D1 is now at D0 and thus at the
multiplexer output.
c. Clock Cycle 3: The ‘1’ from D2 has shifted into D1 and subsequently into D0, making it
the current bit at the multiplexer output.
d. Clock Cycle 4: Finally, the ‘1’ from D3 shifts through to D2, D1, and D0, becoming the
last bit of the serial output.

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At the end of four clock cycles, the original parallel data ‘1011’ has been read serially as
‘1011’. The use of the multiplexer in this configuration ensures that each bit is outputted in
the correct order, from the most significant bit to the least significant bit.

CLK Pulse D3 (Initial) D2 (Initial) D1 (Initial) D0 (Initial) Data Out (Q)

0 1 0 1 0 -
1 1 0 1 0 1
2 1 0 1 0 0
3 1 0 1 0 1

4 1 0 1 0 1

Timing Diagram:

Fig 7: Timing Diagram of PISO Shift Register for input 1011

This timing diagram shown in figure 7 represents the operation of a Parallel-In Serial-Out
(PISO) shift register with an input of ‘1011’. The shift register loads the data in parallel with
the first clock pulse and then shifts out the data serially with each subsequent clock pulse.
Here’s the explanation step by step:
1. At the initial clock pulse (labelled as ‘1’), the PISO shift register loads the data ‘1011’ in
parallel. This means all flip-flops (D0 to D3) are loaded with these values at once. The
first bit ‘1’ is loaded into D3, the second bit ‘0’ into D2, the third bit ‘1’ into D1, and the
fourth bit ‘1’ into D0.

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2. After the first clock pulse, the register begins shifting the data out serially with each
clock pulse.
• On the second clock pulse (labelled ‘2’), the bit in D3 (‘1’) is shifted out first. The
remaining bits shift to the right, and D0 is typically loaded with a ‘0’ because it’s a
serial input (not shown in the diagram).
• On the third clock pulse (labelled as ‘3’), the bit that was in D2 (initially ‘0’) is now
at the output. The previous ‘1’ from D3 has already been shifted out in the previous
pulse.
• On the fourth clock pulse (labelled as ‘4’), the bit that was in D1 (initially ‘1’) is now
at the output, having shifted through the register.
• After the fourth clock pulse, the bit that was in D0 (initially ‘1’) will be the next to
be shifted out.

The timing diagram shows the propagation of each bit through the shift register from the
parallel load to the serial output. The arrows indicate the data flow from one flip-flop to the
next with each clock pulse. The final data sequence shifted out serially from the PISO shift
register is ‘1011’, matching the initial parallel input.

2.2.4 Parallel -In-Parallel-Out (PIPO)

PIPO stands for Parallel-In Parallel-Out, and it refers to a type of shift register where the entire
data word is presented at the input and is transferred into the register simultaneously with a
single clock pulse. Similarly, the entire data word is available at the output simultaneously after
being clocked into the register.

Figure 8 shows a Parallel-In Parallel-Out (PIPO) shift register circuit. Here’s an explanation
of the circuit:

Parallel-In Parallel-Out (PIPO) Shift Register:

• FF1, FF2, FF3, FF4 (Flip-Flops): These are the basic storage elements in the shift
register, typically D-type flip-flops. Each flip-flop can store one bit of data.
• Inputs DA, DB, DC, DD: These are the parallel data inputs for the register. Each input
corresponds to one bit of the data word stored in the register.

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• Outputs QA, QB, QC, QD: These are the parallel data outputs of the register. They
directly represent the current state of each flip-flop, thus providing the stored data
word at the output.
• Logic 1: The inputs are directly provided with a logic high (1) level for this example,
setting the corresponding flip-flops. Since DC is connected to logic low (0), the third
flip-flop (FF3) would be reset if a clock pulse was applied.

In operation, when a clock pulse is applied to the flip-flops:

• FF1 will store the value on DA (which is 1 in this case).
• FF2 will store the value on DB (which is 1 in this case).
• FF3 will store the value on DC (which is 0 in this case).
• FF4 will store the value on DD (which is 1 in this case).

After the clock pulse, the outputs QA,QB,QC,QD will show the stored values, which in this case
would be 1101 if the diagram’s inputs reflect the data being loaded into the flip-flops. The
entire operation happens simultaneously for all bits with a single clock pulse, hence it is
called parallel-in parallel-out.

Fig 8: Circuit Diagram of PIPO Shift Register

For example, if we load the data input of 1101 into each flip-flop, the output will initially
become 0000. The input data will be shifted from input DA to QA when the first CLK pulse,
“1,” is applied. As a result, the output will become 1101.

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• Initial State (CLK Pulse = 0): Before applying the clock pulse, all flip-flop outputs are
at ‘0’. This is the reset state where QA=QB=QC=QD=0.
• After First Clock Pulse (CLK Pulse = 1): When the first clock pulse is applied, the data
inputs (1101) are loaded into the flip-flops simultaneously. This results in the output
of the flip-flops changing to reflect the input values. The output will be:
• QA=1 (from DA)
• QB=1 (from DB)
• QC=0 (from DC)
• QD=1 (from DD)

So, after the first clock pulse, the output of the register becomes 1101, which matches the
input data that was loaded into the register. This happens simultaneously for all bits because
it’s a parallel operation.

Timing Diagram
Figure 9 shows the operation of a Parallel-In Parallel-Out (PIPO) shift register. It shows how
the outputs of the register change in response to a clock pulse when the parallel input is
given as 1101. Here is what the diagram represents:
• The first line with the arrow represents the clock signal (CLK). There is one rising edge
shown, which indicates the moment at which the parallel inputs are loaded into the
register.
• The following lines represent the outputs of the flip-flops in the register: QA,QB, QC,
and QD.

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Fig 9: Timing Diagram of PIPO Shift Register

At the rising edge of the clock signal:

• QA becomes high (1) as the data input DA is 1.
• QB also becomes high (1) as DB is 1.
• QC remains low (0) since DC is 0.
• QD becomes high (1) as DD is 1.

The outputs change simultaneously with the clock’s rising edge, reflecting the parallel input
values.

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SELF-ASSESSMENT QUESTIONS – 1

1. What is the primary function of a shift register?

a) Multiplication
b) Division
c) Data storage and transfer
d) Addition
2. In a Serial-In Serial-Out (SISO) shift register, how are the data bits inputted
and outputted?
a) Parallel input, parallel output
b) Serial input, parallel output
c) Parallel input, serial output
d) Serial input, serial output
3. What type of shift register is used for converting serial data to parallel data?
a) SISO
b) SIPO
c) PISO
d) PIPO
4. In a Parallel-In Serial-Out (PISO) shift register, what happens when the
shift/load control line is set high?
a) Data is loaded in parallel.
b) Data is shifted out serially.
c) Data is cleared.
d) No change occurs.
5. Which of the following is not a type of shift register?
a) SISO
b) SIPO
c) PISO
d) FIFO

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6. What is the main advantage of using a Parallel-In Parallel-Out (PIPO) shift

register?
a) Reduces the number of required pins for data transfer.
b) Increases data transfer speed.
c) Simplifies the data transfer process.
d) All of the above.
7. How many clock pulses are needed to retrieve all the data from a 4-bit SISO
shift register?
a) 2
b) 4
c) 8
d) 16
8. What is the function of the clear (CLR) input in a shift register?
a) To shift the data
b) To load the data
c) To reset the register
d) To enable the clock
9. Which of the following is a typical use case for a SISO shift register?
a) Data storage
b) Data transfer over a single line
c) Data display
d) Parallel data processing
10. In a SISO shift register, what happens after the last bit has been shifted out?
a) The register resets automatically.
b) The register remains unchanged.
c) The register is ready to accept new data.
d) The register holds the last bit indefinitely.

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11. In a PIPO shift register, how is data typically loaded?

a) Through a single data line
b) Through multiple data lines simultaneously
c) Through a series of pulses
d) It does not require loading; it's always present

3. APPLICATIONS OF SHIFT REGISTERS

Shift registers are versatile digital circuits used in a variety of applications due to their ability
to convert between serial and parallel data formats, as well as to provide time delay to digital
signals. Here are some common applications:
1. Data Conversion: Shift registers can convert serial data to parallel data (Serial-In
Parallel-Out, SIPO) and vice versa (Parallel-In Serial-Out, PISO), making them useful in
interfacing systems that have different data transmission formats.
2. Data Storage: They provide temporary data storage for bits being shifted in or out.
This can act as a buffer or for synchronizing data streams.
3. Data Transfer: Shift registers can transfer data between different parts of a system
without bus contention issues. They are particularly useful in systems with a single data
line (serial communication).
4. Signal Delaying: By moving bits through a series of flip-flops, shift registers can create
a time delay for digital signals, with the delay time controlled by the number of stages
and the clock frequency.
5. Counting Sequences: Ring counters and Johnson counters are specialized forms of
shift registers that can create repeating sequences of bit patterns, which are useful in
timing applications and digital state machines.
6. Pattern Generation: Shift registers are used in sequence generators, which can
produce specific patterns of binary data for various control applications.
7. Digital Signal Processing (DSP): In DSP, shift registers are used for finite impulse
response (FIR) filters, where serial data streams are multiplied by coefficient data to
produce an output based on a sum of products.

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8. Bit Manipulation: They can perform simple bit manipulation tasks such as logical
operations, shifting, rotating, and more.
9. Expand I/O Ports: In microcontroller applications, shift registers can expand the
number of output or input ports, allowing a microcontroller with limited I/O to control
a larger number of devices.
10. Driving LEDs and Displays: By providing serial to parallel conversion, they can
control multiple LEDs, 7-segment displays, or matrix displays with a reduced number
of microcontroller pins.
11. Keyboard Scanning: Shift registers can scan the keys in a keyboard matrix, reducing
the number of required input pins for the microcontroller.
12. Serial to Parallel Data Conversion for Printing: In printers, shift registers are often
used to convert serial data received from computers into parallel data for the printing
head.
13. Clock Division: A shift register, especially a ring counter, can divide the frequency of a
clock signal by a factor determined by the number of flip-flops in the register.

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SELF-ASSESSMENT QUESTIONS – 2

12. In the context of printers, shift registers are used to:

a) Convert serial data from computers into parallel data for the print head
b) Store the printed documents
c) Generate ink from digital signals
d) Power the printing mechanism
13. Shift registers can perform bit manipulation tasks such as:
a) Multiplication and division
b) Shifting and rotating
c) Integration and differentiation
d) None of the above
14. Shift registers can be used for signal delaying by:
a) Amplifying the signal strength
b) Inverting the digital signal
c) Moving bits through flip-flops
d) Combining multiple data streams

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4. SUMMARY
Shift registers are fundamental components in digital circuits, used primarily for data
storage and transfer. These devices operate by shifting data through a series of flip-flops,
each flip-flop capable of storing a single bit of data. The four primary types of shift registers—
Serial-In Serial-Out (SISO), Serial-In Parallel-Out (SIPO), Parallel-In Serial-Out (PISO), and
Parallel-In Parallel-Out (PIPO)—each have unique methods of inputting and outputting data,
making them suitable for different tasks. SISO and SIPO registers are typically used for
converting between serial and parallel data formats, while PISO and PIPO registers are useful
for interfacing and data handling within digital systems.

The applications of shift registers are diverse and widespread across various fields of digital
electronics. They are instrumental in data conversion, allowing systems to communicate
effectively despite having different data transmission requirements. As temporary data
storage, they serve as buffers to align data streams or provide delay for synchronisation
purposes. In signal processing, they are key components of filters and data manipulation
tools. Shift registers enable complex functions like counting, sequence generation, and
pattern production, which are vital in control systems and user interfaces such as keyboards
and displays. Moreover, their role in expanding a microcontroller's input/output capabilities
is crucial for driving multiple devices, such as LEDs, with limited microcontroller pins. Their
multifunctionality and efficiency make shift registers indispensable in the realm of digital
electronics

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5. TERMINAL QUESTIONS
1. Define Shift registers and explicate its purpose.
2. Design 4 bit SIPO register for the input 1100.
3. Elucidate PIPO Register with a neat circuit and timing diagram.
4. Design 4 bit SISO register and obtain truth table for the same.
5. Elucidate the applications of Shift Registers

6. ANSWERS
Self-Assessment Answers
1. Data storage and transfer
2. Serial input, serial output
3. SIPO
4. Data is shifted out serially.
5. FIFO
6. Increases data transfer speed.
7. 4
8. To reset the register
9. Data transfer over a single line
10. The register is ready to accept new data.
11. Through multiple data lines simultaneously
12. Convert serial data from computers into parallel data for the print head
13. Shifting and rotating
14. Moving bits through flip-flops

Terminal Answers
1. Refer to the section 1.1
2. Refer to the section 2.2
3. Refer to the section 2.4
4. Refer to the section 2.1
5. Refer to the section 2

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