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CSE231L Project

The document presents a truth table for a project identified as 'UJr6013', detailing inputs and outputs along with their corresponding minterms and maxterms. It includes equations for both Sum of Products (SoP) and Product of Sums (PoS) representations, as well as cost analysis for different circuit types used in the implementation. The cost analysis outlines the total costs associated with various configurations of integrated circuits (ICs) for the project.

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ashiqurrahmankhan120
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9 views16 pages

CSE231L Project

The document presents a truth table for a project identified as 'UJr6013', detailing inputs and outputs along with their corresponding minterms and maxterms. It includes equations for both Sum of Products (SoP) and Product of Sums (PoS) representations, as well as cost analysis for different circuit types used in the implementation. The cost analysis outlines the total costs associated with various configurations of integrated circuits (ICs) for the project.

Uploaded by

ashiqurrahmankhan120
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Project String is “UJr6013”

●​ Truth Table:
Inputs Outputs

Character A B C a b c d e f g Minterm Maxterm

_
0 0 0 X X X X X X X A’B’C’ A+B+C

0 0 1 0 1 1 1 1 1 0 A’B’C A+B+C’

0 1 0 0 1 1 1 1 0 0 A’BC’ A+B’+C

0 1 1 0 0 0 0 1 0 1 A’BC A+B’+C’

1 0 0 1 0 1 1 1 1 1 AB’C’ A’+B+C

1 0 1 1 1 1 1 1 1 0 AB’C A’+B+C’

1 1 0 0 1 1 0 0 0 0 ABC’ A’+B’+C

1 1 1 1 1 1 1 0 0 1 ABC A’+B’+C’
GENERALIZED SoP

1)​a = AB’C’+AB’C+ABC
2)​b = ABC+ABC’+AB’C+A’BC’+A’B’C
3)​c = ABC+ABC’+AB’C+AB’C’+A’BC’+A’B’C
4)​d = ABC+AB’C+AB’C’+A’BC’+A’B’C
5)​e = A’BC+AB’C+AB’C’+A’BC’+A’B’C
6)​f = AB’C+AB’C’+A’B’C
7)​g = ABC+AB’C’+A’BC

Figure: Generalized SoP


SoP (Sum of Products)
For a: For b:

Equation of a: AC + B'C' Equation of b: A'B' + BC' + AC

For c: For d:

Equation of c: B' + C' + A Equation of d: B' + A'C' + AC


For e: For f:

Equation of e: A' + B' Equation of f: B'

For g:

Equation of g: BC + B'C'
Equation of a: AC + B'C'
Equation of b: A'B' + BC' + AC
Equation of c: B' + C' + A
Equation of d: B' + A'C' + AC
Equation of e: A' + B'
Equation of f: B'
Equation of g: BC + B'C'

Figure: Sum of Products


GENERALIZED PoS

1)​ a = (A’+B’+C).A+B’+C’).(A+B’+C).(A+B+C’)
2)​ b = (A’+B+C).(A+B’+C’)
3)​ c = (A+B’+C’)
4)​ d = (A’+B’+C).(A+B’+C’)
5)​ e = (A’+B’+C’).(A’+B’+C)
6)​ f = (A’+B’+C’).(A’+B’+C).(A+B’+C’).(A+B’+C)
7)​ g = (A’+B’+C).(A’+B+C’).(A+B’+C).(A+B+C’)

Figure: Generalized PoS


Product of Sums (PoS)

For a: For b:

Equation of a: (A)(B' + C) Equation of b: (A + B' + C')(B + C)

For c: For d:

Equation of c: (A + B' + C') Equation of d: (A + B' + C')(A' + B' + C)


For e: For f:

Equation of e: (A' + B') Equation of f: (B')

For g:

Equation of g: (B + C')(B' + C)
Equation of a: (A)(B' + C)
Equation of b: (A + B' + C')(B + C)
Equation of c: (A + B' + C')
Equation of d: (A + B' + C')(A' + B' + C)
Equation of e: (A' + B')
Equation of f: (B')
Equation of g: (B + C')(B' + C)

Figure: Products of Sums


Figure: SoP using only NAND Gates
Figure: SoP using only NOR Gates
Figure: PoS using only NAND Gates
Figure: PoS using only NOR gate
Figure: SoP using only Decoder
Figure: SoP using only Multiplexer
Cost Analysis

Circuit Type ICs Used Total Cost(TK.) Note


Generalized SoP 3x7411,3x4075,1x7404 220.02

Generalized PoS 3x7411,3x4075,1x7404, 240.25


1x7408

SoP 2x7408, 125.62


1x7432,1x4075,1x7404

PoS 1x7408, 105.44


1x7432,1x4075,1x7404

SoP Using NAND 8x7400 204.72

PoS Using NAND 8x7400 204.72

SoP Using NOR 9x7402 225.36

PoS Using NOR 7x7402, 1x7427 209.25

Decoder-Based - - -

Mux(8;1) 7x74151 280.35220.02

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