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Unit 6

The document discusses interrupts and exceptions in the 80386 microprocessor, explaining their mechanisms, types, and how they interact with the processor's execution flow. It also introduces microcontrollers, detailing their architecture, characteristics, and applications in various electronic devices. The document highlights the differences between microprocessors and microcontrollers, emphasizing the specific use cases for each in embedded systems.

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0% found this document useful (0 votes)
12 views31 pages

Unit 6

The document discusses interrupts and exceptions in the 80386 microprocessor, explaining their mechanisms, types, and how they interact with the processor's execution flow. It also introduces microcontrollers, detailing their architecture, characteristics, and applications in various electronic devices. The document highlights the differences between microprocessors and microcontrollers, emphasizing the specific use cases for each in embedded systems.

Uploaded by

temp60413412
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Unit VI

Interrupts, Exceptions, and


Introduction to Microcontrollers
Interrupts and Exceptions
The 80386 has two mechanisms for interrupting program
execution :
• Exceptions are synchronous events that are the responses of the CPU
to certain conditions detected during the execution of an instruction.
• Interrupts are asynchronous events typically triggered by external
devices needing attention.

• Both cause the processor to temporarily suspend its present program


execution in order to execute a program of higher priority.
• An exception is always reproducible by re-executing with the program and
data that caused the exception, whereas an interrupt is generally
independent of the currently executing program.
• The instruction INT generates an interrupt
whenever it is executed; the processor treats
this interrupt as an exception.
• The effects of this interrupt (and the effects of
all other exceptions) are determined by
exception handler routines provided by the
application program or as part of the systems
software (provided by systems programmers).
• Hardware Interrupts –
INTR ( Maskable) (IF – Interupt flag)
NMI ( Non-Maskable)
• Exception
Error condition like divide by zero
page fault
Identifying Interrupts
• Processor assigns numbers 0 – 31 for NMI
and exception.
• All numbers in above range are not used by
80386. some are reserved
• External interrupt controller (8259) assigns
the interrupt number (Programmable
interrupt controller - PIC)
• Range 32-255 is assigned to interrupts and
exceptions coming on INTR pin
Enable and disable the interrupt
• Interrupts received on INTR can be enabled or
disabled.
• Use of IF ( Interrupt Flag)
Enable and disable the interrupt
• Other way
– NMI Masks Further NMIs :
– IF Masks INTR
– RF Masks Debug Faults
– MOV or POP to SS Masks Some Interrupts and
Exceptions
NMI Masks Further NMIs
• While an NMI handler is executing, the
processor ignores further interrupt signals at
the NMI pin until the next IRET instruction is
executed
IF Masks INTR
• The IF (interrupt-enable flag) controls the acceptance of external interrupts signalled via the INTR pin.

• When IF=0, INTR interrupts are inhibited ; when IF=1, INTR interrupts are enabled .

• As with the other flag bits, the processor clears IF in response to a RESET signal. The

instructions CLI and STI alter the setting of IF.

• CLI (Clear Interrupt-Enable Flag) and STI (Set Interrupt-Enable Flag) explicitly alter IF (bit 9 in the flag

register).

• These instructions may be executed only if CPL <= IOPL. A protection exception occurs if they are

executed when CPL > IOPL.

• The IF is also affected implicitly by the following operations:

– The instruction PUSHF stores all flags, including IF, in the stack where they can be examined.

– Task switches and the instructions POPF and IRET load the flags register; therefore, they can be

used to modify IF.

• Interrupts through interrupt gates automatically reset IF, disabling interrupts.


RF Masks Debug Faults

• The RF bit in EFLAGS controls the recognition


of debug faults.
• This permits debug faults to be raised for a
given instruction at most once, no matter how
many times the instruction is restarted .
MOV or POP to SS Masks Some Interrupts and
Exceptions
• Software that needs to change stack segments often uses a pair of instructions;
for example:MOV SS, AX

MOV ESP, StackTop


• If an interrupt or exception is processed after SS has been changed but before ESP
has received the corresponding change, the two parts of the stack pointer SS:ESP are
inconsistent for the duration of the interrupt handler or exception handler.
• To prevent this situation, the 80386, after both a MOV to SS and a POP to SS
instruction, inhibits NMI, INTR, debug exceptions, and single-step traps at the
instruction boundary following the instruction that changes SS.

• Some exceptions may still occur; namely, page fault and general protection fault.

• Always use the 80386 LSS ( Load Pointer Using SS ) instruction, and the problem will
not occur.
Priority among Simultaneous Interrupts and
Exceptions
All fault except debug has highest priority
Trap instruction
Debug trap
Debug Fault
NMI
INTR( Lowest Priority)
Interrupt Descriptor Table (IDT)
• The interrupt descriptor table (IDT) associates each interrupt or
exception identifier with a descriptor for the instructions that
service the associated event.

• Like the GDT and LDTs, the IDT is an array of 8-byte descriptors.
• Unlike the GDT and LDTs, the first entry of the IDT may contain a
descriptor.

• To form an index into the IDT, the processor multiplies the


interrupt or exception identifier by eight.

• Because there are only 256 identifiers, the IDT need not contain
more than 256 descriptors.

• processor locates the IDT by means of the IDT register (IDTR)


• The instructions LIDT and SIDT operate on the IDTR. Both instructions
have one explicit operand: the address in memory of a 6-byte area.
• LIDT (Load IDT register) loads the IDT register with the linear base
address and limit values contained in the memory operand. This
instruction can be executed only when the CPL is zero. It is normally
used by the initialization logic of an operating system when creating an
IDT. An operating system may also use it to change from one IDT to
another.
• SIDT (Store IDT register) copies the base and limit value stored in
IDTR to a memory location. This instruction can be executed at any
privilege level
IDT Descriptors
• The IDT may contain any of three kinds of
descriptor:
– Task gates
– Interrupt gates
– Trap gates
Interrupt Tasks and Interrupt
Procedures
• Just as a CALL instruction can call either a
procedure or a task, so an interrupt or exception
can "call" an interrupt handler that is either a
procedure or a task.
• When responding to an interrupt or exception, the
processor uses the interrupt or exception
identifier to index a descriptor in the IDT.
• If the processor indexes to an interrupt gate or
trap gate, it invokes the handler in a manner
similar to a CALL to a call gate.
• If the processor finds a task gate, it causes a task
switch in a manner similar to a CALL to a task
gate.
Interrupt Procedures
Returning from an Interrupt
Procedure
• An interrupt procedure also differs from a normal procedure
in the method of leaving the procedure.
• The IRET instruction is used to exit from an interrupt
procedure.
• IRET is similar to RET except that IRET increments ESP by
an extra four bytes (because of the flags on the stack) and
moves the saved flags into the EFLAGS register.
• The IOPL field of EFLAGS is changed only if the CPL is zero.
The IF flag is changed only if CPL <= IOPL.
Error Code

•TI bit- indicates whether the error code refers to the GDT (value 0) or to the LDT (value 1)
•I-bit (IDT-bit) -if the index portion of the error code refers to a gate descriptor in the IDT.
•EXT bit- if an event external to the program caused the exception.

Error Code
With exceptions that relate to a specific segment, the processor pushes
an error code onto the stack of the exception handler (whether
procedure or task).

• The format of the error code resembles that of a selector; however,


instead of an RPL field, the error code contains two one-bit items:
– The processor sets the EXT bit if an event external to the program caused the
exception.
– The processor sets the I-bit (IDT-bit) if the index portion of the error code
refers to a gate descriptor in the IDT.

• If the I-bit is not set, the TI bit indicates whether the error code refers to
the GDT (value 0) or to the LDT (value 1). The remaining 14 bits are the
upper 14 bits of the segment selector involved. In some cases the error
code on the stack is null, i.e., all bits in the low-order word are zero.
Exception Conditions
• Faults: The CS and EIP values saved when a fault is reported point to the instruction

causing the fault.

• Traps: The CS and EIP values stored when the trap is reported point to the

instruction dynamically after the instruction causing the trap.

If a trap is detected during an instruction that alters program flow, the reported values of

CS and EIP reflect the alteration of program flow.

For example, if a trap is detected in a JMP instruction, the CS and EIP values pushed

onto the stack point to the target of the JMP, not to the instruction after the JMP.

• Aborts: An abort is an exception that permits neither precise location of the

instruction causing the exception nor restart of the program that caused the

exception. Aborts are used to report severe errors, such as hardware errors and

inconsistent or illegal values in system tables.


Introduction to Microcontrollers
What is Microcontroller ?
• A microcontroller is an electronic system which consists of a processing element, a

small memory (RAM, ROM, EPROM), I/O ports, etc. on a single chip.

• Therefore, a microcontroller is a tiny resemblance of a microcomputer.

• It is a quite small and low−cost electronic device which is used in several electronic

appliances as the main functioning device.

• In electronic systems such washing machines, air conditioners, refrigerators, etc.,

microcontrollers are used to automate the operation of the device based on user’s

instructions.

• Hence, a microcontroller is the backbone of all embedded systems like microwave oven,

washing machine, smart refrigerators, etc.

• Microprocessors find their application in light sensing and controlling devices,

temperature sensing and controlling devices, fire detection and other safety

devices, smart measuring instruments, etc.


Architecture of typical Microcontroller
Difference between
Microprocessor and Microcontroller
Characteristics of microcontrollers
• It is a small computer. It has processor and some other
components.
• Used in automatically controlled devices.
• Used in Embedded systems.
• It has less computational capacity than microprocessor. So
it is used for simpler tasks only.
• Do not have math coprocessors.
• Perform tasks – fetch, decode and execute.
• It has memory, both RAM and ROM with some other I/O
devices too.
• Power consumption is less in microcontroller.
• Optimize interrupt latency.
• Bit manipulation is powerful.
• Used to handle real time tasks and they are single
programmed, self-sufficient and task oriented.
Application of Microcontrollers
• Consumer Electronics Products – Any automatic
home appliance like Robots, Toys, Cameras, Washing
machines, Microwave Ovens, etc.
• Instrumentation and Process Control
– Multimeter, Leakage Current Tester, Oscilloscopes,
Data Acquisition and Control, etc.
• Fire Detection – Security alarm, Safety devices, etc.
• Medical Instruments – Medical machines like ECG,
Accu-Chek, etc.
• Communication technology – Telephone Sets, Cell
Phones, Answering Machines, etc.
• Multimedia Application – Mp3 Player, PDAs, etc.
• Office Machines – Fax machine, Printers, etc.
• Automobile – Auto-braking system, Speedometer,
etc.

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