Analog Circuits and Simulation Lab ECE DEPARTMENT
Exp.No.2A
CLIPPING CIRCUITS
AIM
Design and setup various clipping circuits using diodes and plot the output
waveform and transfer characteristics.
COMPONENTS & EQUIPMENTS REQUIRED
SL NO COMPONENT SPECIFICATION QUANTITY
1 PN Diode 1N4007 1
2 Zener diode SZ5.6 1
3 Resistors 3.3KΩ 1
4 CRO 1
5 DC source 1
6 Signal generator 1
7 Connecting wires
8 Bread board 1
THEORY
The property of a diode as a switching device is utilized in clipping circuits.
Clipping circuits are linear wave shaping circuits. They are useful to clip off the positive
or negative portions of an input waveform. It can also be used to slice off an input
waveform between two voltage levels. Using a positive clipper, a moderate quality square
waveform can be generated from a sine wave. The diode clippers can be classified as
series and shunt clippers. If a diode is connected in series with input in a clipper, such a
clipper is called a series clipper. If the diodes are connected in parallel with the input, that
clipper is called a shunt clipper. A resistance is used to limit the current through the
diode. The value of the series resistance used in the clipping circuits is given by the
expression :
√
Where Rf= forward resistance of the diode and Rr = reverse resistance of the diode.
1. Positive clipper with clipping level at 0.6V :
This circuit passes only negative going half cycles of the input to the output. The
entire positive half cycle is bypassed through the diode since the diode gets forward
biased when the input becomes positive. Due to the voltage drop across the diode the
clipping occurs exactly at +0.6V.
2. Negative clipper with clipping level at 0.6V :
This circuit passes only positive going half cycles of the input to the output. The
entire negative half cycle is bypassed through the diode since the diode gets forward
biased when the input becomes negative. Due to the voltage drop across the diode the
clipping occurs exactly at -0.6V.
3. Positive clipper with clipping level at +2.6V :
Analog Circuits and Simulation Lab ECE DEPARTMENT
For the diode to be forward biased anode voltage must be greater than cathode voltage. Till
the input becomes greater than +2V, diode is reverse biased and the input will appear at the
output. When the input exceeds +2V, diode becomes forward biased and the cell voltage
appears at the output. Since the diode is in series with the cell, actual clipping level is +2.6V.
4. Negative clipper with clipping level at -2.6V :
Till the input becomes less than -2V, diode is reverse biased and the input will appear at the
output. When the input is less than -2V, diode becomes forward biased and the cell voltage
appears at the output. Since the diode is in series with the cell, actual clipping level is -2.6V.
5. Positive clipper with clipping level at -1.4V :
The diode is forward biased till the input becomes less than -1.4V .Here
the cell voltage appears at the output. During the negative cycle when the input is less
than -1.4V, diode is reverse biased and input appears at the output.
6. Negative clipper with clipping level at +1.4V :
During the positive cycle when the input is greater than +1.4V, diode is
reverse biased and input appears at the output. Till the input becomes greater than
+1.4V diode is forward biased and the cell voltage appears at the output.
7. Double clipper with clipping level at +3.6V & -2.6V :
This circuit is the merging positive and negative clippers. During the positive
half cycle of the input, one branch will be effective and the other remains open and vice versa
during negative half cycle. Actual clipping levels ate +3.6V and -2.6V.
8. Positive slicer with slicing level at +1.4V & +3.6V :
This circuit allows the signal to pass to the output only between +3V and +2V.
During the negative half cycle of the input, diode D1 conducts and diode D2 gets reverse
biased. Thus the output remains at +2V. During the positive half cycle of the input, when
input exceeds +2V, D1 is reverse biased and the input appears at the output. If the output
exceeds +3V, diode D2 conducts and the output remains at +3V. Actual clipping levels ate
+1.4V and +3.6V.
DESIGN
Select 1N4007
The series resistance used for current limiting
√
Typical values of forward resistance Rf = 30 Ω and of Rr= 300 kΩ.
R=√ = 3k .Use 3.3 kΩ standard .
Analog Circuits and Simulation Lab ECE DEPARTMENT
CIRCUIT DIAGRAM, WAVEFORMS & TRANSFER CHARACTERISTICS
Analog Circuits and Simulation Lab ECE DEPARTMENT
PROCEDURE
1. Set up the circuit as per the circuit diagram.
2. Apply 10Vpp,1 KHz input sine wave to the circuit from the signal generator.
3. Observe the output wave form on the CRO. Apply the input to X channel and
output to channel Y and observe the waveforms simultaneously. Switch AC-DC
coupling switch to DC mode.
4. To observe the transfer characteristics, keep the XY mode switch pressed and
view the output.
5. Draw the output considering the diode drop.
RESULT
Various clipping circuits are studied and plotted the output waveforms and transfer
characteristics.
Analog Circuits and Simulation Lab ECE DEPARTMENT
Exp.No.2B
CLAMPING CIRCUITS
AIM
Design and setup various clamping circuits using diodes and plot the output
waveform and transfer characteristics.
COMPONENTS & EQUIPMENTS REQUIRED
SL NO COMPONENT SPECIFICATION QUANTITY
1 PN Diode 1N4007 1
2 Capacitor 1µF 1
4 CRO 1
5 DC source 1
6 Signal generator 1
7 Connecting wires
8 Bread board 1
THEORY
Clamping circuits are necessary to add or subtract a dc voltage to a given
waveform without changing the shape of the waveform. A capacitor which is charged to
a voltage and subsequently prevented from discharging can serve as a suitable
replacement for a dc source. This principle is used in clamping circuits. The clamping
level can be made at any voltage level by biasing the diode. Such a clamping circuit is
called a biased clipper.
Suppose the input voltage is represented by the expression Vmsinωt
1. Positive clamper with clamping level at 0V :
During one negative half cycle of the input sine wave, the diode conducts and
capacitor charges to Vmwith positive polarity at right side of the capacitor. During
positive half cycle of the input sine wave, the capacitor cannot discharge since the
diode does not conduct. Thus capacitor acts a dc source of Vmconnected in series
with the input signal source. The output voltage then can be expressed as Vo
=Vm+Vmsinωt .
2. Negative clamper with clamping level at 0V :
During one positive half cycle of the input sine wave, the diode conducts and
capacitor charges to Vmwith negative polarity at right side of the capacitor. During
negative half cycle of the input sine wave, the capacitor cannot discharge since
the diode does not conduct. Thus capacitor acts a dc source of Vmconnected in
series with the input signal source. The output voltage then can be expressed as
Vo =-Vm+Vmsinωt .
3. Positive clamper with clamping level at +3V :
During one negative half cycle of the input sine wave, capacitor charges through
the dc source and diode till (Vm+3) volts with positive polarity of the capacitor at the
Analog Circuits and Simulation Lab ECE DEPARTMENT
right side. The charging of the capacitor is limited to (Vm+3) volts due to the the
presence of the dc source. The output is then Vo =(Vm+3)+Vmsinωt .
4. Negative clamper with clamping level at -3V :
During one positive half cycle of the input sine wave, capacitor charges through
the dc source and diode till (Vm+3) volts with negative polarity of the capacitor at
the right side. The charging of the capacitor is limited to (Vm+3) volts due to the
the presence of the dc source. The output is then Vo =-(Vm+3) +Vmsinωt .
5. Positive clamper with clampinglevel at -3V :
During one negative half cycle of the input sine wave, capacitor charges through
the dc source and diode till (Vm-3) volts with positive polarity of the capacitor at the
right side. The charging of the capacitor is limited to (Vm-3) volts due to the the
presence of the dc source. The output is then Vo =(Vm-3) +Vmsinωt .
6. Negative clamper with clamping level at +3V :
During one positive half cycle of the input sine wave, capacitor charges through
the dc source and diode till (Vm-3) volts with negative polarity of the capacitor at the
right side. The charging of the capacitor is limited to (Vm-3) volts due to the the
presence of the dc source. The output is then Vo =-(Vm-3) +Vmsinωt .
PROCEDURE
1. Set up the circuit as per the circuit diagram.
2. Apply 10Vpp, 1 KHz input sine wave to the circuit from the signal generator.
3. Observe the output wave form on the CRO. Apply the input to X channel and
output to channel Y and observe the waveforms simultaneously. Switch AC-DC
coupling switch to DC mode.
4. To observe the transfer characteristics, keep the XY mode switch pressed and
view the output.
5. Draw the output considering the diode drop.
Analog Circuits and Simulation Lab ECE DEPARTMENT
CIRCUIT DIAGRAM, WAVEFORMS & TRANSFER CHARACTERISTICS
1. Positive clamper with clamping level at 0V
2. Negative clamper with clamping level at 0V
3. Positive clamper with clamping level at +3V
Analog Circuits and Simulation Lab ECE DEPARTMENT
4. Negative clamper with clamping level at -3V
5. Positive clamper with clamping level at -3V
6. Negative clamper with clamping level at +3V
RESULT
Various clamping circuits are studied and plotted the output waveforms and transfer
characteristics.
