Advanced
Design Verification
No Silicon Without Verification -
Become a Design Verification Engineer
www.chipxpert.in
About us
Trainers Details
ChipXpert VLSI Training
Institute is a premier institution dedicated to 15+ years of industry experience in VLSI Design
providing state-of-the-art training in Very- Verification, working with global semiconductor
leaders like NVIDIA, Qualcomm, Intel, and AMD.
Large-Scale Integration (VLSI) design and
Deep expertise in functional verification,
semiconductor technology. With our
including Testbench architecture, SystemVerilog,
commitment to bridging the gap between UVM, Constrained Random Verification, and
academic knowledge and industry Coverage-Driven Verification.
requirements, we ensure aspiring engineers Hands-on experience in verifying complex SoCs
are fully prepared for successful careers in the and IPs across multiple domains including
fast-paced semiconductor and electronics processors, memory subsystems, and high-
industry. Our programs are designed by speed interfaces.
industry veterans, integrating theoretical Proficient in developing reusable UVM
components such as drivers, monitors, agents,
foundations with practical expertise.
and scoreboards for scalable test environments.
Strong background in functional and code
Eligibility Criteria coverage analysis, SystemVerilog Assertions
(SVA), and debugging using waveform viewers
B.Tech/B.E final-year students
like DVE and SimVision.
(ECE/EEE/Instrumentation). Extensive tool knowledge in Synopsys VCS,
M.Tech/M.Sc 1st/2nd-year students Cadence Xcelium, and Mentor Questa, aligned
(VLSI/Embeded). with industry-standard verification flows.
Graduates with completed B.Tech/M.Tech degrees. Training programs are designed to bridge the
gap between academic learning and real-world
Modes of Training Offered industry demands, making learners job-ready
for roles in design verification
Classroom-Based Offline Training
Interactive Online Training Sessions
Industry-Focused Internship Program
Physical Design Course Overview
Unique Features
ChipXpert proudly introduces its
Guaranteed 100% Placement Assistance
Advanced Design Verification Course, specially
Impressive Hands-On 24/7 Labs & Projects
designed for students and professionals
Curriculum with Latest Industry Tools
aspiring to build a rewarding career in the VLSI
Corporate-Level Professional Training
front-end verification domain. This course is
Flexible Training Modes with 24/7 eLearn Access
curated by industry experts with over 15 years of
Expert Trainers and Guest Sessions
experience at top semiconductor companies
like NVIDIA, Qualcomm, Intel, and AMD. It offers
Learning Outcome comprehensive training on the complete
ASIC/SoC verification flow, covering core topics
Understand the complete ASIC/SoC verification flow.
such as SystemVerilog-based testbench
Write effective SystemVerilog testbenches using OOP
development, Object-Oriented Programming
concepts.
(OOP), Constrained Random Verification,
Implement Constrained Random Verification and
Functional Coverage, and the Universal
Coverage-Driven Verification.
Verification Methodology (UVM). Learners will
Build reusable verification environments using UVM. Phone Number
also gain expertise in writing SystemVerilog
Apply functional coverage and analyze results.
Debug simulations using industry-standard tools.
+123-456-7890
Assertions (SVA), debugging with industry tools
like Synopsys VCS, Cadence Xcelium, and
Use SVA for protocol and design checks.
Mentor Questa, and analyzing waveforms using
Gain real-time project experience to become job-
tools like DVE and SimVision.
ready.
COURSE CURRICULUM
S.No Module Name Sub-Modules
- Introduction to Electronics and MOSFET Theory
1 Introduction to Electronics, MOSFET & CMOS Theory
- Introduction to CMOS Process and Circuits
- Binary System and Boolean Algebra
2 Digital Electronics - Combinational Circuits
- Sequential Circuits – Counters, State Machines, Shift Registers
- Introduction to Unix/Linux Commands
3 Basics of UNIX/LINUX
- VI Editor Commands
- ASIC Design Flow Overview
4 Introduction to ASIC Design
- Discussion of All Design Stages: Specification to GDSII
- Verilog Basics and Syntax
- Gate-Level Modeling
5 Introduction to Verilog - Dataflow Modeling
- Behavioral Modeling
- Tasks and Functions
- DFT Basics
- Fault Modeling and Simulation
6 Introduction to DFT (Design for Testability)
- SCAN Design Concepts
- Introduction to BIST
- TCL Syntax and Variables
- Control Structures and Loops
- File I/O Operations
7 TCL Programming
- Procedures and Functions
- TCL in EDA Tools
- Best Practices
- Synthesis Flow: Inputs and Outputs
- Constraint Development
8 Synthesis
- Optimization Techniques (Unify, Preserve, Flatten)
- Wireload Models (PLE, Physical, Spatial)
- Key Parameters: Transition/Slew, Capacitance, Power Analysis
9 Static Timing Analysis (STA) - Timing Models: NLDM, CCS, ECSM, LVF
- Timing Checks: Setup, Hold, Recovery, Removal, Pulse Width, Clock Gating
- Data Types, Operators, Arrays, Structures, Unions, Enumerations
10 SystemVerilog – Core Concepts - Procedural Blocks (Initial, Always)
- Classes, Inheritance, Polymorphism, Constructors
- Interfaces & Modports (Interface, Clocking Blocks, Modports)
- Randomization (Constraints, In-line & Distribution)
11 SystemVerilog – Advanced Verification
- Functional Coverage (Covergroups, Cross Coverage, Sampling)
- Assertions (Immediate, Concurrent, Sequences)
- Why UVM?
- UVM Library Components
- Simulation Phases
12 UVM – Fundamentals
- Factory and Configuration
- Testbench Components: Agent, Driver, Sequencer, Monitor, Scoreboard
- Sequences and Sequence Items
- TLM 1.0 and 2.0 Basics
- Ports, Exports, FIFOs
- UVM Macros
- Reports and Filtering
13 UVM – Advanced Concepts
- Callbacks
- Factory Override
- Virtual Sequences
- UVM_REG: Register Models, Mirror/Update
- Using Simulators (VCS, Questa, etc.)
14 Testbench Debugging & Tools - Waveform Debugging
- Breakpoints and Watch Windows
- Coverage Plan Creation
- Analysis and Closure
15 Coverage Planning & Final Project
- (AXI, UART, etc.)
- Review and Debug Practices
Placement Process
SOFT SKILLS
PLACEMENT REGISTRATION TRAINING
MOCK INTERVIEWS WITH
INDUSTRY EXPERTS
MOCK INTERVIEW
SESSIONS
RESUME BUILDING
PLACEMENT DRIVES &
INTERVIEWS
REAL-TME INDUSTRIAL
INDUSTRY CONNECT & GUEST ENGINEERS PROJECT
CAREER GUIDANCE
SELECTED ?
COURSE COMPLETION
CERTIFICATE
JOB ONBORADING PROCESS
100+ Hiring Companies
ChipXpert VLSI Training Institute ,2nd floor, SK Residency ,Madhapur, Hyderabad, Telangana 500083
[email protected] +91 8309818310 www.chipxpert.in
