8085

INSTRUCTION SET
By
Hena Vadi
Computer Department
Instruction Set of 8085
An instruction is a binary pattern designed inside a
microprocessor to perform a specific function.
The entire group of instructions that a
microprocessor supports is called Instruction
Set.
8085 has 246 instructions.
Each instruction is represented by an 8-bit binary
value.
 These 8-bits of binary value is called Op-Code or
Instruction Byte.
Classification of Instruction Set

Data Transfer Instruction

 Arithmetic Instructions
 Logical Instructions
 Branching Instructions
 Control Instructions
1.Data Transfer Instructions

• These instructions move databetween

registers, or between memory and
registers.
• These instructions copy data fromsource
to destination(without changing the
original data ).
 MOV-Copy from source to destination
Opcode Operand
Rd, Rs
MOV M, Rs
Rd, M
 T h i s instruction copies the contents of the source
register into the destination register. (contents of the
source register are not altered)

 I f one of the operands is a memory location, its location is

specified by the contents of the HL registers.

 Example: MOV B, C or MOV B, M

BEFORE EXECUTION AFTER EXECUTION

A 20 B MOV B,A A 20 B 20

A F A F
B 30 C B 30 C
MOV M,B
D E D E
H 20 L 50 H 20 L 50 30

A F A F
B C B C 40
MOV C,M
D E D E
H 20 L 50 40 H 20 L 50 40
MVI-Move immediate 8-bit
Opcode Operand

MVI Rd, Data

M, Data

 T h e 8-bit data is stored in the destination register/rmemory.

 I f the operand is a memory location, its location

specified by the contents of the H-L registers.

 Example: MVI B, 60H or MVI M, 40H

 BEFORE EXECUTION AFTER EXECUTION

A F A F
B C MVI B,60H B 60 C
D E D E
H L H L

BEFORE EXECUTION AFTER EXECUTION

204FH 204F

HL=2050 HL=2050 40
MVI M,40H
2051H 2051H
 LDA-Load accumulator
Opcode Operand

LDA 16-bit address

 T h e contents of a memory location, specified by 16-bit

address in the operand, are copied to the accumulator.
 T h e contents of the source are notaltered.

 Example: LDA 2000H

BEFORE EXECUTION AFTER EXECUTION

A A 30
LDA 2000H
2000H
30 2000H 30
LDAX-Load accumulator indirect
Opcode Operand
LDAX B/D Register Pair

 T h e contents of the designated register pair point to a memory

location.
 T h i s instruction copies the contents of that memory location into the
accumulator.
 T h e contents of either the register pair or the memory location arenot
altered.

 Example: LDAX D
 BEFORE EXECUTION AFTER EXECUTION

A F A 80 F

B C B C 80
2030H 80 2030H
LDAX D
D 20 E 30 D 20 E 30
LXI-Load register pair immediate
Opcode Operand
LXI Reg. pair, 16-bit data

 T h i s instruction loads 16-bit data in the registerpair.

 Example: LXI H, 2030 H

 BEFORE EXECUTION LXI H , 9030h AFTER EXECUTION

A F A F

B C B C

H L H 90 L 30
LHLD-Load H and L registers direct
Opcode Operand
LHLD 16-bit address

 T h i s instruction copies the contents of memory

location pointed out by 16-bit address into register L.
 I t copies the contents of next memory location into
register H.

 Example: LHLD 2030 H

 LHLD 2030

BEFORE EXECUTION AFTER EXECUTION

A F A 80 F

B C
8500H 60
B C
2030H 00

H L 85 H 85 L 00

M=60
STA-Store accumulator direct
Opcode Operand
STA 16-bit address

 T h e contents of accumulator are copied intothe

memory location specified by the operand.

Example: STA 2000 H

 STA 2000H

BEFORE EXECUTION AFTER EXECUTION

A 50 A
50

2000H 2000H 50
STAX-Store accumulator indirect
Opcode Operand

STAX Reg. pair

 T h e contents of accumulator are copied into the

memory location specified by the contents of the
register pair.

 Example: STAX B
 STAX B
BEFORE EXECUTION AFTER EXECUTION

B 85 C 00
8500H 0A
A=0AH
SHLD-Store H and L registers direct
Opcode Operand
SHLD 16-bit address

 T h e contents of register L are stored intomemory

location specified by the 16-bit address.
 T h e contents of register H are stored into thenext
memory location.

 Example: SHLD 2550H

 SHLD 8500
BEFORE EXECUTION AFTER EXECUTION

D E
8500H 80
H 70 L 80
8501H 70
XCHG-Exchange H and L with D and E
Opcode Operand
XCHG None

 The contents of register H are exchanged with the

contents of register D.

The contents of register L are exchanged with the

contents of register E.

 Example: XCHG
BEFORE EXECUTION AFTER EXECUTION

D 20 E 40 D 70 E 80

XCHG
H 70 L 80 H 20 L 40
SPHL-Copy H and L registers to the
stack pointer
Opcode Operand

SPHL None

 T h i s instruction loads the contents of H-L pair into SP.

 Example: SPHL
 BEFORE EXECUTION

SP
H 25 L 00

SPHL
AFTER EXECUTION
SP 2500
H 25 L 00
XTHL-Exchange H and L with top of
stack
Opcode Operand
XTHL None

 T h e contents of L register are exchanged with the

location pointed out by the contents of the SP.
 T h e contents of H register are exchanged with the next
location (SP + 1).

 Example: XTHL
 L=SP
H=(SP+1)

BEFORE EXECUTION AFTER EXECUTION

SP 2700
2700H 50 SP 2700
40
2700H
H 30 L 40
H 60 L 50
2701H 60 30
2701H
XTHL
2702H 2702H
PCHL- Load program counter with H-L contents

Opcode Operand
PCHL None

 T h e contents of registers H and L are copied into the

program counter (PC).
 T h e contents of H are placed as the high-ordered
Byte and the contents of L as the low-order byte.

 Example: PCHL
PUSH-Push register pair onto stack
Opcode Operand
PUSH Reg. pair

 T h e contents of register pair are copied ontostack.

 S P is decremented and the contents of high-order

registers (B, D, H, A) are copied into stack.
 S P is again decremented and the contents of low-order
registers (C, E, L, Flags) are copied into stack.
 Example: PUSH B
PUSH H
POP- Pop stack to register pair
Opcode Operand
POP Reg. pair

 T h e contents of top of stack are copied into register

pair.
 T h e contents of location pointed out by SP are copied to the
low-order register (C, E, L, Flags).
 S P is incremented and the contents of location are
copied to the high-order register (B, D, H,A).
 Example: POP H
POP H
IN- Copy data to accumulator from a
port with 8-bit address
Opcode Operand

IN 8-bit port address

 T h e contents of I/O port are copied intoaccumulator.

 Example: IN 8C H
 BEFORE EXECUTION

PORT 10 A
80H

IN 80H
AFTER EXECUTION

PORT 10 A 10
80H
OUT- Copy data from accumulator to a
port with 8-bit address
Opcode Operand
OUT 8-bit port address

The contents of accumulator are copied into the I/O

port.

Example: OUT 78H

 BEFORE EXECUTION

PORT 10 A 40
50H

OUT 50H

AFTER EXECUTION

PORT 40 A 40
50H
2.Arithmetic Instructions
These instructions performs the operations
like:
◦ Addition

◦ Subtract

◦ Increment

◦ Decrement
ADD
Opcode Operand Description
ADD R Add register or memory to
M accumulator

 The contents of register or memory are added to the

contents of accumulator.
 The result is stored in accumulator.

 If the operand is memory location, its address is specified by H-

L pair.
Example: ADD B or ADD M
 BEFORE EXECUTION AFTER EXECUTION
A 04 A. 09

B C B. C 05
05
D E
ADD C D E
H L
H L A=A+C
04+05=09

BEFORE EXECUTION
AFTER EXECUTION

A 04 14
ADD M A
B C B C
D E
A=A+M D E
10
H 20 L 50
10 H 20 L 50

2050 04+10=14 2050

ADC
Opcode Operand Description
ADC R Add register or memory to
M accumulator with carry

 The contents of register or memory and Carry Flag (CY) are

added to the contents of accumulator.
 The result is stored in accumulator.

 If the operand is memory location, its address is specified by H-

L pair.
 All flags are modified to reflect the result of the addition.

 Example: ADC B or ADC M

 BEFORE EXECUTION AFTER EXECUTION

CY 01
A 50 A 56
B C B C 20
05 ADC C D E
D E A=A+C+CY H L
H L

50+05+01=56

BEFORE EXECUTION AFTER EXECUTION

CY 1
A 06 2050H 30 ADC M A 37 2050H 30

H 20 L 50
A=A+M+CY
H 20 L 50
06+1+30=37
 ADI
Opcode Operand Description
ADI 8-bit data Add immediate to accumulator

 The 8-bit data is added to the contents of accumulator.

 The result is stored in accumulator.

 All flags are modified to reflect the result of the addition.

 Example: ADI 45 H
BEFORE EXECUTION AFTER EXECUTION

A 03 ADI 05H A 08
A=A+DATA(8)
03+05=08
ACI
Opcode Operand Description
ACI 8-bit data Add immediate to
accumulator with carry

 The 8-bit data and the Carry Flag (CY) are added to the
contents of accumulator.

 The result is stored in accumulator.

 Example: ACI 45 H
BEFORE EXECUTION AFTER EXECUTION

CY 1
ACI 20H A 26
A 05 A=A+DATA
05+20+1=26
(8)+CY
DAD
Opcode Operand Description
DAD Reg. pair Add register pair to H-L pair

 The 16-bit contents of the register pair are added to the

contents of H-L pair.

The result is stored in H-L pair.

If the result is larger than 16 bits, then CY is set.

No other flags are changed.

Example: DAD B or DAD D

 BEFORE EXECUTION AFTER EXECUTION

D 12 E 34 D 12 E 34

H 23 L 45
DAD D H 35 L 79

1234
2345 +
------- DAD D HL=HL+DE
3579 DAD B HL=HL+BC
SUB
Opcode Operand Description
SUB R Subtract register or memory
M from accumulator

 The contents of the register or memory location are

subtracted from the contents of the accumulator.

 The result is stored in accumulator.

 If the operand is memory location, its address is specified by H-

L pair.

 Example: SUB B or SUB M

 BEFORE EXECUTION AFTER EXECUTION
A 09 A. 05

B C B. C 04
04
D E
SUB C D E
H L
H L A=A-C
09-04=05

BEFORE EXECUTION
AFTER EXECUTION

A 14 A 04
SUB M
B C B C
D E
A=A-M D E
10
H 20 L 50
10 H 20 L 50

2050 14-10=04 2050

SBB
Opcode Operand Description
SBB R Subtract register or memory from
M accumulator with borrow

 The contents of the register or memory location and Borrow

Flag (i.e. CY) are subtracted from the contents of the
accumulator.

 The result is stored in accumulator.

 If the operand is memory location, its address is specified by H-

L pair.

 Example: SBB B or SBB M

 BEFORE EXECUTION AFTER EXECUTION

CY 01
A 08 A 02
B C B C 05
05 SBB C D E
D E
H L
A=A-C-CY H L

08-05-01=02

BEFORE EXECUTION AFTER EXECUTION

CY 01
A 06 2050H 02 SBB M A 03 2050H 02

H 20 L 50 A=A-M-CY H 20 L 50

06-02-1=03
SUI
Opcode Operand Description

SUI 8-bit data Subtract immediate from

accumulator

 The 8-bit data is subtracted from the contents of the

accumulator.
 The result is stored in accumulator.
 All flags are modified to reflect the result of subtraction.
 Example: SUI 05H
BEFORE EXECUTION AFTER EXECUTION

A 08 SUI 05H A 03
A=A-DATA(8)
08-05=03
SBI
Opcode Operand Description
SBI 8-bit data Subtract immediate from
accumulator with borrow

 The 8-bit data and the Borrow Flag (i.e. CY) is subtracted
from the contents of the accumulator.
 The result is stored in accumulator.
 All flags are modified to reflect the result of subtraction.
 Example: SBI 45 H

collected by C.Gokul AP/EEE,VCET

BEFORE EXECUTION AFTER EXECUTION

CY 1 SBI 20H
A 25 A=A-DATA (8)-CY
A 04

25-20-01=04
INR
Opcode Operand Description
INR R Increment register or
M memory by 1

 The contents of register or memory location are incremented

by 1.

The result is stored in the same place.

If the operand is a memory location, its address is specified by

the contents of H-L pair.

Example: INR B or INR M

 BEFORE EXECUTION AFTER EXECUTION

A A
B 10 C INR B B 11 C
D
H
E
L
B=B+1 D
H
E
L

10+1=11
BEFORE EXECUTION AFTER EXECUTION

H 20 L 50
2050H 10 H 20 L 50
11 2050H
INR M
M=M+1 10+1=11
 INX
Opcode Operand Description
INX R Increment register pair by 1

 T h e contents of register pair are incremented by 1.

 T h e result is stored in the sameplace.

 Example: INX H or INX B or INX D

BEFORE EXECUTION AFTER EXECUTION

SP SP

B C B C
D E INX H D E
H 10 L 20 RP=RP+1 H 10 L 21

1020+1=1021
 DCR
Opcode Operand Description
DCR R Decrement register or
M memory by 1

 T h e contents of register or memory location are

decremented by 1.
 T h e result is stored in the same place.

 I f the operand is a memory location, its address is specified by

contents of H-L pair.
 Example: DCR B or DCR M
 BEFORE EXECUTION AFTER EXECUTION

A A
B C B C
D E 20
DCR E D E 19
H L R=R-1 H L

20-1=19
BEFORE EXECUTION AFTER EXECUTION

H L
H
20
L
50
2050H
21
DCR M
20 50 2050H 20
M=M-1 21-1=20
DCX
Opcode Operand Description

DCX R Decrement register pair by 1

 T h e contents of register pair are decremented by1.

 T h e result is stored in the sameplace.

 Example: DCX H or DCX B or DCX D

BEFORE EXECUTION AFTER EXECUTION

SP SP

B C B C
D E DCX H D E
H 10 L 21 RP=RP-1 H 10 L 20
3.Logical Instructions
Theseinstructions perform logical operations on data
stored in registers, memory and status flags.

The logical operations are:

◦ AND
◦ OR
◦ XOR
◦ Rotate
◦ Compare
◦ Complement
AND, OR, XOR
Any 8-bit data, or the contents of register, or
memory location can logically have
◦ AND operation
◦ OR operation
◦ XOR operation

with the contents of accumulator.

The result is stored in accumulator.
Opcode Operand Description

ANA R Logical AND register or

M memory with accumulator

 The contents of the accumulator are logically ANDed with the

contents of register or memory.
 The result is placed in the accumulator.
 If the operand is a memory location, its address is
specified by the contents of H-L pair.
 CY is reset, AC is set.
 Example: ANA B or ANA M.

collected by C.Gokul AP/EEE,VCET

 BEFORE EXECUTION 1010 1010=AAH AFTER EXECUTION
0000 1111=0FH
CY AC CY 0 AC 1
0000 1010=0AH
A AA A 0A
B 0F
10 C B 0F C
ANA B
D E D E
A=A AND R
H L H L

BEFORE EXECUTION AFTER EXECUTION

0101 0101=55H
CY AC 1011 0011=B3H CY 0 AC 1

0001 0001=11H
A 55 2050H B3 A 11 2050H B3

H 20 L 50 ANA M H 20 L 50
A=A AND M
 Opcode Operand Description

ANI 8-bit data Logical AND immediate with

accumulator

The contents of the accumulator are logically ANDed with

the 8-bit data.
The result is placed in the accumulator.
CY is reset, AC is set.
Example: ANI 86H.
BEFORE EXECUTION AFTER EXECUTION

1011 0011=B3H
0011 1111=3FH

0011 0011=33H

CY AC CY 0 AC 1
ANI 3FH
A B3 A=A AND DATA(8) A 33
Opcode Operand Description
ORA R Logical OR register or memory with
M accumulator

 The contents of the accumulator are logically ORed with

the contents of the register or memory.

 The result is placed in the accumulator.

 If the operand is a memory location, its address is specified

by the contents of H-L pair.

 CY and AC are reset.

 Example:ORA B or ORA M.
 1010 1010=AAH
0001 0010=12H
BEFORE EXECUTION AFTER EXECUTION
1011 1010=BAH

CY AC CY 0 AC 0

ORA B
A=A or R

A AA A BA
B 12 C B 12 C
D E D E
H L H L
 0101 0101=55H
1011 0011=B3H
BEFORE EXECUTION AFTER EXECUTION
1111 0111=F7H

CY AC CY 0 AC 0

ORA M
A=A or M
A 55 2050H B3 A F7 2050H B3
H 20 L 50 H 20 L 50
Opcode Operand Description

ORI 8-bit data Logical OR immediate with

accumulator

The contents of the accumulator are logically ORed with the

8-bit data.
The result is placed in the accumulator.
CY and AC are reset.
Example: ORI 86H.
 1011 0011=B3H
0000 1000=08H

BEFORE EXECUTION 1011 1011=BBH AFTER EXECUTION

CY AC CY 0 AC 0
ORI 08H
A B3 A=A or DATA(8) A BB
Opcode Operand Description

XRA R Logical XOR register or

M memory with accumulator

The contents of the accumulator are XORed with the

contents of the register or memory.
The result is placed in the accumulator.
If the operand is a memory location, its address is specified
by the contents of H-L pair.
CY and AC are reset.
Example: XRA B or XRA M.
 1010 1010=AAH
BEFORE EXECUTION 0010 1101=2DH AFTER EXECUTION
1000 0111=87H

CY AC CY 0 AC 0

A AA A 87
B 10 C 2D B C 2D
D E XRA C D E
H L A=A xor R H L
 0101 0101=55H
BEFORE EXECUTION 1011 0011=B3H AFTER EXECUTION
1110 0110=E6H

CY AC CY 0 AC 0
XRA M
2050H B3 A E6 2050H B3
A 55
A=A xor M
H 20 L 50 H 20 L 50
Opcode Operand Description

XRI 8-bit data XOR immediate with

accumulator

The contents of the accumulator are XORed with the 8-bit

data.
The result is placed in the accumulator.
CY and AC are reset.
Example: XRI 86H.
 1011 0011=B3H
0011 1001=39H

BEFORE EXECUTION 1000 1010=8AH AFTER EXECUTION

CY AC CY 0 AC 0
XRI 39H
A B3 A=A xor DATA(8) A 8A
Compare
Any8-bit data, or the contents of register, or
memory location can be compares for:
◦ Equality
◦ Greater Than
◦ Less Than

with the contents of accumulator.

The result is reflected in status flags.
Opcode Operand Description
CMP R Compare register or
M memory with accumulator

The contents of the operand (register or memory) are

compared with the contents of the accumulator.

Both contents are preserved .

 BEFORE EXECUTION AFTER EXECUTION
A>R: CY=0
CY Z A=R: ZF=1 CY 01 Z 0
A<R: CY=1
A 10 A 10
B 10 C B C
D 20 E
CMP D D 20 E
H L A-R H L

10<20:CY=01
BEFORE EXECUTION AFTER EXECUTION
A>M: CY=0
A=M: ZF=1
CY Z A<M: CY=1 CY 0 Z 1
A B8 2050H B8 A B8 2050H B8
CMP M
H 20 L 50 H 20 L 50
A-M
B8=B8 : ZF=01
Opcode Operand Description

CPI 8-bit data Compare immediate with

accumulator

The 8-bit data is compared with the contents of accumulator.

The values being compared remain unchanged .

BEFORE EXECUTION AFTER EXECUTION
A>DATA: CY=0
A=DATA: ZF=1
A<DATA: CY=1

CY Z CY 0 Z
CPI 30H
A BA
A-DATA A BA

BA>30 : CY=00
Rotate
Each bit in the accumulator can be shifted either
left or right to the next position.
Opcode Operand Description
RLC None Rotate accumulator left

Each binary bit of the accumulator is rotated left by one

position.
Bit D7 is placed in the position of D0 as well as in the Carry
flag.
CY is modified according to bit D7.
Example: RLC.
 BEFORE EXECUTION

CY B7 B6 B5 B4 B3 B2 B1 B0

AFTER EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 B7
Opcode Operand Description
RRC None Rotate accumulator right

Each binary bit of the accumulator is rotated right by one

position.
Bit D0 is placed in the position of D7 as well as in the Carry
flag.
CY is modified according to bit D0.
Example: RRC.
 BEFORE EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 CY

AFTER EXECUTION

B0 B7 B6 B5 B4 B3 B2 B1 B0
Opcode Operand Description
RAL None Rotate accumulator left
through carry

Each binary bit of the accumulator is rotated left by one

position through the Carry flag.

Bit D7 is placed in the Carry flag, and the Carry flag is placed
in the least significant position D0.

CY is modified according to bit D7.

Example: RAL.
 BEFORE EXECUTION

CY B7 B6 B5 B4 B3 B2 B1 B0

AFTER EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 CY
Opcode Operand Description
RAR None Rotate accumulator right
through carry

Each binary bit of the accumulator is rotated right by one

position through the Carry flag.
Bit D0 is placed in the Carry flag, and the Carry flag is placed in
the most significant position D7.
CY is modified according to bit D0.
Example: RAR.
 BEFORE EXECUTION

B7 B6 B5 B4 B3 B2 B1 B0 CY

AFTER EXECUTION

CY B7 B6 B5 B4 B3 B2 B1 B0
 Opcode Operand Description

CMA None Complement accumulator

The contents of the accumulator are complemented.

No flags are affected.

 Example: CMA. A=A’

BEFORE EXECUTION AFTER EXECUTION

A 00 A FF
Opcode Operand Description
CMC None Complement carry

The Carry flag is complemented.

No other flags are affected.

Example: CMC => c=c’

BEFORE EXECUTION AFTER EXECUTION

C 0 C 1
Opcode Operand Description
STC None Set carry

The Carry flag is set to 1.

No other flags are affected.
Example: STC CF=1
Branching Instructions
The branch group instructions allows the
microprocessor to change the sequence of program
either conditionally or under certain test conditions. The
group includes,

(1) Jump instructions,

(2) Call and Return instructions,

(3) Restart instructions,

Opcode Operand Description
JMP 16-bit Jump unconditionally
address

The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand.
Example: JMP 2034 H.
Unconditional Jump
• JMP address

• Symbolic Representation:

• (PC) <- (Byte 3)(Byte 2)

• Two Types of Jump:

• Forward Jump
• Backward Jump
Unconditional Jump
• Forward Jump:
• JMP Next
• ….
• ….
• ….
• Next : ADD B

• Backward Jump:
• Next : ANA C
• ….
• ….
• ….
• JMP Next
Conditional JUMP
• Transfer control to specific instruction if Condition is
Fulfilled, otherwise control transfer to next instruction.

• Flags Provides the Various Conditions for Conditional

Jump.

• Symbolic Representation:
• If Condition is True
• Then PC <- (Byte3)(Byte 2)
Conditional Jump
• Forward Jump: Backward Jump:
• CMP B • Next : INX H
• JC Next • ….
• MOV A,B • ….
• ….
• DCR C
• JNZ Next
• ….
• MOV M,A
• Next : MOV M,A
• …..
Opcode Operand Description

Jx 16-bit Jump conditionally

address

The program sequence is transferred to the memory location

specified by the 16-bit address given in the operand based on
the specified flag of the PSW.
Example: JZ 2034 H.
 Jump Conditionally

Opcode Description Status Flags

JC Jump if Carry CY = 1

JNC Jump if No Carry CY = 0

JZ Jump if Zero Z=1

JNZ Jump if No Zero Z=0

JPE Jump if Parity Even P=1

JPO Jump if Parity Odd P=0

Opcode Operand Description

CALL 16-bit Call unconditionally

address

The program sequence is transferred to the memory

location specified by the 16-bit address given in the operand.
Before the transfer, the address of the next instruction after
CALL (the contents of the program counter) is pushed onto
the stack.
Example: CALL 2034 H.
 Call Conditionally
Opcode Description Status Flags
CC Call if Carry CY = 1

CNC Call if No Carry CY = 0

CP Call if Positive S=0

CM Call if Minus S=1

CZ Call if Zero Z=1

CNZ Call if No Zero Z=0

CPE Call if Parity Even P=1

CPO Call if Parity Odd P=0

Opcode Operand Description
RET None Return unconditionally

The program sequence is transferred from the subroutine

to the calling program.
The two bytes from the top of the stack are copied into the
program counter, and program execution begins at the new
address.
Example: RET.
 Return Conditionally
Opcode Description Status Flags
RC Return if Carry CY = 1

RNC Return if No Carry CY = 0

RP Return if Positive S=0

RM Return if Minus S=1

RZ Return if Zero Z=1

RNZ Return if No Zero Z=0

RPE Return if Parity Even P=1

RPO Return if Parity Odd P=0

Unconditional Call and Return
•…
•…
• CALL Task
•…
•…
• Task : MOV A,M
•…
•…
• RET
Conditional Call and Return
•…
•…
• CZ Task
•…
•…
• Task : MOV A,M
•…
•…
• RNZ
Opcode Operand Description

RST 0–7 Restart (Software Interrupts)

The RST instruction jumps the control to one of eight memory

locations depending upon the number.
These are used as software instructions in a program to
transfer program execution to one of the eight locations.
Example: RST 1 or RST 2 ….
Instruction Code Vector Address
RST 0 0*8=0000H
RST 1 1*8=0008H
RST 2 2*8=0010H
RST 3 3*8=0018H
RST 4 4*8=0020H
RST 5 5*8=0028H
RST 6 6*8=0030H
RST 7 7*8=0038H
5. CONTROL INSTRUCTIONS
 The control instructions control the operation of
microprocessor.
Opcode Operand Description
NOP None No operation

No operation is performed.
The instruction is fetched and decoded but no operation is
executed.
Example: NOP
Opcode Operand Description
HLT None Halt

The CPU finishes executing the current instruction and halts

any further execution.
An interrupt or reset is necessary to exit from the halt state.
Example: HLT
Opcode Operand Description
DI None Disable interrupt

The interrupt enable flip-flop is reset and all the interrupts

except the TRAP are disabled.
No flags are affected.
Example: DI
Opcode Operand Description
EI None Enable interrupt

The interrupt enable flip-flop is set and all interrupts are

enabled.
No flags are affected.
This instruction is necessary to re-enable the
interrupts (except TRAP).
Example: EI
Opcode Operand Description
RIM None Read Interrupt Mask

This is a multipurpose instruction used to read the status of

interrupts 7.5, 6.5, 5.5 and read serial data input bit.
The instruction loads eight bits in the accumulator with the
following interpretations.
Example: RIM
RIM Instruction
Opcode Operand Description
SIM None Set Interrupt Mask

This is a multipurpose instruction and used to implement the

8085 interrupts 7.5, 6.5, 5.5, and serial data output.
The instruction interprets the accumulator contents as
follows.
Example: SIM
SIM Instruction
Reference
 www.slideshare.net
 www.nptel.ac.in
 www.scribd.com
 http://opencourses.emu.edu.tr
 www.4shared.com
 www.eazynotes.com

Books:
Microprocessors and microcontrollers by krishnakanth