Digital Design Synchronous Sequential PDF
Digital Design Synchronous Sequential PDF
LOGIC DESIGN
Fall 2014
1 By Wessam El-Behaidy
Assistant Professor ,
Computer Science Department
REMEMBER OUR RULES
2
SYNCHRONOUS SEQUENTIAL
LOGIC
3 Lecture 9
SEQUENTIAL CIRCUIT
Feedback path
The state of sequential circuit defined by:
The binary information stored in memory elements
at any given time
The outputs in a sequential circuit is a function
of:
Inputs
Section 5.2
Present state 4
MAIN TYPES OF SEQUENTIAL CIRCUITS
Synchronous sequential circuit
Asynchronous sequential circuit
Section 5.2
5
SYNCHRONOUS SEQUENTIAL CIRCUITS
Synchronous circuit that use clock pulses to control
storage elements
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CLOCKED SEQUENTIAL CIRCUITS
Synchronous circuit that use clock pulses to
control storage elements is called clocked
sequential circuits
Also called Synchronous circuit, because
updating in storage element is synchronized to
the occurrence of clock pulses
Section 5.2
7
SYNCHRONOUS CLOCKED SEQUENTIAL
CIRCUIT
Clock
Section 5.2
(clk)
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STORAGE ELEMENTS
Various types:
Latches: operate with signal level
Flip-flops: controlled by a clock transition
They differ in :
the number of inputs they possess and
The manner in which the inputs affect the binary
state
Latches are the basic circuits from which the flip-
flops are constructed
Section 5.3
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Q=1 set state Q=0 Reset state
Q Q Q
Q’ Q’ Q’
Section 5.3
10
NAND: (x.0)’=1
(x.1)’=x’
Control input
Section 5.3
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TRIGGER
The state of a latch or flip-flop is switched by a
change in the control input, this momentary
change is called a trigger.
Section 5.4
12
D LATCH TRIGGER
The D latch with pulses in the control input is
triggered every time the pulse goes to the logic 1.
Section 5.4
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LATCH PROBLEM
Section 5.4
The result is an unpredictable situation, 14
Section 5.4
15
FLIP-FLOPS
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A FLIP-FLOP FROM A LATCH
Section 5.4
2. Is disabled during the rest of the clock pulse 17
MASTER-SLAVE EDGE –TRIGGERED D
FLIP-FLOP
Constructed with 2 D latches and an inverter
First latch: called master, Second latch: called slave
Section 5.4
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BEHAVIOR OF MASTER-SLAVE FLIP-FLOP
Its behavior dictates that:
The output may change once
A change in the output is triggered by the negative
edge of the clock
The change may occur only during the clock’s
negative level
Note :
The value that is produced at the output is that
value that as stored in the master stage
immediately before the negative edge occurred
Can we design the circuit to be triggered by
Section 5.4
positive edge? 19
GRAPHICAL SYMBOL FOR EDGE-TRIGGERED
D FLIP-FLOP
Section 5.4
20
JK FLIP-FLOP Next state
K Present state
D=JQ’ + K’Q
Q
J 1 Q’
Section 5.4
21
Why D flip-flop ?
T FLIP-FLOP
Section 5.4
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CHARACTERISTIC EQUATIONS
The logical properties of a flip-flop, described in the
characteristic table, can be expressed algebraically
D flip-flop
Q(t+1)= D
JK flip-flop
Section 5.4
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ASYNCHRONOUS SEQUENTIAL CIRCUIT:
DIRECT INPUTS
Some flip-flops have asynchronous inputs that are
used to force the flip-flop to a particular state
independently of the clock
The input that set the flip flop to 1 is called preset or
direct set
The input that set the flip flop to 0 is called clear or
direct reset
When power is turned on in a digital system, the
state of the flip-flop is unknown
The direct inputs are useful for bringing all flip-flops to
a known state prior the clocked operation
Section 5.4
24
D-FLIP-FLOP WITH ASYNCHRONOUS RESET
0
1
1
Error in book
Section 5.4
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ANALYSIS OF CLOCKED SEQUENTIAL
CIRCUITS
Section 5.5
describe the behavior of the sequential circuit 26
state equations (state equation)
STATE EQUATIONS
The sequential
circuit consists of:
Two D flip-flops (A and B)
An input x
An output y
Determine next state
of D flip-flops:
A(t+1)= A(t)x(t) +B(t) x(t)
B(t+1) = A’(t) x(t)
The present state of
the output y: State equation
Section 5.5
specifies the next state as
y(t)= [A(t)+B(t)]x’(t) a function of the present state
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and inputs
STATE TABLE
1. The state equations:
A(t+1)= Ax +B x
B(t+1) = A’ x
2 flip-flops:
2. y= (A+B)x’ A and B
1 Based on
Section 5.5
state equations 28
1
1
TWO FORMS OF STATE TABLE
Section 5.5
29
STATE DIAGRAM
The information available in a state table can be
represented graphically in the form of a state
diagram Input/output
Present state
Section 5.5
We have 2 flip-flops 30
we have 22 states (= 4 )
we have 4 circles (=present states)
FLIP-FLOP INPUT EQUATIONS
Output equations:
A set of Boolean functions describes the part of the
combinational circuit that generates external outputs
Flip-flop Input equations (excitation equations):
A set of Boolean functions describes the part of the circuit
that generates the inputs to the flip-flops
Ex: DQ= x+y
The following input equation specifies an OR gate with
inputs x and y connected to D input of a flip-flop whose
output is labeled with the symbol Q
Previous example (fig. 5.15)
DA= Ax +Bx
Section 5.5
DB = A’ x
y= (A+B)x’
ANALYSIS WITH D FLIP-FLOPS
DA= A + x + y
Section 5
32
Section 5.5
33
MEALY MODELS EXAMPLE
Input/output
Present state
Section 5.5
34
MOORE MODELS EXAMPLE1
Section 5.5
35
MOORE MODELS EXAMPLE2
Section 5.5
36
THANKS
We covered from:
Ch.5 (5.2-5.4)
Assignment Ch5: 1, 2, 3, 4, 5, 6, 7
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