DIGITAL FUNDAMENTALS AND COMPUTER ARCHITECTURE

UNIT – 1

ARITHMETIC CIRCUITS

Half Adder:

1. Introduction

 An adder is a digital circuit that performs the arithmetic operation of addition.

 A Half Adder (HA) is the simplest type of adder, which can add two single-bit
binary numbers.
 It is called a “half” adder because it does not handle carry input from a previous
stage. For multi-bit addition, we need a Full Adder.

2. Inputs and Outputs of Half Adder

 Inputs: Two binary digits → A and B

 Outputs:
o SUM (S) → Result of A ⊕ B (XOR operation)
o CARRY (C) → Result of A · B (AND operation)

3. Truth Table of Half Adder

Input A Input B SUM (A ⊕ B) CARRY (A · B)

0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
4. Logic Expressions

 SUM (S) = A ⊕ B
 CARRY (C) = A · B

5. Logic Circuit of Half Adder

 The SUM is obtained using an XOR gate.

 The CARRY is obtained using an AND gate.

6. Block Diagram

Circuit Diagram:
7. Applications of Half Adder

 Used in digital calculators and computers for binary addition.

 Acts as the basic building block for more complex adders (Full Adder, Ripple Carry
Adder, etc.).
 Used in Arithmetic Logic Units (ALUs) in processors.

8. Limitations of Half Adder

 Cannot add more than two bits directly.

 Cannot consider the previous carry (which is essential in multi-bit addition).
➡That’s why we need the Full Adder

Full Adder (FA)

1. Introduction

 A Full Adder is a combinational logic circuit used to add three binary digits.
 Unlike a Half Adder (which adds only two bits), the Full Adder can include the Carry
from the previous stage, making it suitable for multi-bit binary addition.
 It is widely used in digital computers, ALUs, and processors for performing
arithmetic operations.
2. Inputs and Outputs

 Inputs:
o A = First binary digit
o B = Second binary digit
o Cin = Carry input (from a previous addition)
 Outputs:
o SUM (S) → Final sum bit of the addition
o CARRY (Cout) → Carry output generated by the addition

3. Truth Table of Full Adder

A B Cin SUM (S) CARRY (Cout)

0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

4. Logic Expressions

From the truth table:

 SUM (S) = A ⊕ B ⊕ Cin

(XOR of all three inputs)
 CARRY (Cout) = (A·B) + (B·Cin) + (A·Cin)
(Carry is generated when at least two inputs are 1)
5. Logic Circuit Explanation

 Step 1: XOR gate adds A and B → produces an intermediate sum.

 Step 2: This result is XORed with Cin → gives final SUM.
 Step 3: Carry is produced by AND + OR gates from the combinations of (A,B),
(B,Cin), (A,Cin).

Thus, the Full Adder requires:

 2 XOR gates
 2 AND gates
 1 OR gate

6. Logic Circuit Diagram

7. Block Diagram
8. Applications of Full Adder

 Used in multi-bit binary addition (by cascading multiple Full Adders → Ripple
Carry Adder).
 Essential part of Arithmetic Logic Unit (ALU) in CPUs.
 Used in digital calculators and embedded systems.
 Basis for designing multipliers, subtractors, and other arithmetic circuits.

9. Limitations of Full Adder

 When multiple Full Adders are connected to add long binary numbers, the carry has
to propagate through each stage, causing propagation delay.
 This delay becomes significant in large adders (solution: use advanced adders like
Carry Look-Ahead Adder).

Parallel Binary Adder

1. Introduction

 A Parallel Binary Adder is a combinational circuit used to add two multi-bit binary
numbers simultaneously.
 It is constructed by connecting multiple Full Adders in parallel, where each Full
Adder handles a pair of corresponding bits along with the carry from the previous
stage.
  Example: To add two 4-bit numbers, we need 4 Full Adders connected in parallel.

2. Basic Concept

 Suppose we want to add two binary numbers:

o A = A₃ A₂ A₁ A₀
o B = B₃ B₂ B₁ B₀
 Each bit pair (Aᵢ, Bᵢ) is added using a Full Adder.
 The carry output from each stage is passed as carry input to the next stage.
 The final carry-out (C₄) represents the overflow (if any).

3. Block Diagram of a 4-bit Parallel Binary Adder

 FA0, FA1, FA2, FA3 are Full Adders connected in series.

 This arrangement is also known as a Ripple Carry Adder.

4. Working Principle

1. The least significant bits (LSB) A₀ and B₀ are added by FA0, along with Cin
(usually 0).
2. FA0 produces Sum bit S₀ and Carry C₀.
3. The carry C₀ is passed to FA1 as Cin, which adds A₁, B₁, and C₀.
 4. This process continues until the most significant bit (MSB) is added by FA3.
5. The final carry (C₄) indicates overflow if present.

5. Truth Table Concept (2-bit Example)

For a 2-bit adder (A₁A₀ + B₁B₀):

Sum Carry
A₁A₀ B₁B₀
(S₁S₀) (Cout)
00 00 000 0
01 01 010 0
10 11 101 0
11 11 110 1

(This can be extended to 3-bit, 4-bit, etc.)

6. Applications

 Widely used in:

o Digital Computers for arithmetic operations.
o ALUs for multi-bit binary addition.
o Multipliers and Subtractors (as part of larger arithmetic circuits).
o Embedded systems where multi-bit addition is required.

7. Advantages

 Can add binary numbers of any length (by cascading more Full Adders).
 Simple design (only uses Full Adders).
8. Limitations

 Ripple Carry Delay:

o Each Full Adder must wait for the carry from the previous stage.
o For n-bit numbers, the delay increases linearly with n.
o Example: In a 32-bit adder, the final sum may take long to stabilize.
 To overcome this, advanced adders like Carry Look-Ahead Adder (CLA) are used.

BCD Adder (Binary-Coded Decimal Adder)

1. Introduction

 BCD (Binary-Coded Decimal) represents each decimal digit (0–9) using a 4-bit
binary code.
 Example:
o Decimal 5 → BCD = 0101
o Decimal 9 → BCD = 1001
 A BCD Adder is a digital circuit that adds two decimal digits in BCD representation.
 Since normal binary addition may produce results greater than 9 (1001 in binary), a
correction mechanism is required.

2. Why Normal Binary Addition Fails for BCD

 BCD digits must always be in the range 0000 (0) to 1001 (9).
 If binary addition gives a result greater than 1001 (9), the result is not a valid BCD
digit.
 Example:
 1001 (9)

 0100 (4)
= 1101 (13) → INVALID in BCD
  To correct this, we must add 0110 (6) to the result.

3. Correction Rule in BCD Addition

After binary addition of two BCD digits:

 If Sum ≤ 1001 (9) and no carry, the result is already valid.

 If Sum > 1001 (9) OR there is a carry-out from the addition:
o Add 0110 (6) to the sum.
o This produces the correct BCD digit, and generates a carry for the next higher
decimal place.

4. Working Example

Example: Add 7 (0111) and 8 (1000) in BCD.

1. Binary addition:
2. 0111 (7)

 1000 (8)
= 1111 (15) → INVALID in BCD

2. Since result > 1001, add correction factor (0110):

3. 1111

 0110
= 1 0101
 → Carry = 1, Result = 0101 (5)
 → Final Answer = 15 in BCD (Carry = 1, Digit = 5).

5. Block Diagram of BCD Adder

A BCD adder can be constructed using:

  4-bit Binary Adder (to add two BCD digits).
 Correction Logic (checks if result > 9 or if carry is 1).
 Second 4-bit Adder (adds 0110 for correction if needed).

Block Diagram

Circuit Diagram:
6. Truth Table (Correction Requirement)

Binary
Carry Out Correction Needed?
Sum
0000–1001 0 No
1010–1111 0 Yes (Add 0110)
0000–1001 1 Yes (Add 0110)

7. Applications of BCD Adder

 Used in digital calculators for decimal arithmetic.

 Used in financial, accounting, and business systems, where decimal precision is
required.
 Used in digital watches, counters, and measurement devices.

8. Advantages

 Provides decimal accuracy (useful in business applications).

 Compatible with decimal display devices like 7-segment displays.

9. Limitations

 More complex than binary adders (needs correction logic).

 Slower due to extra addition step (adding 0110 when required).