Alexandria University

Faculty of Engineering,
Electrical Power and Machines Department

High Efficiency Ultra-Fast Charger for Electric

Vehicle Applications: Optimization Strategies via
Reinforcement Learning

Supervised by
Prof. Dr. Ahmed Adel
Prof. Dr. Abd-Elrahman Farghly

Abd-Elrahman Magdi Ahmed Zaki

Abd-Elrahman Muhammed ElSaad Abd-ELlatif Muhammed Abd-ELlatif
Kareem Muhammed Metwally Abd-Elrahman Mahmoud Abdo Hafez
Mahmoud Muhammed Nabil Nourhan Arabi Khattab Abd-ELlatif
Noureldin Hossam Abd-ELlatif Sara Elsayed Taha Abd-Elrazek
Noureldin Ayman Ramadan Dina Ahmed Hussien Fawzy

Academic Year 2025/2026

Table of Contents
Forward iii
Preface iv
Acknowledgments v
1 AC/DC Conversion 1
1.1 Introduction to AC/DC Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 What is Rectification? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3 Topologies for AC/DC Conversion Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.3.1 Totem Pole Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1. Totem Pole Rectifier PFC Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2 Implementation of Closed-Loop AC/DC Converter 3
2.1 The Main Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2 Proportional Integral (PI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2.1 P-Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2.2 I-Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.2.3 Tuning of PI Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.3 Voltage Control Loop (PLL + Voltage PI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.4 Current Control Loop (Current PI + PWM Generation) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.5 Digital Implementation Details (Rate Transition, Timing) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.6 Design Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.6.1 Inductor Sizing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.6.2 Capacitor Sizing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2.6.3 Duty Cycle, ILmax , ∆IL Formulas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
3 Simulation Setup and Analysis 5
3.1 Simulink Implementation Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.2 Measured Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.3 Dashboard Visualization and Performance Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 DC/DC Conversion 6
4.1 Introduction to DC/DC Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2 Dual Active Bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2.2 Circuit Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2.3 Principle Of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2.4 Design Steps and Calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2.5 Simulation Using MATLAB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.2.6 Hardware Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

ii
Forward
In the accelerating global shift towards electric mobility, providing efficient and rapid charging solutions
for Electric Vehicles (EVs) has become an imperative. Off-board chargers represent the cornerstone of
this infrastructure, with their efficiency, reliability, and speed directly impacting the widespread adoption
of EVs. This innovative research and engineering project addresses a pivotal challenge in this domain:
the design and development of a high-performance charger that leverages state-of-the-art technologies to
ensure maximum efficiency and minimal energy loss.

This work sheds light on the advanced integration between the Power Factor Correction (PFC)
stage, utilizing the advanced Totem Pole topology, and the DC-DC conversion stage, implemented
through a Dual Active Bridge (DAB) converter. What truly distinguishes this project is the pioneering
application of Reinforcement Learning techniques to optimize the performance of the DAB con-
verter, whether through the optimal adjustment of its phase shift or the overall tuning of its behavior.
This approach represents a qualitative leap towards achieving unprecedented efficiency and excellent
dynamic response.

Beyond the theoretical and control aspects, this project also emphasizes the critical role of hardware
implementation and PCB design. The successful integration of these complex power electronics
stages, along with their control and sensing circuits, relies heavily on meticulously engineered PCB
boards. This ensures robust operation, minimizes parasitic effects, and facilitates seamless communi-
cation between components. The efforts invested in this project extend beyond theoretical aspects,
encompassing practical and applied considerations, thereby offering a valuable contribution to the field
of designing intelligent and sustainable electric vehicle charging systems. We hope that the results and
recommendations derived from this work will serve as a valuable reference for researchers and engineers
operating in this vital field.

iii
Preface
This research project, culminating our efforts in the field of electrical power engineering, represents
a serious and innovative endeavor to develop advanced solutions for electric vehicle charging. With
the continuous increase in EV adoption worldwide, there is a pressing need for charging infrastructure
characterized by high efficiency, speed, and reliability. Challenges related to efficiency and power
quality in fast-charging systems have long posed an obstacle to the widespread proliferation of these
vehicles.

Our project has focused on addressing these challenges through the design and development of a high-
power off-board EV charger that integrates two pivotal technologies: a Power Factor Correction
(PFC) stage using a Totem Pole circuit for highest efficiency and power quality from the grid, and
a DC-DC conversion stage embodied by the Dual Active Bridge (DAB) converter. The DAB
converter is renowned for its high power transfer capability and excellent efficiency, as well as its
bidirectional power transfer ability, making it ideal for fast-charging applications.

The most innovative aspect of this project is our application of Reinforcement Learning. We have
employed this advanced technique to optimize the performance of the DAB converter, specifically for
the optimal control of its phase shift or for dynamically tuning other converter parameters. This ap-
proach aims to achieve maximum efficiency and minimize energy losses across a wide range of operating
conditions, representing a significant advancement over traditional control methods.

Crucially, this project also involved comprehensive PCB design and hardware realization. The
intricate interplay between the Totem Pole PFC, the DAB converter, the sophisticated control algorithms
driven by Reinforcement Learning, and various sensing circuits necessitated the meticulous design of
custom PCB boards. This hardware integration was key to ensuring accurate signal integrity, efficient
power flow, thermal management, and overall system stability, translating theoretical concepts into a
tangible, high-performance prototype. We hope this work provides a valuable contribution to the
field of EV charging system design and serves as a stepping stone for future research exploring further
innovations in this vital domain.

iv
Acknowledgments
First and foremost, our profound gratitude goes to our esteemed mentors, Prof. Dr. Ahmed Adel and
Prof. Dr. Abd-Elrahman Farghly. Their continuous inspiration, invaluable guidance, and
unwavering support were instrumental in the successful completion of this project. They consistently
encouraged us to think creatively and tackle challenges without hesitation. Their vast knowledge,
extensive experience, and professional competence in the automotive field were a constant source
of enlightenment, making this endeavor possible. We couldn’t have asked for finer mentors throughout
our studies.

We also extend our sincere thanks to the Academy of Scientific Research and Technology (ASRT)
- Egypt for their generous support and crucial funding of this project. Their provision of essential
and vital equipment was indispensable, enabling us to perform our work efficiently and achieve our
objectives.

Lastly, but certainly not least, we express our deepest appreciation to our families, colleagues, and
friends. Their unwavering encouragement, invaluable assistance, and understanding through-
out this journey were truly uplifting. We are profoundly grateful to everyone who contributed, directly
or indirectly, to the successful completion of this project.

v
 Part I

AC/DC Conversion

1
AC/DC Conversion

1.1 Introduction to AC/DC Conversion

The global landscape of electrical power is characterized by varying standards, with wall outlets
supplying either 50Hz or 60Hz Alternating Current (AC) at voltages around 120VAC or 230VAC. Despite
the widespread use of low-voltage Direct Current (DC) in modern electronic devices like phones and
laptops, which necessitate external adapters, AC remains the dominant choice for grid-level power
distribution.

Historically, AC gained prominence due to several key advantages. Early AC generators were simpler
and more reliable to build, and crucial innovations like transformers allowed for efficient voltage
step-up and step-down, making long-distance power transmission practical. Furthermore, the de-
velopment of multi-pole alternators facilitated lower rotation speeds in high-power generators, enhancing
their design and operation. While pioneering figures like Thomas Edison initially championed DC sys-
tems, the challenges associated with unreliable high-voltage DC motors ultimately led to the adoption
of AC for grid distribution [DVRZ22].

One of AC’s most significant benefits lies in its ability to minimize power losses during transmission.
By allowing voltage to be easily increased (doubled) and current simultaneously decreased (halved)
using transformers, AC significantly reduces resistive losses (I 2 R) over long distances. This characteristic
fundamentally enabled the development of extensive power grids. However, advancements in modern
power electronics have made efficient AC-DC and DC-AC conversion increasingly feasible. This has
sparked renewed interest in DC distribution, particularly for long-distance power transmission, as
it eliminates the need for complex generator synchronization. A notable example is the 2000MW high-
voltage DC (HVDC) link connecting England and France, facilitating efficient power exchange based
on real-time demand [DVRZ22].

In the context of electric vehicles (EVs), AC/DC converters are fundamental. They are essential
for transforming the AC power from electrical outlets into the DC required to charge EV batteries. For
fast charging applications, which demand high power levels (typically over 50 kW), these AC/DC
converters are significantly larger and are generally housed in dedicated charging stations rather than
integrated into the vehicles themselves due to size and weight constraints [FLA16].

1.2 What is Rectification?

Rectification is the crucial process of converting an alternating current (AC) waveform into a direct
current (DC) waveform, resulting in a signal that maintains a single, consistent polarity. It’s im-
portant to understand that a DC voltage or current doesn’t always have to be perfectly constant; its
defining characteristic is that its polarity never changes. A DC signal with a varying amplitude is often
referred to as pulsating DC.

This concept of rectification is absolutely fundamental in modern electronics because most electronic
devices require a stable, unvarying DC voltage to power their internal circuits. Since power supplied to
homes and businesses is predominantly AC, some form of AC-to-DC conversion is always necessary
to make this power usable for our devices.

The electronic circuits that perform this AC-to-DC conversion are called rectifiers. They are broadly
categorized into two main types based on how they process the AC waveform: half-wave rectifiers and
full-wave rectifiers. Half-wave rectifiers convert only one half of the AC cycle into DC, while full-wave

2
rectifiers process both halves of the AC cycle to produce a DC output. Understanding the distinct
functionalities and differences between these two types of rectifiers is essential for anyone working
with power conversion.

1.3 Topologies for AC/DC Conversion Stage in EV Fast Charging

In Electric Vehicle (EV) fast charging stations, the AC/DC conversion stage serves as the
pivotal front-end interface between the utility grid and the DC charging infrastructure. This crucial
stage is responsible for efficiently converting three-phase AC power from the grid into a regulated DC
voltage, which then supplies the subsequent DC-DC stage for precise battery charging.

To effectively meet the stringent demands of modern fast charging—including high efficiency, strin-
gent grid compliance, superior power quality, and the increasing requirement for bidirectional
power flow capabilities such as Vehicle-to-Grid (V2G)—a wide array of rectifier topologies has
been developed. These topologies are broadly categorized into two main classes: Passive Rectifiers
and Active Front-End (AFE) Rectifiers.

Passive Rectifiers: Passive rectifiers represent simple, robust, and low-cost solutions for AC/DC
conversion. However, their inherent limitations often prevent them from meeting the stringent perfor-
mance standards mandated in modern fast charging infrastructure.
Three-Phase Diode Bridge Rectifier: This topology utilizes six diodes to convert AC to a pulsating
DC output. While it offers simplicity, low cost, and high reliability, its significant drawbacks
include a poor power factor, high input current harmonic distortion, and an unregulated,
unidirectional DC output voltage. Consequently, due to these performance limitations, it is rarely
employed in high-power EV charging applications.

Active Front-End (AFE) Rectifiers: Active rectifiers distinguish themselves by incorporating con-
trollable switching devices like IGBTs or MOSFETs. Coupled with advanced digital control
strategies such as Space Vector Modulation or Predictive Control, these rectifiers can precisely regulate
the DC output voltage and significantly enhance input power quality.
Two-Level Six-Switch Boost Rectifier: This topology features a full-bridge structure with six
active switches. It is widely recognized for achieving a near-unity input power factor, exhibiting
low total harmonic distortion, and inherently supporting bidirectional power flow. These char-
acteristics make it a popular and robust choice for high-performance EV fast chargers.
Vienna Rectifier (Three-Level): Comprising three active switches and three diodes, the Vienna
rectifier is a three-level topology renowned for its high efficiency and a reduced number of
active components compared to a full bridge. It also provides lower voltage stress on its components.
However, it typically does not support native bidirectional power flow, making it particularly suitable
for high-power chargers where energy transfer is primarily unidirectional.
Neutral Point Clamped (NPC) Converter: As a classic three-level topology, the NPC converter
effectively reduces harmonic distortion and switching losses. Its benefits are particularly pronounced
in very high-power applications where efficiency and stringent power quality are critical. A key design
consideration, however, is the need for careful voltage balancing of its clamping capacitors.
T-Type Three-Level Converter: This topology offers improvements over the traditional NPC
converter, notably featuring lower conduction losses and often simpler control mechanisms. It
is recognized for its efficiency and ability to provide excellent harmonic performance, making it a
strong contender in multilevel rectifier applications.
Flying Capacitor (FC) Rectifier: This topology utilizes capacitors for voltage clamping, which
contributes to good voltage balancing and inherent fault tolerance. Despite these advantages, it
requires relatively complex control strategies to accurately manage the capacitor voltages.
Bridgeless Totem-Pole PFC Rectifier: This highly advanced topology eliminates the traditional
diode bridge, leveraging fast-switching Silicon Carbide (SiC) MOSFETs to significantly reduce

3
conduction losses and enable operation at high switching frequencies. This high-frequency operation
facilitates the use of smaller passive components, resulting in more compact and efficient designs.
Crucially, it inherently supports bidirectional power flow, rendering it ideal for V2G and Vehicle-
to-Home (V2H) applications. It is widely regarded as one of the most advanced and efficient
front-end AC-DC conversion solutions in modern EV fast chargers.

Other Noteworthy Topologies: Matrix Converter-Based Rectifier: This converter performs

direct AC-to-AC conversion, which can then be regulated to provide a DC output, eliminating
the need for bulky DC-link capacitors. While offering compactness, it typically involves complex
control algorithms and higher overall costs. Interleaved Boost PFC Rectifier: This topology
consists of multiple boost converter stages operating in parallel. This configuration effectively
reduces input current ripple, improves thermal performance and distribution, and enhances
overall system reliability. It is particularly well-suited for modular and scalable fast charging
systems. Resonant Front-End Rectifier (e.g., LLC or Series Resonant): These topologies utilize
resonant tanks to achieve soft-switching (such as Zero Voltage Switching, ZVS), leading to very
high efficiency, especially at high operating frequencies. They are a compelling choice for charger
designs that prioritize extreme compactness and efficiency.

Selected Topology for This Project: For this project, the Three-Phase Bridgeless Totem-Pole
PFC Rectifier has been chosen. This selection is based on its exceptional efficiency, minimizing
energy losses during conversion. It is also chosen for its capability to achieve a near-unity power factor
and to produce minimal harmonic distortion, all vital for robust grid compliance. Furthermore, it
offers inherent support for bidirectional energy flow, which is essential for enabling future grid-
interactive features like V2G, and has the capacity for high-frequency operation, allowing for the
design of highly compact, lightweight, and efficient EV fast chargers. Its innovative structure
and performance advantages make it a compelling choice for developing a high-performance, grid-
friendly charging infrastructure.

1.3.1 Totem Pole Rectifier

Off-board fast charging stations are essential for the rapid replenishment of electric vehicle
batteries, serving as the critical interface between the utility grid and the vehicle’s high-voltage battery
pack. The initial AC/DC conversion stage in these stations plays a pivotal role, transforming the
incoming three-phase AC power from the grid into a precisely regulated DC voltage that feeds the
subsequent DC/DC stages for controlled, high-power battery charging.

For off-board chargers, the implementation of an efficient Power Factor Correction (PFC) con-
verter is not merely advantageous but a fundamental requirement for seamless grid integration.
This is crucial for maximizing the real power transfer, ensuring strict compliance with grid
codes (such as IEEE 519), and minimizing the injection of reactive power and harmonic
distortion back into the utility grid.

Traditional PFC converters, often seen in conventional designs (including many onboard chargers),
frequently rely on a passive diode bridge for rectification. While this approach offers inherent reliabil-
ity, a simple design, and low initial cost, its limitations become acutely evident at the high power
levels characteristic of fast charging. Such designs typically suffer from a lagging power factor, gen-
erate significant input current harmonics, and incur considerable power losses. These losses not
only reduce overall efficiency but also necessitate bulky heat sinks and extensive cooling systems,
adding to the charger’s size and weight. For instance, the input bridge alone can consume approximately
2% of the input power at lower line voltages in wide mains applications, highlighting a clear area for
efficiency improvement.

As a direct response to these drawbacks, the prevailing trend in high-power AC/DC conversion
is shifting towards bridgeless architectures, which eliminate the traditional diode bridge. These ad-
vancements are largely driven by the superior characteristics of Silicon Carbide (SiC) MOSFETs.

4
While silicon-based power devices in conventional designs face limitations such as lower efficiency, re-
duced power density, and increased weight, SiC MOSFETs offer a compelling alternative. Their
ability to achieve faster switching speeds, exhibit significantly lower reverse recovery charge,
and possess a remarkably low on-state resistance (RDS(ON ) ) allows designers to overcome these
limitations, leading to substantial improvements in efficiency, power density, and thermal per-
formance.

One prominent example of this trend is the Totem-Pole Bridgeless PFC Boost Rectifier. As
Figure 1 illustrates, its basic structure consists of a boost inductor, two high-frequency boost SiC
switches (SiC1 and SiC2), and two additional components dedicated to conducting current at the line
frequency. These line frequency components can be two slow diodes, as shown in Figure 1 (a), or, for
further efficiency gains, two silicon MOSFETs (Si1 and Si2). The use of Si1 and Si2 (as potentially
depicted in Figure 1 (b), contrasting with Figure 1 (a) that might show diodes) significantly enhances
the overall efficiency, making the Totem-Pole Bridgeless PFC a highly attractive solution for cutting-
edge, high-power off-board EV fast charging applications. [D464]

5
 (a) Rectifier using SiC and two diodes. (b) Totem-pole rectifier with mixed semiconductors.

Figure 1: Totem-Pole Bridgeless PFC Boost Converter Topology

(A) Diode for Line Rectification (B) MOSFET for Line Rectification

A critical challenge inherent to the operation of the Totem-Pole PFC rectifier lies in its mode tran-
sition at the AC voltage zero-crossing point. As the AC input voltage transitions from the positive
to the negative half-cycle (or vice versa), the operating conditions of the high-frequency switches funda-
mentally change. Specifically, the duty cycle of the low-side high-frequency switch (SiC2) rapidly shifts
from 100% to 0%, while that of the high-side switch (SiC1) simultaneously transitions from 0% to 100%.

During this swift transition, a significant issue arises due to the slow reverse recovery characteristics
of the high-side diode (or the body diode of the MOSFET if one is used in that position). This slow
recovery prevents the voltage at the cathode of the high-side diode from instantaneously jumping from
ground to the DC bus voltage, leading to a substantial current spike. This problematic current spike
severely limits the performance and reliability of the converter. [D464]

Consequently, this reverse recovery issue dictates that conventional silicon (Si) MOSFETs cannot
be reliably utilized in a Continuous Conduction Mode (CCM) Totem-Pole PFC. Therefore, for
stable and efficient operation, the high-frequency switches (SiC1 and SiC2) must be composed of wide-
bandgap semiconductors such as Silicon Carbide (SiC) MOSFETs or Gallium Nitride (GaN)
Field-Effect Transistors (FETs), both of which are distinguished by their inherently low reverse
recovery charge.

1.3.2 Totem Pole Rectifier PFC Operation

The Totem-Pole PFC rectifier efficiently processes both the positive and negative half-cycles of
the AC mains input, precisely controlling the current flow through the strategic switching of its high-
frequency SiC MOSFETs. The intricate current paths for each operational phase are illustrated in
Figure 2 (for the positive half-cycle), including Figure 2 (A) and Figure 2 (B). Similarly, Figure 3
depicts the negative half-cycle operation. [D464]

Together, the high-frequency SiC MOSFETs and the boost inductor form a highly efficient syn-
chronous boost converter.

During the positive half-cycle of the AC input: Switch S2 acts as the primary boost switch,
modulated with a duty cycle D. Concurrently, switch S1 is driven with a complementary pulse-
width modulation (PWM) signal, corresponding to a duty cycle of (1-D). Figure 2 (A) clearly
depicts the direction of current flow during the period when S2 is actively switching. Similarly, when
S2 is driven with (1-D) and S1 with D, Figure 2 (B) illustrates the corresponding current path. It is
important to note that throughout this entire positive half-cycle, the diode SD2 remains continuously

6
conductive.

During the negative half-cycle of the AC input: The operational principle mirrors that of the pos-
itive half-cycle, with the roles of the high-side and low-side high-frequency switches effectively swapped.
Figure 3 visually represents the direction of current flow in this phase. Notably, during the entire
negative half-cycle, the diode SD1 remains continuously conductive. [D464]

(a) While S2 is Switched ON (b) While S2 is Switched OFF

Figure 2: Totem-Pole Bridgeless PFC Operation During Positive Half Cycle

(A) While S2 is Switched ON (B) While S2 is Switched OFF

(a) While S1 is Switched ON (b) While S1 is Switched OFF

Figure 3: Totem-Pole Bridgeless PFC Operation During Negative Half Cycle

(A) While S1 is Switched ON (B) While S1 is Switched OFF

7
8
Part I

title

9
 Part II

Implementation of Closed-Loop
AC/DC Converter

8
Implementation of Closed-Loop AC/DC
Converter
2.1 The Main Control Circuit

The control strategy for the single-phase totem-pole Power Factor Corrector (PFC) rectifier
employs a cascaded dual-loop architecture to achieve precise output voltage regulation and near unity
power factor. This hierarchical control approach separates the regulation of the DC output voltage from
the shaping of the AC input current, allowing for independent tuning and robust performance.

The outer loop, referred to as the Voltage Control Loop, is responsible for maintaining a constant
DC output voltage (VOUTMeasured ) at the desired setpoint (VDC). This loop operates at a slower
rate, typically dictating the system’s transient response to load changes. As shown in the provided
diagram (Figure 4), this loop receives the DC voltage reference (VDC) and the measured output
voltage (VOUTMeasured ). A ”Voltage Regulator” block (which is a PI controller as indicated by
the parameters) processes these signals to generate a current reference signal. This loop also includes
a ”PLL” (Phase-Locked Loop) unit that uses the AC voltage (VAC) to synchronize the system and
determine the phase angle.

Figure 4: Simulink Diagram: Dual-Loop PFC Control

The inner loop, known as the Current Control Loop, is tasked with ensuring that the input AC
current (ILMeasured ) precisely follows a sinusoidal reference signal that is in phase with the input AC
voltage (VAC). This effectively corrects the power factor and minimizes harmonic distortion in the input
current. The current loop operates at a much faster rate, primarily driven by the converter’s switching
frequency (Fsw = 20kHz). In the diagram, this loop receives the current reference signal from the voltage
loop, compares it to the measured current (ILMeasured ), and then a ”Current Regulator” block (also
a PI controller) processes these signals to generate a control signal (D) that is fed to the ”PWM
Generator” to produce the gate pulses for switching the transistors.

2.2 Proportional Integral (PI)

A Proportional-Integral (PI) controller is a widely utilized feedback mechanism integral to in-

dustrial system s and various applications demanding continuous process modulation. It operates by

9
combining two distinct adjustment mechanisms—proportional and integral—to automatically com-
pensate for deviations and changes within a system.

The enduring popularity of PI control stems from its robust performance and inherent simplicity.
Its operation hinges on two key coefficients: the proportional gain and the integral gain. These
parameters are meticulously adjusted, or ”tuned,” to achieve an optimal system response. Through its
closed-loop operation, the PI controller continuously works to minimize the error between the measured
process variable and the desired setpoint, thereby ensuring precise and stable control.

2.2.1 P-Controller
The Proportional (P) controller generates an output that is directly proportional to the current
error signal, denoted as e(t). This error is calculated by comparing the desired setpoint with the actual,
feedback process value.

Figure 5: P-gain’s influence on system response

Mathematically, the output of a P-controller, u(t), is determined by multiplying the error e(t) by
a constant proportional gain, KP . Consequently, if the error is zero, the controller’s output will also
be zero. A notable characteristic of the P-controller is its tendency to maintain a steady-state error,
which often necessitates either a biasing mechanism or manual resetting. Increasing the proportional
gain (KP ) typically results in a faster system response.

The fundamental equation for a P-controller is:

u(t) = KP e(t) (1)

2.2.2 I-Controller
While the proportional (P) controller offers a rapid response to error signals, a fundamental
limitation is its inability to entirely eliminate the offset, or steady-state error, between the process
variable and the desired set-point. To overcome this inherent deficiency, the integral (I) controller
becomes indispensable. It is precisely the integral action that provided the necessary corrective force
to drive the steady-state error to zero.

An integral controller operates by integrating the error over time. This continuous accumulation
of the error signal allows it to generate an output that grows as long as an error persists, effectively

10
pushing the system towards the set-point. Once the error becomes zero, the integral action ceases to
accumulate, and its output holds the value achieved when the error vanished, thereby maintaining the
system at the desired set-point without residual offset. A negative error, conversely, causes the integral
output to decrease. The integral gain (Ki ) plays a crucial role in determining the speed at which the
steady-state error is eliminated and profoundly influences the overall response speed and stability of the
system. Precise tuning of Ki is therefore critical for optimal performance.

Figure 6: PI-control

When combined, the proportional and integral terms form the robust Proportional-Integral (PI)
controller. This widely adopted feedback mechanism synergistically leverages the immediate respon-
siveness of the proportional action with the steady-state error elimination capability of the
integral action, resulting in highly effective and stable control.

The output of a PI controller, u(t), is mathematically expressed as:

Z t
u(t) = KP e(t) + Ki e(τ ) dτ (2)
0

2.2.3 Tuning of PI Controller

In this project, the Proportional-Integral (PI) controller gains for both the voltage and current
control loops were determined using a systematic analytical calculation method, rather than a trial-
and-error approach. This methodology leverages established control theory principles and the defined
system parameters to derive the optimal gain values, ensuring predictable performance and stability.
Our tuning process commenced by defining specific cut-off frequencies for each control loop, which
directly influence their dynamic response: For the Current Regulator, a faster response was desired,
leading to a cut-off frequency (fci ) of 2 kHz. For the Voltage Regulator, a slower, more stable response
was appropriate, with a cut-off frequency (fcv ) set to 10 Hz.

Based on these design specifications and the known parameters of the PFC converter (such as inductance
(LPFC ), capacitance (CPFC ), nominal AC voltage (Vnomac ), and nominal DC voltage (Vnomdc )), the
proportional (KP ) and integral (KI ) gains for each PI controller were calculated directly using predefined
mathematical formulas.

2.3 Voltage Control Loop (PLL + Voltage PI)

The Voltage Control Loop serves as the outer control loop in the cascaded architecture, primarily
responsible for regulating the DC output voltage (VOUTMeasured ) to the desired nominal value (Vnomdc ).
This loop operates at a significantly slower bandwidth compared to the inner current loop, allowing it
to dictate the overall system’s response to load variations while ensuring stability.

The operation of this loop involves two key components:

11
Phase-Locked Loop (PLL): The PLL is crucial for synchronizing the control system with the incoming
AC grid voltage (VAC). As shown in Figure 7, the PLL takes the input AC voltage and generates a
synchronized sinusoidal signal and its corresponding phase angle (or frequency Ffreq), typically converted
to per-unit (p.u.) values. This synchronized signal is then used to generate the reference for the inner
current loop, ensuring that the input current remains in phase with the input voltage for unity power
factor operation.

Figure 7: Simulink Diagram: Dual-Loop PFC Control

Voltage PI Controller (Voltage Regulator): This proportional-integral (PI) controller acts as the
core of the voltage regulation. It takes the error between the desired DC output voltage setpoint (VDC)
and the measured DC output voltage (VOUTMeasured ). The PI controller processes this error to produce
the amplitude reference for the input current. A positive error (measured voltage lower than desired) will
increase the current reference, causing the converter to draw more power from the AC source to charge
the output capacitor and raise the DC voltage. Conversely, a negative error will reduce the current
reference.

The parameters for the Voltage PI controller are critical for its performance and are calculated using
the following formulas, derived from control theory and system specifications:

The desired cut-off frequency (fcv ) for the voltage loop is set to 10 Hz:
fcv = 10 Hz (3)

The integral time constant (Tvi ) is determined by the cut-off frequency:

1
Tvi = (4)
2πfcv

The proportional gain (Kvp ) is calculated based on system parameters like capacitance (CPFC ), nomi-
nal DC voltage (Vnomdc ), nominal AC voltage (Vnomac ), and the chosen cut-off frequency. The formula
is given by:
Vnomac
Kvp = (5)
2πfcv CPFC Vnomdc

Finally, the integral gain (Kvi ) is derived directly from the proportional gain and the integral time
constant:
Kvp
Kvi = (6)
Tvi

12
The output of the Voltage PI controller, scaled by the synchronized sine wave from the PLL, forms
the instantaneous current reference signal (Iref) that is fed into the inner Current Control Loop. This
ensures that the converter draws a sinusoidal current from the grid, scaled to meet the power demand
required to maintain the regulated DC output voltage.

2.4 Current Control Loop (Current PI + PWM Generation)

The Current Control Loop constitutes the inner, faster control loop in the cascaded architecture,
directly responsible for shaping the input AC current (IL Measured ) to precisely follow the sinusoidal
reference generated by the outer Voltage Control Loop. Its primary objectives are to achieve near
unity power factor (by ensuring the input current is in phase with the input voltage) and to minimize
total harmonic distortion (THD) in the input current.

As illustrated in Figure 8, the operation of this loop involves two main stages:

Figure 8: Simulink Diagram Current Control Loop

Current PI Controller (Current Regulator): This proportional-integral (PI) controller forms the
core of the current tracking mechanism. It receives two inputs: the instantaneous current reference
(Iref ) from the Voltage Control Loop (which is synchronized and amplitude-scaled) and the actual
measured inductor current (IL Measured ). The PI controller calculates the error between these two signals
and processes it to generate a control signal. This control signal effectively determines the required duty
cycle for the converter’s switches to force the inductor current to track its reference.

The parameters for the Current PI controller are crucial for its fast and accurate response, and are
calculated using the following formulas, derived from control theory and system specifications:

The desired cut-off frequency (fci ) for the current loop is set to 2 kHz, indicating a much faster
response than the voltage loop:
fci = 2 kHz (7)

The proportional gain (Kip ) is determined by the cut-off frequency, PFC inductance (LPFC ), and
nominal DC voltage (Vnomdc ):
2
Kip = (8)
Vnomdc · 2πfci LPFC

The integral time constant (Tii ) is calculated based on the current loop’s cut-off frequency:

1
Tii = (9)
2πfci

13
Finally, the integral gain (Kii ) is derived from the proportional gain and the integral time constant:

Kip
Kii = (10)
Tii

PWM Generator (Pulse Width Modulation Generator): The control signal generated by the
Current PI controller (which is typically a modulation index or desired duty cycle) is fed into the
PWM Generator. This block is responsible for converting the continuous control signal into discrete
switching pulses (Gate signals) that directly drive the power semiconductor switches (MOSFETs) of
the totem-pole rectifier. The PWM generator operates at a high switching frequency (Fsw = 20kHz)
to provide precise control over the average voltage across the inductor, thereby regulating the inductor
current.

By tightly controlling the inductor current to follow its sinusoidal reference, the Current Control Loop
ensures that the input current drawn from the AC source is nearly sinusoidal and in phase with the input
voltage, thus achieving high power factor and low harmonic distortion for the entire rectifier system.

2.5 Digital Implementation Details (Rate Transition, Timing)

This section delves into the practical considerations for implementing the designed control system in a
digital environment, such as a microcontroller or a Digital Signal Processor (DSP). Digital control
requires careful attention to discrete-time operations, sampling rates, and synchronization.

The control algorithms are executed periodically, defined by the control system’s sample time, Ts Control .
From the model parameters, we have:

TsControl = 10 × 10−6 s

This is the period at which the PI controllers and other control logic are updated. In contrast, the
power stage simulation (and implicitly the fast switching events) operates at a much finer resolution,
defined by the model sample time, Ts Power :

Ts Power = 50 × 10−9 s (11)

A crucial aspect of digital implementation, especially in a dual-loop system where different parts might
operate at different effective rates (e.g., the voltage loop being slower than the current loop), is the
management of sample rates. As observed in the Simulink control diagram (refer to Figure 4 for
the overall control structure, or a zoomed-in version of it showing these blocks specifically), “Rate
Transition” blocks (“Rate Transition1”, “Rate Transition2”) are utilized. These blocks are essential
for:
Synchronizing Data: Ensuring that signals sampled at different rates are correctly aligned for pro-
cessing.
Avoiding Aliasing: Properly handling the transfer of signals between different discrete time domains.
Decoupling Control Loops: Allowing the slower voltage loop to operate at its optimized sample rate
(e.g., tied to the AC line frequency or slower than the PWM) while the faster current loop and PWM
generation operate at the switching frequency.

The digital controller must precisely coordinate the sampling of feedback signals (VOUTMeasured , ILMeasured ),
the execution of control algorithms, and the generation of PWM pulses. Accurate timing is paramount
to ensure control stability and optimal performance, preventing issues like limit cycling or oscillations.

2.6 Design Specifications

The design of the PFC rectifier is based on a set of fundamental operating specifications and perfor-
mance targets. These parameters guide the selection and sizing of all power stage components.

14
The key nominal specifications for this design are:

Nominal AC Input Voltage:

Vnomac = 220 V (RMS) (12)

Nominal DC Output Voltage:

Vnomdc = 200 V (13)

System Frequency:
Fnom = 50 Hz (14)

Nominal Load Resistance: Ro is 160 Ohms (This value implies a nominal output power of Pout .
While the section title mentions ”1 kW,” the provided Ro implies 250 W at Vnomdc . It’s important to
clarify if 1 kW is a target that requires a different Ro or if Ro = 160Ω is the fixed load).

Vnom2dc 2002
Pout = = = 250 W (15)
Ro 160

PWM Switching Frequency:

Fsw = 20 × 103 Hz (16)

These specifications define the operating environment and the required power handling capability of the
converter.

2.6.1 Inductor Sizing

The boost inductor (LPFC ) is a critical component in the PFC stage, responsible for energy
storage and shaping the input current. Its size is primarily determined by the allowable inductor current
ripple (∆ILmax ), the switching frequency (Fsw ), and the operating voltages.

The inductance value used in the model is given as:

LP F C = 0.01 H (17)

Associated with this inductor is its series resistance:

RLP F C = 40 × 10−3 Ohms (18)

The fundamental formula used for calculating the required inductance, based on the maximum inductor
current ripple, is typically derived from the boost converter operation. As indicated in the design
calculations (referencing image 19bd53.jpg as your source for these formulas), the inductance L can be
calculated using:

Vin × D × Ts
L= (19)
∆ILmax

Where:

• Vin : RMS input AC voltage (e.g., Vnomac ).

• D: Duty cycle of the switch (varies over a half AC cycle).

• Ts : Switching period (1/Fsw ).

• ∆ILmax : Maximum allowable peak-to-peak inductor current ripple. This is often chosen as a
percentage of the peak inductor current.

15
2.6.2 Capacitor Sizing

The DC-link capacitor (CPFC ) is essential for filtering the output voltage, providing energy storage
to supply the load during line voltage sags, and absorbing high-frequency current ripple from the switch-
ing action. Its sizing is primarily driven by the maximum allowable output voltage ripple (∆Vout ),
the output power (Pout ), the output voltage (Vout ), and the line frequency (F).

The capacitance value used in the model is:

CP F C = 1120 × 10−6 F (20)

The formula commonly used to estimate the required capacitance based on the output voltage ripple is:

Pout
C= (21)
4πVout × F × ∆Vout

Where:

• Pout : Output power (e.g., the nominal load power).

• Vout : Nominal DC output voltage (Vnomdc ).

• F : Line frequency (Fnom).

• ∆Vout : Maximum allowable peak-to-peak output voltage ripple.

This formula ensures that the capacitor is large enough to limit the voltage ripple to acceptable levels,
particularly the twice-line frequency ripple that arises from the single-phase input.

2.6.3 Duty Cycle, ILmax , ∆IL Formulas

This section further elaborates on key formulas related to the operation of the boost PFC, particularly
concerning the inductor current and the converter’s duty cycle. These calculations are critical
for understanding the stresses on components and ensuring continuous conduction mode (CCM)
operation.

The following formulas are relevant for determining these parameters:

The peak input current (ILmax ), which is also the peak inductor current, can be estimated based on
the output power and efficiency:

Pout
ILmax = (22)
η × Vin
Where:

• Pout : Output power (e.g., 250 W based on Ro , or 1 kW if that’s the design target).

• η: Converter efficiency (a typical assumed value, e.g., 95-98%).

• Vin : RMS value of the input AC voltage (Vnomac ).

The maximum peak-to-peak inductor current ripple (∆ILmax ) is often specified as a fraction (ρ)
of the peak inductor current:

ILmax
∆ILmax = ρ × (23)
2
Here, ρ represents the ripple factor (e.g., 0.1 to 0.4 for 10% to 40% ripple).

16
The duty cycle (D) for a boost converter operating in continuous conduction mode (CCM)
relates the output DC voltage to the instantaneous input AC voltage. For a simplified case
(ignoring rectification, considering Vi as the instantaneous input), it can be expressed as:
√
Vout − 2Vi
D= (24)
Vout
Where:

• Vout : Nominal DC output voltage (Vnomdc ).

√
• Vi : Instantaneous input AC voltage (its peak is 2Vnomac ). This formula specifically applies when
√
Vi is the RMS input voltage and 2Vi is the peak input voltage.

These formulas are crucial for determining the operating range of the converter and for component
selection to withstand peak currents and voltages.

17
 Part III

Simulation Setup and Analysis

18
Simulation Setup and Analysis
3.1 Simulink Implementation Structure
The entire PFC rectifier system is meticulously modeled within the Simulink environment,
providing a modular and integrated platform for design verification. This hierarchical structure facilitates
understanding and debugging of individual components and their interactions.

The comprehensive Simulink model, as illustrated in Figure 9, comprises three principal subsystems:

Power Stage: This core subsystem accurately models the hardware components of the rectifier. It
includes the AC input voltage source (VAC = 220 V (RMS)), the PFC boost inductor (LP F C =
10 mH) with its series resistance (RL = 40 mΩ), the totem-pole switching bridge (composed of
MOSFETs with RON,F ET = 60 mΩ and diodes with RON,D = 50 mΩ and forward voltage Vf = 0.6 V),
the DC output capacitor (CP F C = 1120 µF), and the resistive load (Ro = 160 Ohms). The power
stage operates at a high-resolution simulation timestep (Ts = 50 ns) to precisely capture fast switching
transients.

Figure 9: Overall Simulink Model Structure of the Single-Phase Totem-Pole PFC Rectifier

Figure 10: Inputs to the Measurement Subsystem

Control System: Encapsulating the dual-loop Proportional-Integral (PI) control strategy,

this subsystem receives feedback from the power stage and generates the Pulse Width Modulation
(PWM) signals. The control algorithms are executed at a discrete control timestep (Ts,control = 10 µs),
mimicking the processing delays inherent in digital controllers.

Measurement and Display Subsystem: This crucial part of the model is responsible for acquiring
various voltage and current signals from the power stage. As specifically shown in Figure 10, it takes
inputs such as the output voltage (VOU T ), AC input voltage (VAC ), inductor current (IL ), and
output current (Io ). These signals are then processed to derive key performance metrics, which are
either displayed on dashboards or plotted on scopes for detailed analysis.

The interaction between these subsystems, governed by the specified timesteps and operating at a line

19
frequency (f = 50 Hz) and PWM switching frequency (fsw = 20 kHz), allows for a holistic evalu-
ation of the PFC rectifier’s dynamic and steady-state behavior.

Table 1: System Design and Simulation Parameters

Parameter Symbol Value Notes

Input AC Voltage VAC 220 V RMS input voltage
Output DC Voltage VDC 200 V Regulated DC bus voltage
Load Resistance Ro 160 Ω 1 kW nominal load
Switching Frequency fsw 20 kHz PWM frequency
Line Frequency f 50 Hz Grid frequency
Inductance LPFC 10 mH Input filter inductor
Inductor Resistance RL 40 mΩ Series resistance of inductor
Output Capacitance CPFC 1120 µF DC bus capacitor
FET On-Resistance RON,FET 60 mΩ FET conduction loss model
Diode On-Resistance RON,D 50 mΩ Diode conduction model
Diode Forward Drop Vf 0.6 V Static voltage drop
Simulation Timestep Ts 50 ns High-resolution power sim
Control Timestep Ts,control 10 µs For digital control loop

The key design and simulation parameters are comprehensively listed in Table 1.

3.2 Measured Outputs

To quantitatively assess the performance of the designed PFC rectifier, a suite of key output parameters
is measured and analyzed during the simulation. These metrics are critical for verifying compliance with
design specifications and power quality standards.
The primary measured outputs and their significance are:

• Output Voltage (Vout ): The regulated DC voltage across the load. The primary objective is to
maintain this voltage close to the nominal Vnom dc = 200 V with minimal ripple.

• Input Current (Iin ): The instantaneous current drawn from the AC grid. Ideal PFC operation
demands a sinusoidal input current that is in phase with the input voltage. The effectiveness of
the PWM generation in shaping this current is crucial, as exemplified by the PWM signals shown
in Figure 11.

Figure 11: Generated Pulse Width Modulation (PWM) Signals for Converter Switching

20
 • Total Harmonic Distortion (THD): A crucial power quality indicator, THD quantifies the
harmonic content present in the input current. A lower THD signifies a more sinusoidal current
waveform, reducing distortion injected back into the grid.

• Power Factor (PF): This metric represents the ratio of real power to apparent power. A power
factor close to unity (1) indicates that the rectifier is drawing mostly real power from the grid,
minimizing reactive power burden.

Figure 12: Simulink Subsystem for Calculating Performance Metrics (PF, THD, Efficiency)

• Efficiency (η): The ratio of output power to input power. High efficiency is paramount for
minimizing energy losses and heat generation within the converter, contributing to improved system
reliability and reduced operating costs.

Figure 13: Simulated Performance Metrics: Output Voltage, Power, Power Factor, THD, and Efficiency
Display

These measurements are visualized through various means within Simulink. For instance, Figure 13
displays the time-domain waveforms of the output voltage and input current, allowing for visual inspec-
tion of regulation, ripple, and current shaping. The numerical values of key performance indicators are
typically aggregated and shown on a dashboard, as presented in Figure 14. The internal calculation of
metrics like PF, THD, and Efficiency can be seen in a dedicated subsystem, as shown in Figure 12.

21
 Figure 14: Internal Simulink Subsystem for Power Factor, THD, and Efficiency Calculation

3.3 Dashboard Visualization and Performance Evaluation

The Simulink environment provides robust tools for visualizing simulation results, including interactive
dashboards and display blocks that present key performance metrics in a clear and concise manner.
This facilitates rapid performance evaluation and comparison against design targets. As prominently
displayed in the dashboard presented in Figure 14, direct numerical readouts are provided for:

• Output Voltage (Voutput ): The final steady-state DC output voltage, which is expected to be
regulated around 200 V. The example value shown in Figure 12 is 279.5 V, indicating the achieved
regulation point under specific load conditions.

• Output Power (Poutput ): The power delivered to the load, which is 488.3 W in the example.

• Power Factor (PF): A crucial metric, ideally approaching unity. Figure 12 shows a power factor
of 0.936.

• Total Harmonic Distortion (THD %): The percentage of harmonic distortion in the input
current. An example value from Figure 12 is 80.94%.

• Efficiency (%Efficiency): The overall energy conversion efficiency of the rectifier. Figure 12
indicates an efficiency of 99.6%.

By comparing these simulated results with the initial design specifications and desired performance
targets (e.g., high power factor, low THD, stable output voltage, and high efficiency), the efficacy of
the PFC rectifier design can be thoroughly evaluated. The dashboard visualization provides immediate
feedback on whether the implemented control strategy and chosen component values successfully meet
the power quality and regulation objectives for the single-phase totem-pole PFC rectifier.

22
 Part IV

DC/DC Conversion

23
DC/DC Conversion
4.1 Introduction to DC/DC Converters

DC-DC converters are fundamental building blocks in modern power electronic systems. They
are designed to convert one level of direct current (DC) voltage to another with high efficiency and
precision, supporting the functionality of applications that demand multiple voltage levels, such as
electric vehicles, renewable energy systems, and portable electronic devices. Through the regulation of

output voltage in the presence of variable input conditions and load disturbances, DC-DC converters
ensure the reliability and stability of critical power delivery. Their use of high-frequency switching
techniques contributes significantly to reducing energy losses and improving overall system performance.
These converters offer high versatility; they can perform voltage step-down (buck), step-up (boost),

or a combination of both (buck-boost), depending on system requirements. In addition, several topologies

provide galvanic isolation between the input and output, which enhances user safety and minimizes
the propagation of electrical noise and fault conditions. In terms of performance, DC-DC converters

are known for their ability to deliver tightly regulated voltage levels, with minimal deviation—making
them indispensable in powering sensitive and mission-critical electronics. A wide range of converter

topologies is available to address diverse application demands. Non-isolated topologies include the Buck,
Boost, and Buck-Boost converters. For isolated power transfer, topologies such as the Flyback and
Forward converters are utilized. In high-power applications that require bidirectional energy flow

and electrical isolation, the Dual Active Bridge (DAB) converter is widely employed. Its ability to
achieve soft-switching across a broad operating range makes it particularly suitable for EV chargers and
renewable energy interfaces. Moreover, resonant converters such as the LLC and CLLC topologies

offer high efficiency at elevated switching frequencies, making them attractive for use in server power
supplies, telecom systems, and advanced battery energy storage platforms.

4.2 Dual Active Bridge

The Dual Active Bridge (DAB) converter is a highly efficient, isolated, and bidirectional DC-DC
power converter. It plays a crucial role in modern power electronic systems, including renewable energy
systems, electric vehicles (EVs), energy storage systems, and high-power DC conversion platforms. Its

main function is to regulate power transfer between two DC voltage sources, often at different voltage
levels—with high efficiency, fast dynamic response, and bidirectional capability. The DAB converter’s
soft-switching operation, compact design, and electrical isolation make it ideal for applications requiring
both charging and discharging via the same hardware.

4.2.1 Circuit Model

Each bridge in the Dual Active Bridge (DAB) converter consists of two legs, and each leg contains two
Insulated Gate Bipolar Transistors (IGBTs). In the primary bridge, switches S1 and S4 receive the same
gate signal, while S2 and S3 receive the opposite (complementary) signal. The secondary bridge uses the

24
same switching pattern; however, its gate signals are phase-shifted due to the use of the Single Phase
Shift (SPS) Modulation Scheme. This phase shift creates a voltage difference between the outputs of the

primary and secondary bridges. This voltage appears across the leakage inductance of the high-frequency
transformer, which acts as an energy storage element. This is what enables the power transfer between
the two DC sides of the converter.

Figure 15: Dual Active Bridge

4.2.2 Principle of Operation

The Dual Active Bridge (DAB) is a bidirectional isolated DC-DC converter that consists of two
full-bridge circuits connected through a high-frequency transformer. This topology allows efficient power
conversion with galvanic isolation and the ability to transfer power in both directions.
The basic operation is as follows:

• The left-side full bridge operates as an inverter, converting DC input into a high-frequency
square-wave AC.

• This AC waveform is applied to the high-frequency transformer, which steps the voltage up or
down depending on the turns ratio.

• The right-side full bridge then rectifies the AC back to DC.

• Power transfer between the two sides occurs through the transformer’s leakage inductance, which
plays the role of the energy transfer element.

• The direction of power flow is controlled by adjusting the phase shift between the switching
signals of the two bridges.

One of the key advantages of the DAB converter is that it supports bidirectional power flow. By
simply changing the phase shift direction, the power can flow in reverse, without the need to modify the
hardware or circuit configuration.

Several control strategies can be applied to the DAB converter, such as:

• Linear feedback control

• Feedforward with feedback

• Predictive control

25
 • Sliding mode control

• Phase Shift Control (PSC)

In this project, the selected method is Phase Shift Control, specifically the Single Phase Shift
(SPS) method, due to its simplicity and effectiveness for basic power flow control.

Single Phase Shift (SPS) Control

SPS is the most basic form of phase shift control. It works by introducing a time delay (phase shift)
between the switching signals of the two bridges. This delay creates a voltage difference across the
transformer’s leakage inductance, causing current to flow and transferring power from one side to the
other.

Figure 16: Gatting Signals For MOSFET

How It Works
• Both bridges operate with a fixed 50% duty cycle, generating bipolar square-wave voltages.

• The left bridge (inverter) starts switching first.

• The right bridge (rectifier) switches with a controlled delay (phase shift angle θ).

• This phase shift determines the direction and amount of power transferred:

– If the left bridge leads in time, power flows from left to right.
– If the right bridge leads, power flows from right to left.

Switching Logic
• In the left bridge:

– S1 and S4 switch ON together .

– S2 and S3 switch ON together, 180° out of phase with S1 and S4.

26
 • In the right bridge:

– S5 and S8 switch together.

– S6 and S7 switch together.
– All switches follow the same pattern but with a time shift compared to the left side.

While Achieving This Strategy You Must get The following Results: Phase Shift applied
between primary voltage side and secondary voltage side, inductor current charge and discharge

Figure 17: Output From DAB

4.2.3 Design Steps and Calculations

Approximate Analytical Expressions for SPS Control
The following equations are used to describe the approximate output power and current for the DAB
converter under Single Phase Shift (SPS) control:

Vout · Vin · D · (1 − D)
Pout = (25)
2 · fsw · L · n
Vin · D · (1 − D)
Iout = (26)
2 · fsw · L · n
2
Vout
RLoad = (27)
Pout
The duty ratio D is related to the phase shift as:

ϕsec ϕrad ϕdeg

D= = = (28)
Tsw /2 π 180
And the transformer turns ratio n is:

Vout
n= (29)
Vin

27
 It’s obvious from the previous
graph that the maximum power
transfer is obtained at (D = 0.5
which corresponds to ϕ = 90◦ ).
However, practical use (D = 0.5)
is not recommended due to some
reasons:
1- Nonlinear Power Transfer
Behavior
2-Peak Current Stress
So we need to take aware with
this problem during design
inductance , switching frequency
and the power needed to achieve

Figure 18: Dual Active Bridge Topology

1. Nonlinear Power Transfer Behavior:

The power transfer function in a DAB is nonlinear with respect to ϕ. Near 90◦ , it begins to flatten,
meaning:

(a) Small increases in ϕ no longer yield proportional power increases.

(b) Control becomes less sensitive and less stable.

We may need a little room for transients, which means we may want to increase the power transfer
for a short period of time above our conventional steady-state value.

2. Peak Current Stress:

At ϕ = 90◦ , the peak current through the inductor is maximized, leading to:

(a) Higher conduction and switching losses.

(b) Larger RMS current (more heating).
(c) Need for oversized magnetics and semiconductors.

Better to operate in a region where increasing ϕ still increases power — typically below 45◦ .

Design Requirements
Given the following parameters:

• Inductance: L = 67 µH

• Switching frequency: fsw = 12 kHz

• Input voltage: Vin = 100 V

• Output voltage: Vout = 100 V

• Output current: Iout = 10 A

• Output power: Pout = 1000 W

• Transformer turns ratio: n = 1

28
 First, we want to determine the maximum possible theoretical output current and power that can be
supplied to the load using the following equation (assuming D = 0.5):

Vin · D(1 − D) 100 · 0.5 · (1 − 0.5)

Iout, max = = = 15.547 A (30)
2fsw Ln 2 · 12 · 103 · 67 · 10−6

Pout, max = Vout · Iout, max = 100 · 15.547 = 1554.7 W (31)

Since this value exceeds the required power, the system is capable of meeting the design requirements.
For Iout = 10 A, we solve the power equation to find the corresponding duty cycles:

100 · D(1 − D)
10 =
2 · 12 · 103 · 67 · 10−6
Solving yields two solutions:

• D = 0.2013 ⇒ ϕdeg = 36.24◦

• D = 0.7986 ⇒ ϕdeg = 143.76◦

Graphical Solution
To analyze the power transfer characteristics, the output power is calculated as a function of D:

Vin · Vout · D(1 − D)

Pout = (32)
2fsw Ln
Substituting the values:

• Vin = Vout = 100 V fsw = 12 kHz L = 67 µH n=1

Maximum theoretical power: Pout,max = 1554.73 W

To normalize the output power:

Pout (W)
Pout (p.u) =
Pout, max

Table 2: Output Power vs. Duty Cycle for DAB Converter

Duty Cycle (D) Output Power (Pout ) Pout (p.u)

0.0 0 0
0.1 559.7 0.3599
0.2 995.02 0.6399
0.3 1305.97 0.8399
0.4 1492.54 0.9599
0.5 1554.73 1.0000
0.6 1492.54 0.9599
0.7 1305.97 0.8399
0.8 995.02 0.6399
0.9 559.7 0.3599
1.0 0 0

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 From both the analytical and graphical solutions, it is evident that two possible operating points
exist:

• D = 0.201 corresponds to ϕdeg = 36.24◦

• D = 0.799 corresponds to ϕdeg = 143.76◦

We select the operating point where the phase shift angle ϕ is within the range of 0◦ to 90◦ in order
to minimize the current flowing through the inductor. Hence, the selected duty cycle is:

D = 0.201 ⇒ ϕ = 36.24◦

To determine the lowest possible power transfer requirement, we assume a minimum output current of
1 A. Using the simplified output current equation:

Vin · D · (1 − D)
Iout =
2 · fsw · L · n
Solving for D when Iout = 1 A:

• D = 0.0163 corresponds to ϕdeg = 2.94◦

• D = 0.9837 corresponds to ϕdeg = 177.06◦

Again, to minimize the inductor current and maintain stability, we choose the smaller duty cycle:

D = 0.0163 ⇒ ϕ = 2.94◦

4.2.4 Simulation Using MATLAB

Although both voltage and current control methods could be implemented, current control was
chosen due to its simplicity and ease of practical implementation. However, in the Simulink model, both
modes were implemented and tested as part of the project using Single Phase Shift (SPS) modulation.

Figure 19: Simulink Model

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 The main function of the PI controller is to regulate the output current in order to track
the reference current required for the application, as illustrated in Fig. (a).
A pulse generator with a constant high switching frequency (in kHz) is used. The phase shift
obtained from the PI controller is multiplied by 1/f to calculate the required delay time. This calculated
delay is used to control the phase of the PWM signal, ensuring that the error remains minimal,
and the PI controller maintains zero steady-state error, as shown in Fig. (b).

(a) Current Control Method (b) PWM Signal

Figure 20: CC charging control and PWM modulation scheme implemented in Simulink

As a result of Applying a proper phase shift between the gating pulses, a clear phase difference is
created between the Primary Voltage and the Secondary Voltage. This phase difference allows
the inductor current to charge and discharge smoothly, enabling efficient power transfer between the
converter’s sides.

Figure 21: The waveform shows the Primary Voltage, Secondary Voltage, and Primary Current.
Each waveform corresponds to its respective color in the figure

Consequently, bidirectional power transfer was achieved efficiently by simply controlling the phase
shift angle. By varying the phase shift within a specific range, such as from 0◦ to 90◦ or from 90◦ to
180◦ , the direction and magnitude of the transferred power can be precisely controlled. This allows the
system to deliver the required power based on the application needs.

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 Figure 22: Variable Output Current and Voltage

Figure 23: Input vs. Output Power

It is remarkable to observe how effectively the system tracks both the input and output power,
as illustrated in Fig. 27. This excellent performance reflects the proper tuning of the PI controller
parameters. Such results confirm that the developed model is not only theoretically sound but also
practically reliable and ready for real-world implementation.

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4.2.5 Hardware Implementation
To overcome initial hardware challenges, our team decided to purchase pre-fabricated inverter legs.
This allowed us to postpone dealing with low-level hardware issues until after successfully running the
DAB converter. Therefore, we purchased four inverter legs from PE MODULE.

Figure 24: PE Module inverter leg

First, it was essential to verify whether the inverter legs were functioning properly. Therefore, the
DAB team decided to initially connect two legs in an inverter configuration and upload the test code (as
shown in Fig. 25) to the DSP for validation.

Figure 25: Four Pwm Dsp Code

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 then achieved it in lab and legs ar confirmed

Figure 26: Lab Leg Test

Then All Four Legs are connected considering to topology of Dual Active Bridge and simple pulse code
with phase shift is applied to Launchpad F28379D Development Kit

Figure 27: Plecs code with phase shift

certain phase shift occurs and that make it easily to control DAB power with constant duty cycle 0.5
and phase shift 40 degree

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 Figure 28: Simulink model for current control and gating signal generation

• Gating Signals Block: This section is responsible for generating the ePWM1 and ePWM2 signals
using the TI F2837x microcontroller. A calculated phase shift value is scaled and applied as delay
between the two signals to control power flow across the DAB.

• Current Sensor Block: The current signal is sampled through ADC channel A IN3. It is then
converted to voltage, centered at 2.533 V, and scaled by a gain of 20. This produces a real-time
feedback signal representing actual primary current.

• Angle Tuning Block: The measured current is compared to a reference, and the resulting error
is passed to a digital PI controller. The controller adjusts the phase angle to maintain constant
current operation by minimizing the error.

This structure enables closed-loop control of current by dynamically adjusting the phase shift, allowing
efficient operation of the DAB under varying load conditions.

Figure 29: DAB Setup

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