DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

EC3353 ELECTRONIC DEVICES AND CIRCUITS

II YEAR / III SEMESTER

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UNIT 1
SEMICONDUCTOR DEVICES

PN JUNCTION DIODE
i. In a piece of semiconductor, one half is doped by P-type impurity and the other half is doped by
N-type impurity. Thus PN junction is formed.
ii. This formation of PN junction is called diode as it has two electrodes one for P region called as
Anode and the other for N region called as Cathode.
N-Type Material
The majority charge carriers are electrons and has higher concentration of free electrons than holes
as shown in Fig.1.7 (a)
.

The majority charge carriers are holes and P type material has higher concentration of holes than
electrons, as shown in Fig. 1.7 (b).
Diffusion
The tendency of the free electrons to diffuse from the n-side to p-side and holes from p- region to
n-region is called diffusion.
Diffusion is the process by which charge carrier moves from high concentration region to low
concentration region.
Depletion Region
The free electrons diffuse from 'n' side to 'p' side region and recombine with the holes in P region.
Thus negative charged immobile ions are formed near the junction.
Also, the holes diffuse from P-region to n-region and recombine with the electrons in n-region and
leaves positively charged immobile ions near the junction of n-side.

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This process continues over certain time duration. After certain extent, the net negative charge on P-
side prevents further diffusion of electrons into P-side. Similarly, the net positive charge on N- side
repels holes crossing from P-side to N- side. These immobile positive and negative ions form a region
called as depletion region.
Depletion region is defined as the region over which all the free charge carriers are depleted. This
region is also known as space charge region since there are no free charge carriers available for
conduction. In equilibrium condition, the depletion region gets widened upto a point where no further
electrons or holes can cross the junction. The physical distance from one side to other side of the
depletion region is called width of the depletion region.
Barrier Potential
The electric filed is developed across the depletion region due to the potential difference between P
and N regions. This potential acts as barrier for further conduction between the junction. This
potential is called as barrier potential or diffusion potential or contact potential or cut in voltage.
i. It depends on doping levels and temperature
ii. The value of contact potential is 0.3 V for Germanium and 0.72V for Silicon at 25° C.
The barrier potential depends on
i. The type of semiconductors
ii. Concentration of donor impurity on n- side
iii. Concentration of acceptor impurity on p - side
iv. Intrinsic concentration of semiconductors
v. Temperature
OPERATION OF A PN JUNCTION DIODE
Biasing
Applying any external voltage to electronic device is called biasing. Biasing refers to provide
minimum external voltage and current to activate the device.
There are two types of biasing for PN junction.
Forward Bias
The positive terminal of the battery is connected to P-type semiconductor and negative terminal is
connected to n-type semiconductor material.
Reverse Bias
The positive terminal of the battery is connected to n - type semiconductor and the negative
terminal is connected to P-type semiconductor material.
FORWARD BIASED PN JUNCTION
In unbiased PN junction, there is no flow of current, when forward bias is applied to the PN junction,
the applied forward voltage creates an electric field opposite to the potential barrier.
i. Thus the potential barrier is reduced at the junction. As the potential barrier is very small (0.7 V
for Si and 0.3 V for Ge), a small forward voltage is sufficient to eliminate the barrier potential.
ii. The applied positive potential repels the holes in P-type region towards the junction. The electrons
in the n-type region are also repelled towards the junction due to the negative voltage applied in n-
region.

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iii. When the applied potential is more than the internal barrier potential, the depletion region
completely disappears and the junction resistance becomes zero.
iv. The junction provides a low resistance path and thus current flows in the circuit. This current is
called forward current.
v. When the forward voltage is increased, the large number of majority charge carriers can cross
the junction. These large number of majority charge carriers constitute the forward current.
The current in P - region is due to the movement of holes which are majority carriers. This is called
hole current.
The current in the n-regions is due to the movement of free electrons which are majority carriers.
This is called electron current. The overall forward current is due to the majority charge carriers.
These majority carriers can travel around the closed circuit and large amount of current flows from
negative to positive of the battery.
The direction of conventional current is from positive to negative of the battery which is opposite
to the direction of flow of electrons.
The voltage drop across a p- n junction diode in forward biased condition is made up of
(i) drop due to barrier potential
(ii) drop due to internal resistance
REVERSE BIASED P-N JUNCTION
The P-region is connected to negative terminal of the battery and n -region is connected to positive
terminal of the battery.
When p-n junction is reverse biased, the negative terminal attracts the holes in p - region and the
positive terminal attracts the free electrons in n - region away from the junction.
The electrons and holes move away from the junction and the width of depletion region increases.
The charge carriers are unable to cross the junction.
Thus there are more positive ions in the n- region and more negative ions in the p- region.
When the depletion region widens, the barrier potential across the junction also increases.

The applied reverse voltage creates an electric field which is in same direction of potential barrier
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and thus the barrier width is increased.

This increased potential barrier prevents the flow of charge carriers across the junction.
When PN junction is reverse biased, it has high resistance path and no current flows in the circuit.
After certain extent, the junction breakdown occurs. Then a small amount of current flows through
it due to minority charge carriers i.e., the electrons on p-side and holes on n- -side constitute
current in reverse biased condition. So, the reverse current is always very small. The reverse
current remains constant even if the reverse voltage is increased upto a certain limit. Hence, it is
called Reverse saturation current. The magnitude of reverse saturation current depends on junction
temperature.

PN DIODE SYMBOL

V-I CHARACTERISTICS OF PN DIODE

Fig.1.12 shows the circuit for V-I characteristics of PN junction diode.

V-I characteristics is used for studying the response of p - n junction.

It is defined as the graph of voltage applied across the p-n junction and the current flowing through
the p-n junction.
As shown in Fig.1.13, the applied voltage is V and the voltage across the diode is Vf.
The current flowing in the circuit is the forward current If. The graph of forward current If, against
the forward voltage Vf across the diode is called forward characteristics of a diode.
As voltage is applied, the current flow is very small upto the cut-in voltage VC or threshold voltage
VTh. or knee voltage.
When the applied voltage exceeds the threshold voltage the width of the depletion region is further
reduced and the forward current rises exponentially as shown in Fig.1.13. If the forward voltage is
increased beyond a certain value, extremely large amount of current is produced which may destroy
the diode due to overheating.
The point after which the current starts increasing exponentially is called Knee of the curve.
Reverse Bias
The Fig. 1.14 shows the reverse biased p- n diode. The reverse voltage across the diode is VR and
the current flowing through the diode is reverse current IR. The reverse current is mainly due to
minority charge carriers. The graph of reverse current IR versus reverse voltage VR is called reverse
characteristics of a diode.

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During reverse bias, all the majority carriers are attracted by the battery i.e., holes from P-type move
towards negative terminal of battery and electrons from n-type move towards positive terminal of
battery. Thus only immobile ions near the junction form a strong depletion region which offers very
high resistance for majority carriers.
Hence only very small current flows in the circuit. The polarity of reverse voltage applied is opposite
to that of forward voltage. So, the reverse saturation current is opposite to the forward current and
its value is negative.

i. When reverse voltage is increased, reverse current increases initially upto certain voltage. After
some extent, the current remains constant although reverse voltage is increased. This current is called
reverse saturation current Io the point at which breakdown occurs and reverse saturation current
increases rapidly is called knee of the reverse characteristics.

STATIC AND DYNAMIC RESISTANCE OF A DIODE

An ideal diode should offer zero resistance in forward bias and infinite resistance in the reverse bias
Diode behaves as a perfect conductor in forward biased condition and act as insulator in reverse
biased condition. In practical situations diode will not behave as ideal diode and thus offers minimum
amount of resistance in forward bias.
Forward Resistance
The resistance offered by the p-n junction diode in forward biased condition is called forward
resistance. There are two types of forward resistance.
i. Static resistance or dc resistance (RF)
ii. Dynamic resistance or ac resistance (rF)
Static Forward Resistance RF
It is defined as the ratio of the voltage to the current when p - n junction is used in de circuit and
forward de voltage is applied.
In the Fig.1.16 shown, at point X, the static forward resistance RF is defined as the ratio of de
voltage applied across the p - n junction to the dc current flowing through the p - n junction.
RF = forward dc voltage / forward dc current = OA / OB
The dc resistance will be low when the diode current is high.

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Dynamic Forward Resistance (rF)

The resistance offered by the p - n junction under ac conditions is called dynamic resistance. It is
defined as the reciprocal of the slope of the volt-ampere characteristics.
The change in applied voltage from point A to C in Fig. 1.16 is denoted as ∆ V. The change is
forward current from point B to D is represented as ∆ I.
The dynamic resistance varies inversely with current. At room temperature ac resistance of a diode
is the sum of ohmic resistance and junction resistance.

Reverse Resistance
It is the resistance offered by the PN junction diode under reverse bias condition.. It is very large
compared to the forward resistance, in the order of MΩ.
Static Reverse Resistance (Rf)
It is the reverse resistance under dc applied voltage. It is defined as the ratio of applied reverse
voltage to the reverse saturation current Io.

Dynamic Reverse Resistance (rr)

It is defined as the ratio of incremental change in the reverse voltage applied to the corresponding
change in the reverse current. It is found under ac conditions.

V-I EQUATION OF A DIODE

The mathematical representation of V-I characteristics of diode is called V-I characteristic equation
or diode current equation.
The diode current is represented as

Where
I = diode current, Amperes
Io = reverse saturation current, Amperes
V = Applied voltage, Volts
VT = voltage equivalent of temperature, Volts
η = emission co-efficient, η = 1 for Germanium and η = 2 for Silicon diode
The emission coefficient or ideality factor n represents the recombination occurring in the depletion
region.
The voltage equivalent of temperature indicates the dependence of diode current on temperature.
VT = KT Volts
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K - Boltzmann's constant = 8.62 x 10-5 e V/K

T - Temperature, K
At room temperature 27°C, T = 273 + 27 = 300 K
VT = KT
= 8.62 x 10-5 x 300
= 26 mV T

When voltage applied is zero ie., V = 0

ie., no current flows through the diode.

REAKDOWN IN DIODES
During reverse bias, when the reverse voltage is less than breakdown voltage, the diode current is
also very small due to minority carriers and almost constant at I o. When the reverse voltage is
increased beyond certain limit, the diode current will be maximum. The point at which the current
increases rapidly is called breakdown and the corresponding voltage is called reverse breakdown
voltage.
There are two types of breakdown mechanisms in PN diode. They are
i. Avalanche Breakdown
ii. Zener Breakdown
Avalanche Breakdown
The reverse bias causes a small reverse current to flow in the device. This occurs due to the
movement of minority charge carriers i.e., electrons from P-type and holes from N - type, since
majority carriers move away from the junction.
When the reverse bias is increased, the minority carriers acquire more energy and this kinetic energy
is sufficient to break the covalent bonds of the crystal structure. Thus more valence electrons are
released from the crystal structure. If the applied voltage is increased, then velocity is also increased.
As kinetic energy is directly proportional to square of velocity (K.E = 1/2 m V2), the kinetic energy
of electron also increases.

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If this electron collides with an electron in a covalent bond, then the collision provides enough energy
to the valence electron to break its covalent bond. This process is called as impact ionization.
Hence, electron-hole pairs are created. These electron hole pairs in turn participate in collision and
generate new electron-hole pairs.
This process is called as Avalanche multiplication or Carrier multiplication. It is a cumulative
process and large number of electron - hole pairs are created. The reverse current increases rapidly
and the junction is said to be in breakdown region.
The avalanche breakdown occurs only in lightly doped diodes, where the depletion region is very
wide and the electric field is very low.
Zener Breakdown
Zener breakdown occurs mainly in heavily doped diodes, where the depletion region is very small.
When the diode is reverse biased, the electric field across the depletion region is very large..
Electric field is defined as the ratio of voltage measured to the distance. As the depletion region is
narrow, the electric field is very high (: electric field is inversely proportional to distance).

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This very high electric field breaks the covalent bonds and pulls the electrons out of the valence bands.
Hence, new electron hole pairs are created which increases the reverse current and large amount of reverse
current across the junction. This process is called Zener effect. This leads to breakdown in p- n diode, called
Zener breakdown.
For diodes with reverse breakdown between 5 V & 6 V, both avalanche and Zener mechanisms
occurs if the breakdown voltage is less than 5 V, then Zener breakdown occurs. The breakdown
voltage depends upon the doping level of the junction. This value determines the practical safe
operating voltage called Peak Inverse Voltage (PIV) of a diode. If the operating voltage is less than
PIV rating, the reverse breakdown condition is prevented.
If temperature is increased, the valence electrons acquire high energy levels and minimum voltage is
sufficient to pull electrons from covalent bonds. Thus for small voltage, at higher temperature,
breakdown occurs.
The breakdown voltage decreases as the temperature increases in Zener breakdown. So, Zener
breakdown exhibits negative temperature co-efficient.
In lightly doped diodes, width of depletion region is large. If temperature is increased, the vibration
of atoms in the crystal increases. The charge carriers have less opportunity to impart energy between
collisions to start carrier multiplication. So, voltage should be increased to create breakdown in diode.
Thus breakdown voltage increases as the temperature increases. Hence, Avalanche breakdown has
positive temperature co-efficient.

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TRANSITION OR SPACE CHARGE OR DEPLETION CAPACITANCE

When PN diode is reverse biased, the majority charge carriers move away from the junction and
large immobile carriers are generated near the junction. The width of the space - charge layer
increases with increasing reverse voltage.
Thus the increase in uncovered charge with applied voltage is considered as a capacitor. The two
parallel layers of oppositely charged immobile ions form the two plates of capacitor, C T.

Where dQ/dv - change in charge due to change in voltage

The change in voltage dV in a time dt results in current
I = dQ/dt..................(2)
(1) can be written as

CT = transition, space-charge, barrier or depletion capacitance.

CT is derived for two cases
i. Step-graded junction
ii. Linearly graded junction
i. Step Graded Junction
A PN junction is formed from a single intrinsic semiconductor by doping part of it with acceptor
impurities and the remaining with donors.
There is a sudden step change from acceptor ions on one side to donor ions on the other side.
Trivalent Indium is placed against N-type germanium and heated to high temperature.
Some of the Indium dissolves into the Germanium and N-type Germanium is changed to P-type at
the junction. This step-graded junction is called an alloy or fusion junction.
Consider a PN diode which is asymmetrically doped at the junction. The net charge is zero,

Where NA - Acceptor impurity concentration

ND - Donor impurity concentration
Wp & Wn - Depletion region width of P and N region
q - Magnitude of charge of electron or hole

By poisson's equation,

Integrating the above equation twice

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Width of depletion layer, W increases with applied reverse voltage

Total charge density of P-type material

Differentiate above equation with respect to V

Differentiate (4) with respect to V

Substitute (6) in (5)

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Where
ε - permittivity of the material
A - Cross sectional area of the junction
W - Width of depletion layer
The depletion width W is given by

When no external voltage is applied, width of PN diode is of the order of 0.5 microns. The majority
carriers move across the junction and opposite charges are stored at a distance W apart. This depletion
region acts as dielectric between P and N regions. Thus it acts as a parallel plate capacitor with
transition capacitance CT approximately 20 PF with no external bias. CT ranges from 5 to 200 PF
with applied voltage.
ii. Linearly Graded Junction
The charge density varies linearly with the applied voltage.
Linear graded junction is formed by melting Germanium and its type is changed during the drawing
process by adding first p-type and then n-type impurities. The charge density becomes absolutely
zero at edge distances and W/2 W/2 and varies linearly with distance.

Where k - proportionality constant

Using Poisson's equation

Where V - potential at a distance 'x' from the junction

Integrating (2)

Substitute (4) in (3)

Substitute (5) in (3)

Integrating (6)

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The total potential VJ across the junction from - W/2 to W/2 is given by

The total charge on one side of the layer is

From (7)

Substitute (9) in (8)

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DIFFUIOSN CAPACITANCE
The capacitance which exists in a forward biased junction is called diffusion or storage
capacitance, CD. CD is always larger than transistor capacitance CT.
This capacitance is caused by the injected charge stored near the junction just outside the transition
region.
It is defined as the rate of change of injected charge with applied voltage.
CD = d Q / d V
dQ - change in number of minority carriers outside the depletion region
d V - change in voltage across the diode
Assumption
P side is more heavily doped than N side. Thus current I is carried across the junction only due to
holes moving from P to N side.

The excess minority charge Q existing on N side is given by

Differentiate equation (1) with respect to V

The hole current I is given by Ipn(x) with x = 0

Differentiate Pn(0) with respect to V,

Substitute (2) in (1)

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Where, τ - mean life for holes and electron

Diffusion capacitance CD increases exponentially with forward bias. CD value from 10 to 1000 PF.
CD is inversely proportional to frequency ie it is high at low frequency and low at high frequency.
Applications of PN Diode
An ideal PN junction diode has zero resistance in forward bias and infinite resistance in reverse
bias. Due to these characteristics, the diode has number of applications as follows.
i. Rectifiers in dc power supplies.
ii. Switch in digital logic circuits.
iii. Clipper used in wave shaping circuits in computers, radars, radio and TV receivers.
iv. Clampers used as de restorer in TV receivers.
v. Detector or demodulation circuits.
The PN diode with different doping levels used in
i. Photo detectors (PIN, APD photodiode).
ii. Zener diode in voltage regulators.
iii. Varactor diode in tuners of radio and TV receivers.
iv. LED in digital displays.
v. LASER in optical communication.
vi. Tunnel diodes as microwave oscillator.

PIN DIODE AS RECTIFIER

A rectifier is an electrical device that converts alternating current (ac), which periodically reverses
direction to direct current (dc), which flows in only one direction. This process is called as
rectification. Rectifiers are used in power supplies for radio, television and computer equipment.
A PN diode is a two terminal device which conducts and current flows though it without any
resistance during forward bias condition. When the diode is reverse biased, the diode will not conduct
due to high resistance and no current flows through the diode i.e., diode is in OFF condition.
Thus an ideal diode acts as a switch either ON or OFF depending on the voltage applied to the diode,
since ideal diode has zero resistance under forward bias and infinite resistance under reverse bias.

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HALF-WAVE RECTIFIER
In half-wave rectifier, either positive or negative half of the ac signal is passed, while the other half
is blocked. It converts an ac voltage into a dc voltage during one half of the ac cycle only.
PN diode is used for rectification because of its unidirectional property ie conducts during forward
bias and does not conduct during forward bias and does not conduct during reverse bias. Fig.1.22
shows the circuit diagram of half wave rectifier. Let V i be the input voltage to the primary of the
transformer, and is given as
Where

During positive half cycle of the input signal, the diode is forward biased and the anode of the diode
is more positive with respect to cathode. The diode therefore conducts during positive cycle of the
input voltage.
For an ideal diode, the forward voltage drop is zero, thus the applied input voltage will appear across
the load resistance RL.

During negative half cycle of the input signal, the diode is reverse biased i.e., the anode of the diode
is negative with respect to cathode. Thus the diode D does not conduct due to high impedance. Hence
the input voltage does not appear at the output. Fig.1.23 shows the input and output waveform of
half wave rectifier.
Ripple Factor
The ratio of rms value of ac component to the de component in the output is known as Ripple Factor.

Substitute (2) in (1)

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Average voltage across load, Vav = Vdc

The rms voltage at the load resistance is

Substitute (3) & (4) in (5)

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i.e., amount of ac present in the output is 121% of the de voltage.

Efficiency
The efficiency η is defined as the ratio of dc output power to ac input power.

The maximum efficiency of a half-wave rectifier is 40.6%.

Peak Inverse Voltage
Peak Inverse Voltage (PIV) is defined as the maximum reverse voltage a diode can withstand without
destroying the junction. For half wave rectifier, PIV is Vm i.e., peak of the negative half cycle.

Transformer Utilization Factor (TUF)

This indicates the rating of the transformer. This can be found by the ratio of dc power delivered to

the load to the ac rating of the transformer.

Form factor
It is defined as the ratio of rms value to the average value

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Peak Factor
Peak Factor is defined as the ratio of peak value to the rms value.
Peak factor = peak value/rms value

FULL-WAVE RECTIFIER
Full wave rectifier converts an ac voltage into pulsating dc voltage during both half cycles of the
applied voltage.
Here, two diodes are used, one conducts during positive cycle and the other diode conducts during
negative half cycle of the applied voltage.
A multiple winding transformer is used whose secondary winding is split equally into two halves
with a common centre tapped connection (C).
This configuration results in each diode conducting in turn when its anode terminal is positive with
respect to the transformer center point C.

The full wave rectifier circuit consists of two diodes connected to a single load resistance (R) with each diode
supplying current to the load in turn. The output voltage across the resistor R is the phasor sum of the two
waveforms.
Ripple Factor

The average voltage across the load resistance is

The rms value of voltage at load resistance

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Efficiency

The maximum efficiency of a full wave rectifier is 81.2%

Transformer Utilization Factor (TUF)
The average TUF of full wave rectifier is 0.693.
Form Factor

Peak Factor

Peak Inverse Voltage (PIV)

The peak inverse voltage for full-wave rectifier is 2 Vm.
FULL WAVE BRIDGE RECTIFIER
The center tapping is eliminated in the bridge rectifier. In this rectifier, four diodes are connected to
form a bridge. The ac input voltage is applied to the diagonally opposite ends of the bridge. The other
two ends of the bridge are connected to the load resistance. Fig.1.26 shows the bridge rectifier using
four diodes.

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During positive half cycle of the input voltage, diodes D1 and D3 conduct and diodes D2 and D4 do
not conduct. The current is produced due to diodes D1 and D3 and this current flows through the load
resistance RL.
During negative half cycle of the input ac voltage, diodes D2 and D4 conduct and diodes D1, and D3
do not conduct. The current flows in the load resistance due to diodes D 2 and D4.
The current flows in the same direction in both positive and negative half cycles of the input voltage,
thus an unidirectional output waveform is obtained.
The maximum efficiency of a bridge rectifier is 81.2% and the ripple factor is 0.48. The PIV is V m.
Fig. 1.27 shows the output waveform of bridge rectifier.

Table 1.3. Comparison of Rectifiers

ZENER DIODE
In ordinary PN diode, the doping is light. So, the breakdown voltage is high. If the P and N regions
are heavily doped, then breakdown voltage can be reduced.
When the reverse voltage reaches the breakdown voltage, the current through the junction and the
power dissipation at the junction will be high.
Due to large amount of current, there is possibility of damaging the diode. Therefore, the diodes are
designed with adequate power dissipation capability to operate in the breakdown region. The diode
designed with such specification is called Zener diode, which is heavily doped than ordinary diode.
When doping is heavy, the electric field at the junction will be very high even at low reverse voltage.
The electrons in covalent bonds break away from the bonds. This effect is called as Zener effect.
A diode which exhibits the Zener effect is called Zener diode. Zener diode is a reverse biased heavily
doped diode which operates in the breakdown region. Zener diodes are designed to operate at
voltages ranging from a few volts to several hundred volts.
Symbol

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V-I Characteristics of Diode

When Zener diode is forward biased, the Zener diode operation is similar to that of ordinary PN
diode. Zener diode is specially designed to operate in the reverse / bias condition.

When the reverse voltage is less than the reverse breakdown voltage, the diode carries reverse
saturation current.
When the reverse voltage is greater than the reverse breakdown voltage, the current through the
diode increases rapidly and the voltage across the diode remains constant. Usually Zener diode is
operated in this reverse breakdown region.

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Due to this property, Zener diode is used for providing constant voltage source in voltage regulators.
When the reverse voltage applied to a Zener diode is increased, initially the current through it is very
small, in the order of few μA or less. This is the reverse leakage current of the diode, I o
At certain reverse voltage, the current through Zener diode increases rapidly. This change from a
low value to large current is very sharp. This sharp change is reverse characteristics is called knee of
the curve.
At the knee voltage, the breakdown occurs. The reverse bias voltage at which the breakdown occurs
is called Zener breakdown voltage, Vz.
The current corresponding to the knee point is called Zener knee current, denoted as Izmin
As current is increased, the power dissipation also increases (: P z = Vz Iz). If this power dissipation
increases beyond certain value, the diode may get damaged. The maximum current at which a Zener
diode can operate safely is called Zener maximum current, Izmax.
Equivalent Circuit of Zener Diode
When the breakdown occurs, Iz increases from Izmin to Izmax and, the voltage across Zener diode
remains constant.
The internal Zener impedance decreases as current increases in the Zener region. But this impedance
is very small. Ideally the Zener diode is indicated by a battery of voltage V z which remains fairly
constant.

Fig. 1.31 shows the equivalent circuit of Zener diode. In reverse bias, the resistance is called dynamic
resistance of the Zener diode, r z. The ratio of change in Zener voltage to the change in Zener current

is called Zener resistance.

Zener resistance rz range is in the order of few tens of ohms.
REAKDOWN MECHANISMS IN ZENER DIODE
There are two types of mechanisms due to which breakdown occurs. They are
i. Zener breakdown
ii. Avalanche breakdown
Avalanche Breakdown
When the reverse bias voltage is increased, the field across the junction also increases. Thermally
generated carriers crossing the junction acquire a large amount of kinetic energy from this field.
The velocity of these charge carriers increases and these electrons disrupt covalent bond by
colliding with immobile ions and create new electron-hole pairs.

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These new charge carriers again acquire sufficient energy from the field and collide with other
immobile ions and generate further electron-hole pairs. This process continues and results in
generation of avalanche of charge carriers within a short time. This mechanism of carrier generation
is called as Avalanche multiplication.
This process results in flow of large amount of current at the reverse bias. Zener diodes having Zener
Voltage above 6V exhibit avalanche breakdown and the diode has positive temperature coefficient
i.e., the breakdown voltage increases when the p-n junction temperature is increased. Thus Zener
diode has positive temperature coefficient.
Zener Breakdown
When P and N regions are heavily doped, strong electric field is created which results in direct
rupture of covalent bonds. Hence new electron-hole pairs are generated and the reverse current
begins to increase.
This process occurs at a reverse bias below 6V. Due to heavy doping, the depletion width becomes
very small and the electric field across the depletion region becomes very high of the order of
107 V/m. Thus Zener breakdown occurs.
For lightly doped diodes, the breakdown voltage is high and it is mainly due to Avalanche
multiplication. Thus in Zener diode, breakdown occurs both in lower and higher breakdown voltages
ie both Avalanche and Zener breakdown occurs. Such diodes are called Zener diodes.
Tepemrature Coefficient of Zener Diode
The percentage change in the Zener voltage V, for every °C rise/fall in temperature is called
Temperature Coefficient (TC) of a Zener diode.

If Vz is less than 6 V, the temperature coefficient is negative. For Zener diode with V z greater than
6 V, the temperature coefficient is positive.
ZENER DIODE AS VOLTAGE REGULATOR
When reverse bias is applied, the voltage across the diode remains constant and, the current through
the diode increases.
The voltage across the Zener diode acts as reference voltage and the diode can be used as a voltage
regulator.

In the Fig.1.32 shown, the load resistance should be provided with constant voltage. Zener diode is
reverse biased and if the input voltage is not less than Zener breakdown voltage (V z) then the voltage
across the diode will be constant and thus the load voltage is also constant.
Applications of Zener Diode
i. Voltage regulators.
ii. Zener limiters to clip the unwanted portion of the voltage waveform.
iii. Over voltage protection.
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BIPOLAR JUNCTION TRANSISTOR (BJT)

INTRODUCTION
A Bipolar Junction Transistor (BJT) has three layers of semiconductor material. These are arranged
either in npn sequence or in pnp sequence and each of the three layers has a terminal. A small current
at the central regional terminal controls the much larger total current flow through the device. This
means that the transistor can be used for current amplification. It can also perform voltage
amplification.
CONSTRUCTION
PNP and NPN Transistors
A bipolar junction transistor is simply a sandwich of one type of semiconductor material (p-type or
n-type) between two layers of the opposite type.
A block representation of a layer of p-type material between two layers of n-type is shown in Fig.
1.33(a). This is described as an npn transistor. Fig. 1.33(b) shows a pnp transistor, consisting of a
layer of n-type material between two layers of p-type.

The centre layer is called the base, one of the outer layers is termed the emitter, and the other outer
layer is referred to as the collector.
The emitter, base, and collector are provided with terminals, which are appropriately labeled E, B
and C.
Two pn-junctions exist in each transistor.
i. The collector base junction and
ii. The emitter base junction
Circuit symbols for pnp and npn transistors are shown in Fig. 1.34. The arrow head on each symbol
identifies the transistor either terminal and indicates the conventional direction of current flow. For
an npn transistor, the arrowhead points from the p-type base to the n-type emitter. For a pnp device

the arrowhead points from the p-type emitter to the n-type base. Thus the arrowhead always points
from p to n.
Two transistors packages are there
i. Low power transistor 1 mA to 20 mA current levels
ii. High power transistor - 100 mA to several amps range.
OPERATION ON NPN TRANSISTOR AND PNP TRANSISTOR
NPN Transistor Operation
As shown in Fig.1.35, the forward bias applied to the emitter base junction of an NPN transistor
causes a lot of electrons from the emitter region to crossover to the base region.
As the base is lightly doped with P-type material the number of holes in the base region is very small
and hence the number of electrons that combine with holes in the p-type base region is also very
small. Hence few electrons combine with holes to constitute a base current I B. The remaining

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electrons (more than 95%) crossover into the collector region to constitute collector current I C. Thus
the base and collector current summed up gives the emitter current i.e., IE = - (IC + IB).
In the external circuit of the NPN bipolar junction transistor, the magnitudes of the emitter current
IE, the base current I, and the collector current Ic are related by IE = (IC + IB).

PNP Transistor Operation

As shown in Fig.1.36, the forward bias applied to the emitter base junction of PNP transistor causes
a lot of holes from the emitter region to crossover to the base region as the base is lightly doped with
N type material. The number of electrons in the base region is very small and hence the number of
holes combined with electrons in the N-type base region is also very small. Hence a few holes
combined with electrons to constitute a base current Ig. The remaining holes (more than 95%) cross
over into the collector region to constitute a collector current IC. IE = - (IC + IB).
In the external circuit of the PNP bipolar junction transistor the magnitude of the emitter current IE,
the base current IB and the collector current IC are related by
IE = IC + IB......................... (1)

This equation gives the fundamental relationship between the currents in a bipolar transistor circuit.
Also this fundamental equation shows that there are current amplification factors α and β in common
base transistor configuration and common emitter transistor configuration respectively for the static
(dc) currents and for small changes in the currents.
Large-Signal Current Gain (α)
The large signal current gain of a common base transistor is defined as the ratio of the negative of
the collector-current increment to the emitter-current change from cutoff (IE = 0) to IE i.e.,

Where ICBO (or ICO) is the reverse saturation current flowing through the reverse biased collector-
base junction, i.e., the collector to base leakage current with emitter open. As the magnitude of ICBO
is negligible when compared to IE, the above expression can be written as
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Since IC and IE are flowing in opposite directions, a is always positive. Typical value of α ranges
from 0.90 to 0.995. Also a is not a constant but varies with IE, VCB, and temperature.
General Transistor Equation
In the active region of the transistor, the emitter is forward biased and the collector is reverse biased.
The generalized expression for collector current I C for collector junction voltage VC and emitter
current IE is given by

If VC is negative and | VC | is very large compared with VT, then the above equation reduces to

If VC, i.e., VCB, is few volts, IC is independent of V C. Hence the collector current IC is determined
only by the fraction a of the current IB flowing in the emitter.
From equation (5) we have

Since IC and IE are flowing in opposite directions

The large-signal current gain (β) is defined as,

Comparing the equations (7) and (9) we get the relationship between the leakage currents of

transistor common-base (CB) and common-emitter configurations as

From this equations, it is evident that the collector-emitter leakage current (ICEO) in CE configuration
is (I + β) times larger than that in CB configuration. As I CBO is temperature dependent, ICEO varies
by large amount when temperature of the junction changes.
Expression for Emitter Current
The magnitude of emitter-current is
IE = IC + IB
Substituting equation (7) in the above equation,

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We get

Substituting the equation (6) in the (11), we have

DC Current Gain
The dc current gain is defined as the ratio of the collector current IC to the base current IB. That is

As IC is large compared with ICEO, the large signal current gain (β) and the de current gain (hFE) are
approximately equal.
TYPES OF CONFIGURATION
When a transistor is to be connected in a circuit, one terminal is used as an input terminal, the other
terminal is used as an output terminal and the third terminal is common to the input and output.
Depending upon the input, output and common terminal, a transistor can be connected in three
configurations. They are (i) Common Base (CB) Configuration (ii) Common Emitter (CE) and (iii)
Common Collector (CC) Configuration.
Common Base Configuration

This is also called grounded base configuration. In this configuration, emitter is the input terminal,
collector is the output terminal and base is the common terminal.

The circuit for determining the static characteristics curve of an NPN transistor in the common base
configuration is shown in Fig.1.37.
Input Characteristics
To determine the input characteristics, the collector base voltage V CB is kept constant at zero volt
and the emitter current IE is increased from zero in suitable equal steps by increasing VEB. This is
repreated for higher fixed values of VCB. A curve is drawn between emitter current IB and emitter-
base voltage VEB at constant collector-base voltage VCB. The input chracteristics thus obtained are
shown in Fig. 1.38.
When VCB is equal to zero and the emitter-base junction is forward biased as shown in the
characteristics. The junction behaves as a forward biased diode so that emitter current I E increases
rapidly with small increase in emitter-base voltage V EB
When VCB is increased keeping VEB constant, the width of the base region will decrease. This effect
results in an increase of IE. Therefore, the curves shift towards the left as VCB is increased.

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Output Characteristics
To determine the output characteristics, the emitter current I E is kept constant at a suitable value by
adjusting the emitter-base voltage VEB. Then VCB is increased in suitable equal steps and the collector
current IC is noted for each value of IE. This is repeated for different fixed values of IE. Now the
curves of IC versus VCB are plotted for constant values of IE and the output characteristics thus
obtained is shown in Fig. 1.39.
From the characteristics, it is seen that for a constant value of IE, IC is independent of VCB and the
curves are parallel to the axis of VCB. Further, IC flows even when VCB is equal to zero. As the
emitter-base junction is forward biased, the majority
carriers i.e., electrons from the emitter are injected into the base region. Due to the action of the
internal potential barrier at the reverse baised collector-base junction, they flow to the collector
region and give rise to IC even when VCB is equal to zero.
(i) Input Impedance (hib)
It is defined as the ratio of the change in (input) emitter voltage to the change in (input) emitter
current with the (output) collector voltage VCB kept constant. Therefore,

It is the slope of CB input characteristics IE versus VEB as shown in Fig. 1.38. The typical value of
hit ranges from 20 to 50 Ω.
(ii) Output Admittance (hob)
It is defined as the ratio of the change in (output) collector current to the corresponding change in
the (output) collector voltage with the (input) emitter current IE kept constant. Therefore,

It is the slope of CB output characteristics IC versus VCB as shown in Fig. 1.39. The typical value of
the parameter is of the order of 0.1 to 10 μhos.
(iii) Forward Current Gain (hfb)
It is detected as a ratio of the change in the (output) collector current to the corresponding change
in the (input) emitter current keeping the (output) collector voltage VCB constant. Hence,

It is the slope of IC versus IE curve. Its typical value varies from 0.9 to 1.0.
(iv) Reverse Voltage Gain (hrb)
It is defined as the ratio of the change in the (input) emitter voltage and the corresponding change
in (output) collector voltage with constant (input)emitter current, IE. Hence,

It is the slope of VEB Vs VCB curve. Its typical value is the order of 10-5 to 10-4.
Common Emitter Configuration
Input Characteristics
To determine the input characteristics the collector to emitter voltage is kept constant at zero volt
and base current is increased from zero in equal steps by increasing VBE in the circuit shown in Fig.
1.40.

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The value of VBE is noted for each settling of IB. This procedure is repeated for higher fixed values
of VCE, and the curves of IB Vs VBE are drawn. The input characteristics thus obtained are shown in
Fig. 1.41.

When VCE = 0, the emitter base junction is forward biased and the junction behaves as a forward
biased diode.
Hence the input characteristics for VCE = 0 is similar to that of a forward biased diode. When VCE is
increased the width of the depletion region at the reverse biased collector base junction will increase.
Hence the effective width of the base will decrease. This effect causes a decrease in the base current
IB. Hence to get the same value of Ib as that for VCE = 0, VBE should be increased. Therefore, the
curve shifts to the right as VCE increases.
Output Characteristics
To determine the output characteristics, the base current I B is kept constant at a suitable value by
adjusting base-emitter voltage, VBE. The magnitude of collector- emitter voltage VCE is increased in
suitable equal steps from zero and the collector current I C is noted for each setting VCE. Now the
curves of IC versus VCE are plotted for different constant values of IB. The output characteristics are
obtained shown in Fig. 1.42.

For larger values of VCE, due to Early effect, a very small change in a is reflected in a very large
change in β.
The output characteristics of CE configuration show a larger slope when compared with CB
configuration.
The output characteristics have three regions namely, saturation region, cutoff region and active
region.
The region of curves to the left of the line OA is called the saturation region, and the line OA is called
the saturation line. In this region, both junctions are forward biased and an increase in the base current
does not cause a corresponding large change in IC. The ratio of VCE(sat) to IC in this region is called
saturation resistance.
The region below the curve for IB = 0 is called the cut-off region. In this region, both junctions are
reverse biased. When the operating point for the transistor enters the cutoff region, the transistor is
OFF. Hence the collector current becomes almost
zero and the collector voltage almost equals V CC, the collector supply voltage. The transistor is
virtually an open circuit between collector and emitter.
The central region where the curves are uniform in spacing and slope is called the active region. In
this region, emitter-base junction is forward biased and the collector base junction is reverse
biased. If the transistor is to be used as a linear amplifier it should be operated in the active region.

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Transistor Parameters
The slope of the CE characteristics will give the following four transistor parameters. Since these
parameters have different dimensions, they are commonly known as common emitter hybrid
parameters or h-parameters.
(i) Output Admittance (hoe)
It is defined as the ratio of change in the (output) collector current to the corresponding change in
the (output) collector voltage with the (input) base current IB kept constant. Therefore

It is the slope of CE output characteristic IC Vs VCE. The typical value of this parameter is of the
order of 0.1 to 10 μ mhos.
(ii) Input Impedance (hie)
It is defined as the ratio of the change in (input) base voltage to the change in (input) base current
with the (output) collector voltage VCE kept constant.

It is the slope of CE input characteristics IB versus VBE, the typical value of hie ranges from 500 to
2000 Ω.
(iii) Forward Current Gain (hfe)
It is defined as a ratio of the change in the (output) collector current to the corresponding change in
the (input) base current keeping the (output) collector voltage VCE constant. Hence

It is the slope of IC versus IB curve. Its typical value varies from 20 to 200.
(iv) Reverse Voltage Gain (hre)
It is defined as the ratio of the change in the (input) base voltage and the corresponding change in
(output) collector voltage with constant (input) base current, IB. Hence,

It is the slope of VBE Versus VCE curve. Its typical value is of the order of 10-5 to 10-4.
Common Collector Configuration

The circuit diagram for determining the static characteristics of an NPN transistor in the common
collector configuration is shown in Fig. 1.43.

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Input Characteristics
To determine the input characteristics, V EC is kept at a suitable fixed value. The base-collector
voltage VBC is increased in equal steps and the corresponding increase in I B is noted. This is repeated
for different fixed values of VEC. Plots of VBC versus IB for different values of VEC shown in Fig.
1.44 are the input characteristics.

Output Characteristics
The output characteristics shown in Fig. 1.45 are same as those of the common emitter
configuration.
METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR (MOSFET)
MOSFET is the common term for the Insulated Gate Field Effect Transistor (IGFET). There are
two basic terms of MOSFET (i) Enhancement MOSFET and (ii) Depletion MOSFET.
Principle
By applying a transverse electric field across an insulator, deposited on the semiconducting material,
the thickness and hence the resistance of a conducting channel of a semiconducting material can be
controlled.
In a depletion MOSFET, the controlling electric field reduces the number of majority carriers
available for conduction, whereas in the enhancement MOSFET, application of electric field causes
an increase in the majority carrier density in the conducting regions of the transistor.
ENHANCEMENT MOSFET
Construction
The construction of an N-channel enhancement MOSFET is shown in Fig. 1,50(a) and the circuit
symbols for an N-channel and a P-channel enhancement MOSFET are shown in Fig. 1.50 (b) and
1.50(c) respectively. As there is no continuous channel in an enhancement MOSFET, this condition
is represented by the broken line in the symbols.
Two highly doped N+ regions are diffused in a lightly doped substrate of P-type silicon substrate.
One N+ region is called the source S and the other one is called the drain D. They are separated by

1 mil (10-3 inch). A thin insulating layer of SiO2 is grown over the surface of the structure of SiO2 is
grown over the surface of the structure and holes are cut into the oxide layer, allowing contact with source and
drain. Then a thin layer of metal aluminium is formed over the layer of SiO2. This metal layer covers the entire
channel region and it forms the gate G.

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The metal area of the gate, in conjunction with the insulating oxide layer of SiO 2 and the
semiconductor channel forms a parallel plate capacitor. This device is called the insulated gate FET
because of the insulating layer of SiO2. This layer gives an extremely high input impedance for the
MOSFET.
Operation
If the substrate is grounded and a positive voltage is applied at the gate, the positive charge on G
induces an equal negative charge on the substrate side between the source and drain regions.
The direction of the electric field is perpendicular to the plates of the capacitor through the oxide.
The negative charge of electrons which are minority carriers in the P-type substrate forms an
inversion layer. As the positive voltage on the gate increases, the induced negative charge in the
semiconductor increase. Hence, the conductivity increases and current flows from source to drain
through the induced channel. Thus the drain current is enhanced by the positive voltage as shown in
Fig. 1.51.
DEPLETION MOSFET
The construction of an N-channel depletion MOSFET is shown in Fig. 1.52(a) where an N channel
is diffused between the source and drain to the basic structure of MOSFET.
The circuit symbols for an N-channel and a P-channel depletion MOSFET are shown in Fig. 1.52
(b) and 1.52 (c) respectively.
With VGS = 0 and the drain D at a positive potential with respect to the source, the electrons (majority
carriers) flow through the channel D to S. If the gate voltage is made negative, positive charge
consisting of holes is induced in the channel through SiO2 of the gate channel capacitor. The
introduction of the positive charge causes depletion of mobile electrons on the channel.

Thus a depletion region is produced in the channel. The shape of the depletion region depends on
VGS and VDS. Hence the channel will be wedge shaped as shown in Fig.1.52. When VDS increased,
ID increases and it becomes practically constant at a certain value of VDS, called the Pinch-Off
voltage. The drain current ID almost gets saturated beyond the pinch-off voltage.
Since the current in an FET is due to majority carriers (electrons for an N-type material) the
induced positive charges make the channel less conductive, and ID drops as VGS is made negative.
The depletion MOSFET may also be operated in an enhancement mode. It is only necessary to
apply a positive gate voltage so that negative charges are induced into the N-type channel. Hence
the conductivity of the channel increases and ID increases. As the depletion MOSFET can be
operated with bipolar input signals irrespective of doping of the channel, it is also called as dual
mode MOSFET. The volt ampere characteristics are induced in Fig. 1.51.
The curve of ID versus VGS for constant VDS for is called the transfer characteristics of MOSFET
and is shown in Fig. 1.53.

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UNIJUNCTION TRANSISTOR (UJT)

UJT CONSTRUCTION AND OPERATION
The UJT consists of a bar of lightly doped n-type silicon with a block of P-type material on one side
(Fig. 1.54 (a)). The end terminals of the bar are identified as base 1 (B 1) and base 2 (B2) and the P-
type block is named the emitter (E).
Fig.1.54 (b) shows the UJT equivalent circuit. The resistance of the n-type silicon bar is represented
as two resistors гB1 from B1 to point C, and rB2 from B2 to C as illustrated. The sum of rB1 and rB2 is
called RBB. The P type emitter forms a PN - junction with the n-type silicon bar, and this junction is
shown as a diode (D1) in the equivalent circuit.

With a voltage VB1B2 applied, the voltage at the junction point C is

Note that V1 is also the voltage at the cathode of the diode in the equivalent circuit with the emitter
terminal open-circuited, the resistor current is IB2.
If the terminal is grounded, the PN -junction is reverse biased and there is a small emitter reverse
current (IEO).
Now consider what happens when the emitter voltage (V EB1) is slowly increased from zero. When
VEBI equals V1, the emitter current is zero. Further increase in VEBI forward-biases the PN-junctions
and causes a forward current (IE) to flow from the p -type emitter into the n-type silicon bar. When
this occurs, charge carriers are injected into the r B1 region. Since the resistance of the semiconductor
material is dependent on doping, the additional charge carriers cause the resistance of the rB1 region
to decrease rapidly. The decrease in resistance reduces the voltage drop across rB1 and so the pn
junction in more heavily forward biased. This in turn results in a greater emitter current and more
charge carriers that further reduce the resistance of the rB1 region. (The process is termed as
regenerative).
The input voltage is pulled down, and the emitter current (IE) is increased to a limit deetrmined by
the VEBI Source resistance. The device remains in this on conditions until the emitter input is open-
circuited or until I is reduced to very low level.
The circuit symbol for a UJT is shown in Fig. 1.54 (c). As always, the arowhead points in the
conventional current direction for a forward-biased junction. In this case it points from the p-type
emitter to n-type bar.

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UJT CHARACTERISTICS
A plot of emitter voltage VEBI versus emitter current IE gives the UJT emitter characteristics. Refer
to the UJT terminal voltage and currents shown in Fig. 1.55 (a) and to the equivalent circuit Fig. 1.55
(b) Note that when VB1B2 = 0, IB2 = 0 and V1 = 0
If VEB1 is now increased from zero, the resultant plot of VEB1 and IE is simply the characteristics of a
forward-biased diode with some series resistance. This is the characteristics for I B2 = 0 in Fig. 1.55
(b).

When VB1B2 is 20 V, the level of V1 might be around 15 V1 depending on the resistance of rB1 and
rB2. With VB1B2 = 20 V and VEBI = 0, the emitter junction is reverse-biased and the emitter reverse
current IEO flows as shown at point 1 on the VB1B2 = 20 V characteristic in Fig. 1.55 (b).
Increasing VEBI until it equals V1 gives IE = 0. A further increase in VEBI biases the emitter junction,
and this gives the peak point on the characteristic. At the peak point, VEBI is identified as the peak
voltage (VP) and Ie is termed the peak current (IP).
Until the peak point VP, the UJT is said to be operating in the cut off region of its characteristics.
When VEBI arrives at the peak voltage, charge carriers are injected from the emitter to decrease the
resistance of rB1.
The device enters the negative region, r B1 falls rapidly to a saturation resistance (rS), and VEB1 falls
to the valley voltage (VV). IE also increases to the valley current (IV) at this time increase in
IE causes the device to enter the saturation region, where the sum of V d and IE X VS.

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36
 UNIT II

AMPLIFIERS

INTRODUCTION

An amplifier is defined as the device which increases the magnitude of the input signal
and produces a larger electrical output. The amplifier needs a source of energy for
amplification from battery or de source and filter combination.

The amplifier also has atleast one active device such as BJT, FET or electron tube. This
active device converts the energy from the dc source into the energy at the output of
amplifier.

TYPES OF AMPLIFIERS

If the output signal is directly proportional to the corresponding input signal, then
the amplifier iscalled linear amplifier.

If the output signal is not directly proportional to the input signal, then the amplifier
is called non-linear amplifier.

Linear amplifiers are further classified depending upon the mode of operation i.e.,
the way inwhich the amplifiers operate on the predetermined set of values.

Now let us discuss the operation of small signal amplifiers and analyze its

performance.

SMALL SIGNAL AMPLIFIERS

Small signal indicates that the input signal is very small in the range of few mV.
The amplifierwhich operates on small signal is called small signal amplifier.
As the input signal is small, the transistor will operate in the linear region of its
transfercharacteristics. So, it is called linear amplifier. The output signal will not have
any distortion.

Example: CE, CB and CC amplifier.

LOAD LINE AND OPERATING POINT

BIASING

The process of giving proper supply voltages and resistances for obtaining the desired
operating point is known as biasing.

These voltages and resistances results in a set of dc voltage VCEQ and current ICQ to
operate the transistor in the active region. These voltages and currents are called quiescent
values and they determine the operating point or Q-point for the transistor.

Since the operating point is a fixed point on the transistor characteristics, it is also called
as Quiescent point or Q-point. The circuits used for getting the desired and proper
operating point are known as biasing circuits. For faithful reproduction of input signal, the
transistor should be operated in active region. The collector current for CE amplifier is
given by
the variables β, IB and ICO increase with temperatures .For every 10°C increase in
temperature, ICO doubles itself which leads to increase in IC.. This in turn increases power
dissipation and increases ICO.

This in turn cause IC to increase further and becomes cumulative which leads to thermal
runaway. It will destroy the transistor. Also, the Q-point can shift due to change in
temperature and the transistor enter into saturation region.

Consider the output characteristics of CE amplifier shown in Fig.2.2.

The transistor should meet the following conditions for good amplification.

1. Emitter base junction must be forward biased and collector base junction must be reverse biased.

2. VCE > VCE (sat) for any part of input signal.

3. IC = IC (max) if no signal is applied.

4. Maximum rating of the transistor IC(max), VCE(max) should not be exceeded at

any value ofinput signal.

Consider the Fig.2.3, the values of VCE and RC are fixed.

IC and VCE are

dependent in RB. Apply

KVL to the collector

circuit,

Substitute VCE = 0

Hence, the coordinates of A in Fig. are VCE = 0 and IC =

VCC / RCSubstitute IC = 0 in equation (1)

VCE = VCC
So, coordinates of B are VCE = VCC and IC = 0. Thus the dc load line AB can be drawn
if RC and VCC values are known the straight line represented by AB in Fig. is known as
dc load line.

When a value for maximum possible collector current is considered, the point in Y-
axis is known as saturation point. When maximum possible collector emitter voltage is
considered, the point in X axis is known as cut off point.

A line joining saturation point and cutoff point is known as Load Line. It indicates the
output at theload.

The point at which these two lines intersect is known as operating point or Q- point.

A transistor acts as a good amplifier in active region. When it is operated at Q-point

faithful amplification is achieved

The optimum point is located at the midpoint between A and B. The Q point should be
fixed properly. If Q point gets shifted nearer to either A or B, then the output voltage and
current will be clipped and output signal will be distorted.

Q-point shift occurs depending on

1. Reverse saturation current, ICO which doubles for every 10°C rise in temperature.

2. Base emitter voltage, VBE which decreases by 2.5mW per degree celcius.

3. Transmitter current gain, β which increases with temperature.

AC Load Line

The operating point is selected by drawing dc load line. This point is chosen under
zero input signal condition of the circuit. Therefore ac load line also pass through the
operating point. The effective ac load resistance is given by

VCE (max) locates point D on VCE axis and ICEQ (max) locates point C on IC axis and
ac load line CD is obtained by joining points C and D.

The dc load line is less steep than ac load line as RC > Rac

Stability Factor S

Stability factor helps to indicate the maintenance of operating point i.e it implies the
degree of change in operating point due to change in temperature.
S should be small to have better thermal stability.

Stability factor S' and S".

S' is defined as the rate of change of IC with VBE, while IC and IBE are kept constant.

S" is defined as the rate of change of IC with β, with ICO and VBE kept constant.

BIASING METHOD FOR BJT

TRANSISTOR BIASING

Fixed Bias (or) Base Resistor Method

A common emitter amplifier using fixed bias circuit is shown in Fig. 2.6. The dc
analysis of thecircuit yields the following equation.
Since this equation is independent of current and

t he stabilityfactor is reduced to S = 1 + β

Since β is a large quantity, this is a very poor bias stable circuit. Therefore in practice,
this circuit isnot used for biasing the base.

Advantages

(i) Simplicity

(ii) Small number of components required

(iii) If the supply voltage is very large as compared to VBE of the transistor, then the
base currentbecomes largely independent of the voltage VBE

Collector to Base Bias (or) Biasing with Feedback Resistor

A common emitter amplifier using collector to base bias circuit is shown in Fig.2.7. This
circuit isthe simplest way to provide some degree of stabilization to the amplifier
operating point.
If the collector current I C tends to increase due to either increase in temperature or the
transistor has been replaced by the one with a higher β, the voltage drop across Re.
increases, thereby reducing the value of VCE. Therefore, IB decreases which in turn,
compensates the increase in I e. Thus greaterstability is obtained

The loop equation for this circuit is

This value of the stability factor is smaller than the value obtained by fixed bias circuit.
Also S can be made small and the stability can be improved by making R B small or RC
large.

If RC is very small, then S = (β + 1), i.e., stability is very poor. Hence the value of R C must
be quite large for good stabilization. Thus collector-to-base bias arrangement is not
satisfactory for the amplifier circuits like transformer coupled amplifier where the dc load
resistance in collector circuit is very small. For such amplifiers, emitter bias or self bias
will be the most satisfactory transistor biasing for stabilization.

Self Bias or Emitter Bias

A simple circuit used to establish a stable operating point is the self-biasing configuration.
The self bias, also called as emitter bias, or emitter resistor and potential divider circuit,
that can be used forlow collector resistance, is shown in Fig.2.8.

The current in the emitter resistor RE causes a voltage drop which is in the direction to
reverse bias the emitter junction. For the transistor to remain in the active region the base
emitter junction has to be forward biased. The required base bias is obtained from the
power supply through the potential divider network of the resistance R1 and R2.
Use of Self Bias Circuit as a Constant Current Circuit

If IC tends to increase, say due to increase in I CO with temperature, the current in RE

increases. Hence the voltage drop across RE increases there by decreasing the base current.
As a result IC is maintained almost constant.

To Determine Stability Factor S

Applying Thevenin's theorem to the circuit of Fig. 2.8 for finding the base current, we have

The loop equation around the base circuit can be written as

Differentiating this equation with respect to Ic, we get

The value of S is equal to one if the ratio RB/RE is very small as compared to 1. As this
ratio becomes comparable to unity, and beyond towards infinity, the value of the stability
factor goes on increasing till S = 1 + β.

This improvement in the stability upto a factor equal to 1 is achieved as the cost of power
dissipation. To improve the stability, the equivalent resistance R B must be decreased,
forcing more current in the voltage divider network of R1 and R2.

Often to prevent the loss of gain due to the negative feedback, RE is shunted by a capacitor
CE. The capacitive reactance XCE must be equal to about one-tenth of the value of the
resistance RE at the lowest operating frequency.

BIASING THE MOSFET

Biasing of Enhancement MOSFET

Fig. 2.11 shows the drain-to-gate bias circuit for enhancement mode MOSFET.

This circuit offers the dc stabilization through the feedback resistor Rf. However, the input
resistance is reduced because of Miller effect.

Also the voltage divider biasing technique given for JFET can be used for the
enhancement MOSFET. Here, the dc stability is accomplished by the de feedback through
RS.

But the self bias technique given for JFET cannot be used for establishing an operating
point for the enhancement MOSFET because of the voltage drop across RS is in a direction
to reverse bias the gate and it actually needs forward gate bias.

Fig. 2.12 shows an N- channel enhancement mode MOSFET common source circuit with
source resistor. The gate voltage is

and the gate to

source voltage is VGS

= VDD - VG

Assuming that VGS > VTN and the MOSFET is biased in the saturation region, the drain current is

Here the threshold voltage VTN and conduction parameter KN are functions of

temperature.The drain to source voltage is

VDS = VDD – ID RD
If VDS > VDS (sat) = VGS – VTN, then the MOSFET is biased in the saturation region. If VDS <
VDS (sat) = VGS – VTN, then the MOSFET is biased in the non saturation region, and the
drain current is given by

Biasing Depletion MOSFET

Both the self-bias technique and voltage divider bias circuit given for JFET can be used
to establishan operating point for the depletion mode MOSFET.

BJT SMALL SIGNAL MODEL

TRANSISTOR AS A TWO PORT DEVICE

A transistor can be treated as a two-port network. The voltage and current at port 1
are V1 and i1 and the voltage and current at port 2 are V2 and i2 as shown in Fig. 2.13. Any
two parameters are considered to be independent variables and the other two parameters
are expressed in terms of the independent variables.

Hybrid Parameters

The hybrid or h parameters are used for analysis of the transistor.

If the input current i1 and the output voltage V2are taken as independent variables, then
the inputvoltage V1 and output current i2 are expressed in terms of i1 and V2.

Since the units of the four parameters are completely different from each other, these
parametersare called hybrid parameters.
The four hybrid parameters h11, h12, h21, h22 are defined as

The units of the h-parameters h11 and h22 are Ω and m ho respectively. h12 and h21 are dimensionless.

As the units of h-parameters are different they are called hybrid parameters. The
values of h-parameters depend upon

1. Transistor type

2. Transistor configuration

3. Operating point

4. Frequency

5. Temperature

Advantages of h-Parameters

i. Easy to measure from static characteristics of transistor

ii. Simple conversion from one configuration to other

iii. Used upto radio frequencies

iv. Convenient for circuit analysis and design

SMALL SIGNAL ANALYSIS

The operation of an amplifiers in the mid band region of its frequency response is
analyzed. So it isalso called midband analysis.

Assumptions

i. All the coupling and bypass capacitors are equivalent to short circuit.

ii. All the internal capacitances of the transistor are open circuited.

Steps

i. Draw the ac equivalent circuit of the amplifiers.

ii. Draw the hybrid equivalent circuit.

iii. Calculate input impedance, output impedance, current gain, voltage gain and power
gain of theamplifier.

ANALYSIS OF CE AMPLIFIER

Let us analysis the Common Emitter (CE) amplifier as follows

Step 1: Draw ac equivalent circuit of the amplifier. Table 3.1 shows the ac equivalent
circuit fordifferent elements.
To draw the ac equivalent circuit of the amplifier, the following steps should be followed.

i. Replace the dc voltage source by a short circuit.

ii. Replace coupling and bypass capacitor by the short circuit.

Step 2: Hybrid Equivalent Circuit

From the ac equivalent circuit, the hybrid equivalent circuit can be obtained as the ac shown in Fig.
2.15. The above Fig.2.15 can also be drawn as in Fig. 2.16 by connecting the common ground.
Input Impedance

From the Fig., the input impedance can be calculated as

If RB >> hie, then

Output Impedance

It is defined as the impedance determined with input

voltage Vi = 0From Fig., if Vi = 0, then Ib = 0

⇒ hfe Ib = 0

ie., the current source is open circuited

So

Voltage Gain

Voltage gain is defined as the ratio of output voltage to input voltage.

The negative sign implies that there is 180° phase shift between input and output signals.
Current Gain

Curent gain is the ratio of output current to input current.

CE AMPLIFIER WITH EMITTER RESISTOR AND BYPASS CAPACITANCE

A common emitter amplifier circuit is shown in Fig.2.17, the circuit consists of

biasing resistorsR1 and R2, the temperature stabilization resistor RE collector resistor RC.

The bypass capacitor 'C' is used to eliminate ac degeneration ie it bypass all ac signal
and increasethe output gain.

i. The coupling capacitor C1 connects the signal source with the transistor base. C2
couples externalload resistor R L to the collector of transistor.

ii. C1 and C2 avoids the loading effect between input and output.
Operation

When the input voltage is increased in positive direction, VBE is increased. Thus
collector currentIC increases, the voltage drop occurs across RC.

Apply KVL to collector circuit,

Input Impedance

Apply KVL to input circuit

We know that

Output Impedence

Looking into emitter and collector terminal

The output impedance is given by

Voltage gain

Current Gain
Load Current

Power Gain

Characteristics of CE Amplifier

i. Good voltage gain

ii. Phase inversion i.e., output voltage is 180° out of phase with input

iii. Good current gain and power gain

iv. High input and output impedance

Applications

i. Voltage amplifier

COMMON BASE (CB) AMPLIFIER ANALYSIS

The base terminal is common between the input and output circuit. The input is applied
to emitterterminal and output is taken from the collector terminal.

Construction

The common base amplifier is shown in Fig. 2.19. The potential divider bias is
applied throughresistors R1 and R2.

i. The load resistor RL is connected to transistor collector terminal.

ii. The signal source is coupled to the transistor emitter through C2.

iii. Capacitor C1 constitutes an ac short circuit from the base terminal to ground. So,
all the inputvoltage appear across base emitter junction.

iv. Capacitor C3 acts as coupling capacitor and it prevents the loading effect due to RC and RL.
Operation

i. During positive half of input signal, the emitter terminal is positive and the base
remains at aconstant potential.

ii. Therefore, a positive - going signal reduces base-emitter voltage VBE which in
turn reducescollector current IC. Thus the voltage drop across the collector resistor also
decreases.

Apply KVL to the output circuit

If IC reduces, then VO ≈ VCC and there is no phase shift between the input and output.

i. During negative half cycle of input, the emitter terminal is negative. Thus

forward bias across Base-Emitter junction increases which in turn increases the collector current.

ii. The voltage drop across RC increases ie IC RC > VO. Thus the output voltage (VO =
VCC IC RC)decreases, and the output is negative value.

Fig.2.20 shows the small signal hybrid equivalent of CB amplifier.

In this circuit, only a fraction of output voltage is fed back to input i.e. hrb is very small
and can beneglected.

Input Impedance

Apply KVL to Fig. 2.20,

The input impedance can be written as

Output Impedance

The output impedance can be written as

Voltage Gain

Current Gain
Power Gain

Characteristics of CB Amplifier

i. provides voltage gain and power gain

ii. High output impedance and very low input impedance

iii. No current gain

Application

i. High frequency voltage amplifier

COMMON COLLECTOR AMPLIFIER

The collector terminal is common between the input and output terminals. The input is
applied atthe base and the output is taken across the emitter terminal.

Construction
i. The collector base junction acts as input and emitter base junction acts as output.

ii. The output voltage exactly follows the input voltage variations. Hence it is
called "Emitterfollower" amplifier.

iii. The load resistor RL is capacitor coupled to the emitter terminal of the transistor.

iv. The circuit employs emitter current bias through the voltage divider resistors R1 and R2.

The capacitor C1 and C2 act as input and output coupling capacitors.

Operation

i. When an ac signal is applied to transistor base via C1, VB is increased and decreased as
the signalvaries from positive to negative voltage variations.

VB – VBE

ii. Thus the output voltage from a common collector circuit is same as its input voltage.
So the CCamplifier has unity voltage gain.
Analysis of Emitter Follower Amplifier

Input Impedance

From Fig.2.22, Applying KVL

The Input voltage

Substitute
The input impedance is given by

Output Impedance

The input signal is assumed to be zero

The output impedance

Voltage Gain
Current Gain

Current gain

Applying current division rule,

Substitute IB value in IE
for CC amplifier RB >> ZB

Power Gain

Characteristics of CC Amplifier

i. Provides current gain and power gain

ii. high input impedance and very low output impedance

iii. No voltage gain.

Applications

1. As buffer amplifier since voltage gain is unity

2. Impedance matching network.

COMPARISON OF CE, CB AND CC AMPLIFIERS
MOSFET SMALL SIGNAL MODEL

The small signal model of MOSFET can be obtained similar to JFET. Fig.2.23 shows
the smallsignal equivalent circuit of MOSFET.

Since gate is insulated from channel by gate-oxide, input resistance of transistor is infinite.

i. Small signal parameters are controlled by the Q-point. For the same operating point,
MOSFEThas lower transconductance and an output resistance that is similar to the BJT.

ii. In saturation mode, MOSFET acts as a voltage controlled current source. The control
voltage isVGS an the output current is iD.

STEPS INVOLVED IN SMALL-SIGNAL ANALYSIS OF MOSFET

Step 1: Complete a DC analysis

The goal of this DC analysis is to determine

(a) the dc voltage VGS for MOSFET

(b) the de voltage VDS for MOSFET

Step 2: Calculate the small signal circuit parameters for the MOSFET.

Step 3: Replace all MOSFETs with their small-signal circuit model.

Step 4: Set all dc sources to zero.

Step 5: Analyze small-signal circuit.

MOSFET COMMON SOURCE SMALL-SIGNAL AMPLIFIER ANALYSIS

The common source MOSFET amplifier is shown in Fig.2.24.

Construction

CC1 and CC2 are the coupling capacitors and the capacitor CS is bypass capacitor. The
capacitancevalues are chosen to be large so that their reactances are very small at the

operating frequency.

Analysis

Fig. 2.25 shows the small signal equivalent circuit for the common source MOSFET amplifier.

We will calculate the input and output impedances, current and voltage gain similar to
BJT andFET.
Input Impedance

From the Fig.2.25, and noting that ig = 0

Output Impedance

To calculate the output impedance, we

get VS = 0When VS = 0 ⇒ gm VGS = 0

The input impedance of the dependent current source is infinite. Thus output
impedance is writtenas

Voltage Gain

Overall Voltage Gain

Applying voltage division rule

Substitute Rin = RG from input impedance (1)

Substitute (4) in (3)

Substitute (2)

Current Gain

Using current division rule

At the input,

Substitute (8) in (7)

When RG → ∞, AV = ∞

The equation (9) gives the overall current gain of CS amplifier.

Properties
i. High input impedance

ii. High output impedance

iii. Relatively high small-signal voltage gain

iv. Very high small-signal current gain

MOSFET COMMON DRAIN (SOURCE FOLLOWER) AMPLIFIER

The input signal is fed at the gate similar to the common source amplifier. The
signal output istaken at the source terminal. The source follower using MOSFET is
shown in the Fig. 2.26.

The small equivalent circuit for source follower MOSFET is shown in Fig 2.27.
Input Impedance

With VS = 0 and ig = 0, the input impedance can be

written asRm = RG

Output Impedance

The output impedance is given by

Voltage Gain

The output voltage is given by

The input voltage is obtained using voltage division as

Therefore it is called source follower

Current Gain

The short circuit small-signal AC current gain can be determined as follows, let ig = 0
Properties

i. Non-inverting amplifier

ii. Very large input impedance

iii. Small output impedance

iv. Voltage gain AV ≤ 1

v. Large small-signal current gain

GAIN AND FREQUENCY RESPONSE OF HIGH FREQUENCY ANALYSIS

GAIN AND FREQUENCY RESPONSE OF BJT AMPLIFIER

Fig.2.28 shows the high frequency equivalent circuit of CE amplifier. All the coupling
and bypasscapacitors have been assumed to be short circuited and wiring capacitance is
ignored.
The Fig. 2.29, can be simplified using Millers theorem as follows.

The input and output feedback capacitance Cb'c are replaced by the input and output
shuntingcapacitances. Fig. 2.29 shows the modified circuit of CE amplifier.

Let us find the Thevenin's equivalent circuit of the input circuit.

The Thevenin's imopedance Rth is the impedance looking from B and E. To calculate Rth
asume VS to be short circuited and Ceq is open circuited. Then Thevenin's voltage is
measured as the open circuit voltage measured across B and E.

The Thevenin's voltage is obtained as

The simplified Thevenin's circuit is shown Fig.2.30.

From the Thevenin's equivalent circuit,

where = upper 3dB cutoff frequency of
input circuitConsider the output circuit,

upper frequency of output circuitWe kno w that

g ain,

Substitute (1) and (2)

Hence AV can be written as

This expression gives the voltage gain of the BJT amplifier.

GAIN AND FREQUENCY RESPONSE OF FET AMPLIFIER

The equivalent circuit of FET amplifier is shown in Fig.2.31. The capacitors Cgs and Cgd
in a JFETare due to reverse biased gate.

i. The capacitance between the source and the gate Cgs is similar to the collector base
capacitanceCb'e and the capacitance between drain and gate is similar to emitter base
capacitance Cb'e
This equivalent circuit can be modified using Miller's Theorem as shown in Fig.2.32.

The input/output feedback capacitance Cgd is replaced by input/output shunting

capacitance similarto BJT analysis.

The Thevenin's equivalnt circuit for the above circuit is obtained as shown in Fig.2.33.
Applying voltage

division rule,The

output voltage,
Applying voltage division rule to the input circuit

Where ω21 = upper 3 dB cutoff frequency due to

input circuitOverall voltage gain,

The lowest value of ω21, ω22 is selected as upper 3 dB frequency of the amplifier.

FREQUENCY RESPONSE OF MULTISTAGE AMPLIFIERS

Need for Multistage Amplifiers

1. When amplification of single stage amplifier is not sufficient.

2. When input or output impedance is not of correct magnitude for the intended application.

3. To increase the overall gain.

Consider the cascading of 'n' CE amplifier stages as shown in Fig. 2.34.

Voltage Gain

The voltage gain of the cascaded amplifier is defined as the product of the individual
voltage gainsof each stage.

Total voltage gain is written as

The magnitude of voltage gain is the product of the magnitudes of the voltage
gain of each stage.The phase shift is the sum of phase shift introduced by each
stage.

The voltage gain can be expressed in terms of current gain as

The current gain and input impedance of the nth stage is given by

The current gain and the input impedance can be calculated at every stage by
replacing 'n' by thecorresponding stage.
 UNIT III MULTISTAGE AMPLIFIERS AND TUNED AMPLIFIERS
Multistage Amplifiers

In practice, we need amplifier which can amplify a signal from a very weak source such
as a microphone, to a level which is suitable for the operation of another transducer suchas
loudspeaker. This is achieved by cascading number of amplifier stages, known as multistage
amplifier

Need for Cascading

For faithful amplification amplifier should have desired voltage gain, current gain and it should
match its input impedance with the source and output impedance with the load. Many times
these primary requirements of the amplifier cannot be achieved with single stage amplifier,
because of the limitation of the transistor/FET parameters. In such situations more than one
amplifier stages are cascaded such that input and output stages provide impedance matching
requirements with some amplification and remaining middle stages provide most of the
amplification.
We can say that,

• When the amplification of a single stage amplifier is not sufficient,

Or

• When the input or output impedance is not of the correct magnitude, for a
particular application two or more amplifier stages are connected, in cascade. Such
amplifier, with two or more stages is also known as multistage amplifier.

• Two Stage Cascaded Amplifier

Figure: 1 Two Stage Cascaded Amplifier

 • Vi1 is the input of the first stage and Vo2 is the output of second stage. So,
Vo2/Vi1 is the overall voltage gain of two stage amplifier.

N-Stage Cascaded Amplifier

Figure: 2 N-Stage Cascaded Amplifier

Voltage gain:
The resultant voltage gain of the multistage amplifier is the product of voltage gains ofthe
various stages.

Av = Avl Av2 ... Avn Gain in Decibels

In many situations it is found very convenient to compare two powers on logarithmic scale
rather than on a linear scale. The unit of this logarithmic scale is called decibel (abbreviated
dB). The number N decibels by which a power P2 exceeds the power P1 isdefined by Decibel,
dB denotes power ratio. Negative values of number of dB means that the power P2 is less than
the reference power P1 and positive value of number of dB meansthe power P2 is greater than
the reference power P1.For an amplifier, P1 may represent input power, and P2 may represent
output power.Both can be given as. Where Ri and Ro are the input and output impedances of
the amplifier respectively. Then,If the input and output impedances of the amplifier are equal
i.e. Ri = Ro= R, thenGain of Multistage Amplifier in dB.
The gain of a multistage amplifier can be easily calculated if the gains of the individual stages
are known in dB, as shown below

20 log10 Av = 20 log10 Avl + 20 log10Av2 +… + 20 log10 Avn

Thus, the overall voltage gain in dB of a multistage amplifier is the decibel voltage Gains of the
individual stages. It can be given as

Av dB = Av l dB + Av2dB + ... + Av n dB

Advantages of Representation of Gain in Decibels

• Logarithmic scale is preferred over linear scale to represent voltage andpower

gains because of the following reasons:

• In multistage amplifiers, it permits to add individual gains of the stages to

calculate overall gain.

• It allows us to denote, both very small as well as very large quantities of linear,
scale by considerably small figures.

• For example, voltage gain of 0.0000001 can be represented as -140 dB and

voltage gain of 1, 00,000 can be represented as 100 db.

• Many times output of the amplifier is fed to loudspeakers to produce sound which is
received by the human ear. It is important to note that the ear responds to the sound
intensities on a proportional or logarithmic scale rather than linear scale. Thus use
of dB unit is more appropriate for representation of amplifier gains.

Methods of coupling Multistage Amplifiers

In multistage amplifier, the output signal of preceding stage is to be coupled to the input
circuit of succeeding stage. For this inter stage coupling, different types of coupling
elements can be employed.
RC coupling

Figure shows RC coupled amplifier using transistors. The output signal of first stage is coupled
to the input of the next stage through coupling capacitor and resistive load atthe output
terminal of first stage
 Figure: 3 RC coupling
[Source: “Electronic devices and circuits” by “Balbir Kumar, Shail.B.Jain]

The coupling does not affect the quiescent point of the next stage since the coupling capacitor
Cc blocks the d.c. voltage of the first stage from reaching the base of the second stage. The
RC network is broadband in nature. Therefore, it gives a wideband frequency response without
peak at any frequency and hence used to cover a complete A.F amplifier bands. However its
frequency response drops off at very low frequencies due to coupling capacitors and also at
high frequencies due to shunt capacitors such as stray capacitance.

Transformer Coupling

Figure shows transformer coupled amplifier using transistors. The output signal of first stage is
coupled to the input of the next stage through an impedance matching

Figure: 4. Transformer Coupling

 This type of coupling is used to match the impedance between outputs an input cascadedstage.
Usually, it is used to match the larger output resistance of AF power amplifier to a low
impedance load like loudspeaker. As we know, transformer blocks are providing d.c isolation
between the two stages. Therefore, transformer coupling does not affect the quiescent point of
the next stage.

Frequency response of transformer coupled amplifier is poor in comparison with that anRC
coupled amplifier. Its leakage inductance and inter winding capacitances does not allow
amplifier to amplify the signals of different frequencies equally well. Inter winding
capacitance of the transformer coupled may give rise resonance at certain frequency which
makes amplifier to give very high gain at that frequency. By putting shunting capacitors across
each winding of the transformer, we can get resonance at anydesired RF frequency. Such
amplifiers are called tuned voltage amplifiers. Theseprovide high gain at the desired of
frequency, i.e. they amplify selective frequencies. For this reason, the transformer-coupled
amplifiers are used in radio and TV receivers for amplifying RF signals.

Figure: 5 Frequency response of transformer coupled amplifier

Direct Coupling

Figure shows direct coupled amplifier using transistors. The output signal of first stage is
directly connected to the input of the next stage. This direct coupling allows the quiescent
 d.c. collector current of first stage to pass through base of the next stage, affecting its biasing
conditions.

Figure: 6 Direct Coupling

[Source: “Electronic devices and circuits” by “Balbir Kumar, Shail.B.Jain]

Due to absence of RC components, frequency response is good but at higher frequenciesshunting

capacitors such as stray capacitances reduce gain of the amplifier. The transistor parameters such
as VBE and β change with temperature causing the collector current and voltage to change.
Because of direct coupling these changes appear at the base of next stage, and hence in the output.
Such an unwanted change in the output is called drift and it is serious problem in the direct coupled
amplifiers.

Cascode amplifier

The cascode amplifier is combination of common-emitter and common-base amplifier. While the
C-B amplifier is known for wider bandwidth than the C-E configuration, the low input impedance
(10s of Ω) of C-B is a limitation for many applications. The solution is to precede the C-B stage
by a low gain C-E stage which has moderately high input impedance (kΩs).

• A common-base configuration is not subject to the Miller effect because the grounded base
shields the collector signal from being fed back to the emitter input. Thus, a C-B amplifier
has better high frequency response.
 • The way to reduce the common-emitter gain is to reduce the load resistance. The gain of
a C-E amplifier is approximately RC/re.
• The collector load RC is the resistance of the emitter of the C-B stage loading the C-E
stage.
• CE gain amplifier gain is approximately Av = RC/re=1. This Miller capacitance is
• Cmiller = Ccbo(1-Av) = Ccbo (1-(-1)=2Ccbo.

• We now have a moderately high input impedance C-E stage without suffering the Miller
effect,
but no C-E stage voltage gain.
• The C-B stage provides a high voltage gain.
• The total current gain of cascode is β as current gain of the C-E stage is 1 for the C-B is
β.
• A cascode amplifier has a high gain, moderately high input impedance, a high output
impedance, and a high bandwidth.

The cascode amplifier

The cascode amplifier includes two-stages like a CE (common-emitter) stage

and CB (common-base) stage where the CE is feeding into a CB. As we compared
with a single stage of an amplifier, the combination of this can have different
characteristics like high input/output isolation, high i/p impedance, high o/p
impedance and high bandwidth.
In current circuits, this amplifier can be frequently used by using two transistors
namely BJTs otherwise FETs. Here one transistor works like a CE or common source
whereas others work like a CB or common gate. This amplifier enhances i/o isolation
like there is no straight coupling from the o/p to i/p which reduces the miller effect &
therefore supplies high bandwidth.

Cascode Amplifier Circuit

The Cascode amplifier circuit using FET is shown below 2.8.1. The input stage
of this amplifier is a common source of FET & the Vin (input voltage) which is
connected to its gate terminal. The output stage of this amplifier is common gate of
FET which is ambitious by the input phase. The drain resistance of the o/p stage is Rd
and the Vout (output voltage) can be taken from the secondary transistor’s drain
terminal.
As the gate terminal of Q2 transistor is grounded, then the source voltage and
the drain voltage of transistors are held almost stable. That means the higher Q2
transistor provides a low i/p resistance toward the lower Q1 transistor. This decreases
the lower transistor’s gain & thus the Miller effect also gets decreased. SO bandwidth
will increase.

Figure 2.8.1 Two Stage Cascade Amplifier

The gain reduction in the lower transistor does not influence the total gain as
the upper transistor reimburses it. The upper transistor will not influenced by the
Miller effect as the charging & discharging from drain to source drift capacitance can
 be carried out using the drain resistor. The frequency response, as well as load,
influenced simply for high frequencies.
In this circuit, the isolation of output can be done from the input. The lower
transistor includes approximately stable voltage at the terminals of source & drain
while the upper transistor includes nearly stable voltage at While the C-B (common-
base) amplifier is known for wider bandwidth than the C-E (common-emitter)
configuration, the low input impedance (10s of Ω) of C-B is a limitation for many
applications. The solution is to precede the C-B stage by a low gain C-E stage which
has moderately high input impedance (kΩs).its two terminals. Basically there is no
feedback from the o/p to i/p. So the two terminals are isolated well using a middle
connection of stable voltage.

For a two-transistor circuit, the parts count is extremely low.

Disadvantages
This amplifier requires two transistors with high voltage supply. For the two-
transistor cascode, two transistors should be biased through sufficient VDS in process,
striking a lesser limit on the voltage supply.
The cascode amplifier is combined common-emitter and common-base. This is an AC
circuit equivalent with batteries and capacitors replaced by short circuits.
Bandwidth Capacitance and the Miller Effect
The key to understanding the wide bandwidth of the cascode configuration
is the Miller effect. The Miller effect is the multiplication of the bandwidth
robbing collector-base capacitance by voltage gain Av. This C-B capacitance
is smaller than the E-B capacitance. Thus, one would think that the C-B
capacitance would have little effect. However, in the C-E configuration, the
collector output signal is out of phase with the input at the base. The collector
signal capacitively coupled back opposes the base signal. Moreover, the
collector feedback is (1-Av) times larger than the base signal. Keep in mind
that Av is a negative number for the inverting C- E amplifier. Thus, the small
C-B capacitance appears (1+|Av|) times larger than its actual value. This
capacitive gain reducing feedback increases with frequency, reducing the
high frequency response of a C-E amplifier.

D.C. Analysis of Differential Amplifier

• The d.c. analysis means to obtain the operating point values i.e. I CQ and
VCEQ for the transistors used. The supply voltages are d.c. while the input
signals are a.c., so d.c. equivalent circuit can be obtained simply by
reducing the input a.c. signals to zero. The d.c. equivalent circuit thus
obtained is shown in the Fig. 8.7.1. Assuming RS1 = RS2, the source
resistance is simply denoted by RS.

• The transistors Q1 and Q2 are matched transistors and hence for such a
matched pair we can assume :

i) Both the transistors have the same characteristics.

ii) REI = RE2 hence RE = RE1 || RE2 .

iii) RC1 = RC2 hence denoted as RC.

iv) |VCC| = |VEE| and both are measured with respect to ground.

• As the two transistors are matched and circuit is symmetrical, it is enough

to find out operating point ICQ and VCEQ, for any one of the two transistors.
The same is applicable for the other transistor.

• Applying KVL to base-emitter loop of the transistor Q1

From the equation (8.7.6), we can observe that

i) RE determines the emitter current of Q1 and Q2 for the known value of

VEE
ii) The emitter current through Q1 and Q2 is independent of collector
resistance RC.

• Now let us determine VCE. As IE is known and IE ≅ IC, we can

determine the collector voltage of Q1 as

VC = VCC – IC – IC RC …. (8-7.7)

Neglecting the drop across RS, we can say that the voltage at the emitter
of Qi is approximately equal to -VBE. Hence the collector to emitter
voltage is

Key Point : In the equation (8.7.6), the sign of VEE is already considered
to be negative, while deriving it. Hence while using this equation to solve
the problem, only the magnitude of VEE should be used and negative sign
of VEE should not be used again.

Thus for both the transistors, we can determine operating point values,
using equations (8.7.6) and (8.7.8). With the same biasing arrangement, the
d.c. analysis remains same for all the four possible configurations of
differential amplifier.
 UNIT - III

TUNED AMPLIFIERS

Introduction to tuned circuits

When a radio or television set is turned on, many events take place within the
"receiver" before we hear the sound or see the picture being sent by the
transmitting station. Many different signals reach the antenna of a radio receiver
at the same time. To select a station, the listener adjusts the tuning dial on the
radio receiver until the desired station is heard. Within the radio or TV receiver,
the actual "selecting" of the desired signal and the rejecting of the unwanted
signals are accomplished by means of a tuned circuit.
A tuned circuit consists of a coil and a capacitor connected in series or parallel.
Whenever the characteristics of inductance and capacitance are found in a tuned
circuit, the phenomenon as RESONANCE takes place.

Resonance circuits

The frequency applied to an LCR circuit causes XL and XC to be equal, and the
circuit is RESONANT. If XL and XC are equal ONLY at one frequency (the
resonant frequency). This fact is the principle that enables tuned circuits in the
radio receiver to select one particular frequency and reject all others.

This is the reason why so much emphasis is placed on XL and X C . figure 1-1
Shows that a basic tuned circuit consists of a coil and a capacitor, connected either
in series, view (A), or in parallel, view (B). The resistance (R) in the circuit is
usually limited to the inherent resistance of the components (particularly the
resistance of the coil).

[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]
Tuned amplifier
✓ Communication circuit widely uses tuned amplifier and they are used in MW
& SW radio frequency 550 KHz – 16 MHz, 54 – 88 MHz, FM 88 – 108 MHz,
cell phones 470 - 990 MHz
✓ Band width is 3 dB frequency interval of pass band and –30 dB frequency
interval
✓ Tune amplifiers are also classified as A, B, C similar to power amplifiers based
on conduction angle of devices.

Series resonant circuit

Series resonant features minimum impedance (RS) at resonant.
✓ f r = ½ √LC; q = L/Rs at resonance L=1/c, BW=fr/Q
✓ It behaves as purely resistance at resonance, capacitive below and inductive
above resonance
Paralel resonant circuit
✓ Paralel resonance features maximum impedance at resonance = L/RsC
✓ At resonance Fr=1/2√1/(LC-Rs2/L2); if Rs=0, fr=1/2√(LC)
✓ At resonance it exhibits pure resistance and below fr parallel circuit exhibits
inductive and above capacitive impedance

Need for tuned circuits:

To understand tuned circuits, we first have to understand the phenomenon of self-

induction. And to understand this, we need to know about induction. The first
discovery about the interaction between electric current and magnetism was the
realization that an electric current created a magnetic field around the conductor.
It was then discovered that this effect could be enhanced greatly by winding the
conductor into a coil. The effect proved to be two-way: If a conductor, maybe in
the form of a coil was placed in a changing magnetic field, a current could be
made to flow in it; this is called induction.

So imagine a coil, and imagine that we apply a voltage to it. As current starts to
flow, a magnetic field is created. But this means that our coil is in a changing
magnetic field, and this induces a current in the coil. The induced current runs
contrary to the applied current, effectively diminishing it. We have discovered
self-induction. What happens is that the self-induction delays the build-up of
current in the coil, but eventually the current will reach its maximum and stabilize
at a value only determined by the ohmic resistance in the coil and the voltage
applied. We now have a steady current and a steady magnetic field. During the
buildup of the field, energy was supplied to the coil, where did that energy go? It
went into the magnetic field, and as long as the magnetic field exists, it will be
stored there.

Now imagine that we remove the current source. Without a steady current to
uphold it, the magnetic field starts to disappear, but this means our coil is again
in a variable field which induces a current into it. This time the current is in the
direction of the applied current, delaying the decay of the current and the magnetic
field till the stored energy is spent. This can give a funny effect: Since the coil
must get rid of the stored energy, the voltage over it rises indefinitely until a
current can run somewhere! This means you can get a surprising amount of sparks
and arching when coils are involved. If the coil is large enough, you can actually
get an electric shock from a low-voltage source like an ohmmeter.

Applications of tuned amplifier

A tuned amplifier is a type of electronic device designed to amplify specific

ranges of electrical signals while ignoring or blocking others. It finds common
use in devices that work with radio frequency signals such as radios, televisions,
and other types of communication equipment; however, it also can be useful in
many other applications. Tuned amplifiers can be found in aircraft autopilot
systems, audio systems, scientific instruments, spacecraft, or anywhere else there
is a need to select and amplify specific electronic signals while ignoring others.

The most common tuned amplifiers an average person interacts with can be found
in home or portable entertainment equipment, such as FM stereo receivers. An
FM radio has a tuned amplifier that allows listening to only one radio station at a
time. When the knob is turned to change the station, it adjusts a variable
capacitor, inductor, or similar device inside the radio, which alters the inductive
load of the tuned amplifier circuit. This retunes the amplifier to allow a different
specific radio frequency to be amplified so a different radio station can be heard.

CLASSIFICATION:
 1. Single tuned amplifier
2. Double tuned amplifier
3. Stagger tuned amplifier

1. Single tuned amplifier

Single Tuned Amplifiers consist of only one Tank Circuit and the amplifying
frequency range is determined by it. By giving signal to its input terminal of
various Frequency Ranges. The Tank Circuit on its collector delivers High
Impedance on resonant Frequency, Thus the amplified signal is Completely
Available on the output Terminal. And for input signals other than Resonant
Frequency, the tank circuit provides lower impedance, hence most of the signals
get attenuated at collector Terminal.
[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

Ri- input resistance of the next stage

R0-output resistance of the generator gmVb’e

Cc & CE are negligible small

The equivalent circuit is simplified by

[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

Double tuned amplifier

An amplifier that uses a pair of mutually inductively coupled coils where both
primary and secondary are tuned, such a circuit is known as “double tuned
amplifier”. Its response will provide
substantial rejection of frequencies near the pass band as well as relative flat pass
band response. The disadvantage of POTENTIAL INSTABILITY in single tuned
amplifiers can be overcome in Double tuned amplifiers.
A double tuned amplifier consists of inductively coupled two tuned circuits. One
L1, C1 and the other L2, C2 in the Collector terminals. A change in thecoupling
of the two tuned circuits results in change in the shape of the Frequency response
curve.
[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

By proper adjustment of the coupling between the two coils of the two tuned
circuits, the required results (High selectivity, high Voltage gain and required
bandwidth) may be obtained.
Operation:
The high Frequency signal to be amplified is applied to the input terminal of the
amplifier. The resonant Frequency of TUNED CIRCUIT connected in the
Collector circuit is made equal to signal Frequency by varying the value of C1.
Now the tuned circuit L1, C1 offers very high Impedance to input signal
Frequency and therefore, large output is developed across it. The output from the
tuned circuit L1,C1 is transferred to the second tuned circuit L2, C2 through
Mutual Induction. Hence the Frequency response in Double Tuned amplifier
depends on the Magnetic Coupling of L1 and L2
Equivalent circuit of double tuned amplifier:

[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]
This condition is known as critical coupling.

For the values of k<1/Q the peak gain is less than the maximum gain and the
coupling is poor. For the values k> 1/Q, the circuit is overcoupled and the
response shows double peak. This double peak is useful when more bandwidth is
required
The ratio of peak and dip gain is denoted as γ and it represents the magnitude of
the ripple in the gain curve.

2. Staggered tuned amplifier

Double tuned amplifier gives greater 3 dB bandwidth having steeper sides and
flat top. But alignment of double tuned amplifier is difficult.
To overcome this problem two single tuned cascaded amplifiers having certain
bandwidth are taken and their resonant frequencies are so adjusted that they are
separated by an amount equal to the bandwidth of each stage. Since the resonant
frequencies are displaced or staggered, they are known as staggered tuned
amplifiers. If it is desired to build a wide band high gain amplifier, one procedure
is to use either single tuned or double tuned circuits which have been heavily
loaded so as to increase the bandwidth.
The gain per stage is correspondingly reduced, by virtue of the constant gain-
bandwidth product. The use of a cascaded chain of stages will provide for the
desired gain. Generally, for a specified gain and bandwidth the double tuned
cascaded amplifier is preferred, since fewer tubes are often possible, and also
since the pass-band characteristics of the double tuned cascaded chain are more
favorable, falling more sensitive to variations in tube capacitance and coil
inductance than the single tuned circuits.

Response of individual stages

[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

Stagger Tuned Amplifiers are used to improve the overall frequency response of
tuned Amplifiers. Stagger tuned Amplifiers are usually designed so that the
overall response exhibits maximal flatness around the centre frequency. It needs
a number of tuned circuits operating in union. The overall frequency response of
a Stagger tuned amplifier is obtained by adding the individual responsetogether.
Since the resonant Frequencies of different tuned circuits are displaced or
staggered, they are referred as STAGGER TUNED AMPLIFIER.
The main advantage of stagger tuned amplifier is increased bandwidth. Its
Drawback is Reduced Selectivity and critical tuning of many tank circuits. They
are used in RF amplifier stage in Radio Receivers.
Analysis:
Gain of the single tuned amplifier:

Gain of the cascaded amplifier:

NEUTRALIZATION METHODS
In tuned RF amplifiers, transistor are used at the frequencies nearer to their
unity gain bandwidths (i.e. fT), to amplify a narrow band of high frequencies
centred around a ratio frequency. At this frequency, the inter junction
capacitance between base and collector, C bc of the transistor becomes
dominant, i.e., its reactance between low enough to be considered, which is
otherwise infinite to be neglected as open circuit. Being CE configuration
capacitance Cbe, shown in the ig. 3.35 come across input and output circuits of
an amplifier. As reactance of Cbc at RF is low enough it provide the feedback path
from collector to base. With this circuit condition, if some feedback signal
manages to reach the input from output in a positive manner with proper phase
shift, then there is possibility of circuit converted to a positive manner with
proper phase shift, then there is possibility of circuit converted to an unstable
one, generating its own oscillations and can stop working as an amplifier. This
circuit will always oscillate if enough energy is fed back from the collector to the
base in the correct phase to overcome circuit losses. Unfortunately, the
 conditions for best gain and selectivity are also those which promote oscillation.
In order to prevent oscillations in tuned RF amplifiers it was necessary to reduce
the stage gain to a level that ensured circuit stability. This could be accomplished
in several ways such as lowering the Q of tune circuits; stager tuning, losse
coupling

[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

between the stages or inserting a ‘loser’ element into the circuit. While all these
methods reduced gain, detuning and Q reduction had detrimental effects on
selectivity. Instead of loosing the circuit performance to achieve stability, the
professor L.A. Hazeltine introduced a circuit in which the troublesome effect o the
collector to base capacitance of the transistor was neutralized by introducing a signal
which cancels the signal coupled through the collector to base capacitance. He
proved that the neutralization can be achieved by deliberately feeding back a portion
of the output signal to the input in such a way that it has the same amplitude as the
unwanted feedback but the opposite phase. Later on many neutralizing circuits were
introduced. Let us study some of these circuits.

Hazeltine Neutralization
The ig. 3.36 shows one variation of the Hazeline circuit. In this circuit a small
value of variable capacitance CN is connected from the bottom of coil, point B,
to the base. Therefore, the internal capacitance Cbc, shown dotted, feeds a signal
from the top end of the coil, point A, to the transistor base and the CN feeds
a signal o equal magnitude but opposite polarity rom the bottom o coil, point B,
to the base. The neutralizing capacitor, C N can be adjusted correctly to
completely nulliy the signal ed through the Cbc.
[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

Neutralization using coil

The Fig. 3.38 shows the neutralization o RF amplifier using coil. In this circuit, L
part of the tuned circuit at the base o next stage is oriented or minimum coupling
to the other winding. It is wound on a separate from and is mounted at right
angle to the coupled windings. If the windings are properly polarized, the voltage
across L due to the circulating current in the base circuit will have the proper
phase to cancel the signal coupled through the base to collector, Cbc
capacitance.
[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

Important Short Questions and Answers

TUNED AMPLIFIERS
1. What is tuned amplifier? What are the various types of tuned
amplifiers?
A tuned amplifier amplifies a certain range of frequencies (narrow band of
frequencies) in the radio frequency region and rejects all other frequencies.
Types:
The various types of tuned amplifiers are
i) Single tuned amplifier
ii) Double tuned amplifier
iii) Stagger tuned amplifier & synchronously tuned amplifier.

2. Define tuned amplifier.

A tuned amplifier is defined as an amplifier circuit which amplifies a certain range
of frequencies (narrow band of frequencies) in the radio frequency region and
reject all other frequencies.
3. Why tuned amplifier cannot be used at low frequency?
For low frequencies the size L and C are large. So the circuit will be bulky and
expensive, hence the tuned amplifiers cannot be used at low frequency.
4. What is the other name for tuned amplifier?
Tuned amplifiers used for amplifying narrow band of frequencies hence it si also
known as “narrow band amplifier” or “Band pass amplifier”.
5. Mention The Two Applications of tuned amplifiers.
i) They are used in IF amplifiers in Radio and TV receivers.
ii) They are used in wireless communication systems.
6. State two advantages and two disadvantages of tuned amplifiers.
Advantages:
i) They amplify defined frequencies
ii) Signal to noise ratio (SNR) at output is good.
iii) They are suited for radio transmitters and receivers.
Disadvantages:
i) They are not suitable to amplify audio frequencies.
ii) Circuit is bulky and costly.
iii) The design is complex.

7. What is Single tuned and double tuned amplifier?

Single tuned amplifier:
A amplifier circuit that uses a single parallel tuned circuit as a load is called
single tuned amplifier.
Double tuned amplifier:
The amplifiers having two parallel resonant circuit in its load are called double
tuned amplifiers.
8. What are the advantages of double tuned amplifier over single tuned
amplifier?
i) Provides higher gain
ii) Provides large 3dB bandwidth.
iii) Possess flatter response having steeper sides.
9. What are the different coil losses?
i) Hysteresis loss
ii) Copper loss
iii) Eddy current loss
10. What are the differences between single tuned and synchronously tuned
amplifiers?

11. What is Stagger tuned amplifier

If two or more tuned circuits which are cascaded are tuned to slightly different
resonant frequencies, it is possible to obtain an increased bandwidth with a flat
passbandwith steep sides. This technique is known as stagger tuning and the
amplifier using this technique is called as stagger tuned amplifier.
12. What are the different types of neutralization?
i) Hazeltine neutralization
ii) Neutrodyne neutralization
iii) Rice neutralization
13. Why neutralization required in tuned amplifiers? & Draw the circuit for
Narrow Band neutralization.
In order to prevent oscillations in tuned RF amplifiers it was necessary toreduce
the stage gain to a level that ensured circuit stability. This can be accomplished
in several ways such as lowering the Q of the tuned circuits, stagger tuning ,loose
coupling between the stages. Instead of losingthe circuit performance to achieve
stability, a circuitin which the troublesome effect of the collector to base
capacitance of the transistor was neutralised by introducing a signal which cancels
the signal coupled through the collector to base capacitance.
[Source: Sedra and Smith, ―Micro Electronic Circuits‖; Sixth Edition, Oxford University Press]

14. Define loaded and unloaded Q.

Unloaded Q:
It is defined as the ratio of stored energy to dissipated energy in a reactor or
resonator. For an inductor or capacitor

Where X= reactance:
Rs= series resistance
Loaded Q:
The loaded Q or QL of a resonator is determined by how tightly the resonator is
coupled to its terminations.

15. What is the effect of cascading n stages of identical single tuned amplifiers
(synchronously tuned) on the overall 3db bandwidth?
The bandwidth of n stage cascaded single tuned amplifier is given as
From the above equation it is clear that the overall 3dB bandwidth reduces.
16. Mention the bandwidth of a double tuned amplifier

Q is the Quality factor of the coil alone

b- is a constant
17. Where is the Q-point placed in a class C type amplifier? What are its
applications?
In a class C type amplifier the Q-point is placed below the X-axis.
Applications:
• The Class C amplifiers are used to amplify the signals at radio frequencies.
• They are also used in mixer circuits.
18. Brief the relation between bandwidth and Q-factor.
The quality factor determines the 3dB bandwidth for the resonant circuit. The
3dB bandwidth for resonant circuit is given by
BW=fr/Q
Where, fr= centre frequency of a resonator
BW= f2-f1
19. What is narrow band neutralization?
The process of cancelling the instability effect due to the collector to base
capacitance of the transistor in tuned circuits by introducing a signal which
cancels the signal coupled through the collector to base capacitance is called
narrow band neutralization.
20. Mention two important features of stagger tuned amplifier.
i) It has better flat, wide band characteristics.
ii) Increased bandwidth
21. What is the need for neutralization circuits?
In tuned RF amplifiers, the inter-junction capacitance Cbc of the transistor
becomes dominant (i.e) its reactance is low, it provides the feedback signal from
collector to base. If some feedback signal manages to reach the input from output
in a positive manner with proper phase shift, then amplifier keeps oscillating, thus
stability of amplifier gets affected. Hence neutralization is employed.
22. Draw a class C tuned amplifier circuit and what is its efficiency.

23. Derive the resonance frequency for the tank circuit shown:

At resonance XL=XC

24. A tuned circuit has resonant frequency of 1600 KHz and bandwidth of
10 KHz. What is the value of its Q-factor?

25. A tuned amplifier has its maximum gain at a frequency of 2 MHz and
has a bandwidth of 50 KHz.calculate the Q-factor.

26. An inductor of 250µH has Q=300 at 1MHz. Determine R s and Rp of the

inductor.

27. A parallel resonant circuit has an inductance of 150µH and a

capacitance of 100pF. Find the resonant frequency.
 Unit 4
FEEDBACK AMPLIFIERS AND OSCILLATORS

Draw the block diagram of negative feed back amplifier and derive the gain (Nov- Dec 2013)

The negative sign at the mixer shows that the output signal is out of phase. So

The amplifier can be considered as a negative feedback amplifier.

We know that the gain of the basic amplifier is A.

A=

Af =

We know that X s = Xi + Xf

Af =

Multiply and divide by Xi

Af =

Af =

Af=

Where A is the open loop gain and Af is the closed loop gain.

1. Derive the Desensitivity of gain.(Nov-Dec2015)

The lack of stability in amplifiers canbe compensated by introducing negative

feedback
 Af =

Differentiating both sides with respect to A,

= =

Dividing both sides by Af,

= x

= x

| | = |x

is defined as the fractional change in amplification with feed back divided by the
fractional change without feedback and is called

Sensitivity(S).

De sensitivity is defined as the reciprocal of sensitivity

D= = =

The above factor explains that the gain of the amplifier depends on the feedback network. Always the
gain with feedback is less than the gain without feedback.

Bandwidth of Feedback Amplifiers

fLf =

fHf =
 Therefore Bandwidth =fHf - fLf

= -

It is also clear that BWf BW

Also (fHf -fLf ) (fH -fL)

4. Draw the topology diagrams for four basic feedback amplifiers.Nov- Dec 2015)
Summary on the feedbavk amplifiers

5. Derive the input impedance and output impedance of voltage series feedback amplifier.

Also derive the gain. (Nov- Dec 2014)

The above topology diagram shows the voltage series feedback amplifier. Input mixer network has
the voltage source and the output sampling network has the voltage taping.

Gain
 The gain with negative feedback is

Af = =
WKT, Vf=β Vo

∴Af =

If Vo =AvVi

Af =

∴Af =

To derive the input impedance and output impedance we have to draw the equivalent circuit

Input impedance

input impedance with feedback effect is Rif =

To find Vs,

Apply KVL to the input loop,

Vs-IiRi –Vf = 0

∴ Vs = IiRi + Vf

WKT Vf =βVo

∴Vs =IiRi + βVo

Vs =IiRi + βAvVi

Vs = IiRi + βAvIiRi,

On substituting the value of Vs in Rif,

Rif =

Rif =
Rif = Ri(1+

Output impedance
 From the above diagram Rof=

Apply KVL to the output loop,

Vo =IoRo + Av Vi

WKT Vi = Vs –Vf

For output loop Vs = 0

∴Vi = Vf

Vo = IoRo – Avf

=IoRo- A βVo

Vo + A βVo = IoRo

Vo ( 1+βA) = IoRo

From the above equation

6. Derive the input impedance , output impedance and gain of the Transconductance
amplifier.(May-June2015)

Gain

Gmf = =

We know thatIo = GmVi

Vf = βIo
Input impedance

Vs = Vi+ Vf

Vs = Ii Ri + βVo

= Ii Ri + βAVi

= Ii Ri + βAIiRi

Vs = Ii Ri(1 + βA) = Ii Ri(1 + βGm)

Rif = 1 + βGm)

Output impedance

From the output loop I = βGmIo +

I + βGmIo =

If Io = I I ( 1+ βGm)=

( 1+ βGm)

7. Derive the input impedance , output impedance and gain of the Transresistance
amplifier.(May-June2014)

Gain
Rmf =

Rmf =

Input impedance

Is = Ii+ If

= Ii + βVo

= Ii + βRm Ii

Is = Ii ( 1+ βRm)

Vo = IoRo +Rm Ii

Vo = IoRo -Rm If = IoRo –RmβVo

Vo+RmβVo = IoRo

Vo(1+Rmβ) = IoRo

Rof =

8. Derive the input impedance , output impedance and gain of the current amplifier (May-
June2013)

Gain

Aif =
 Aif =

Input impedance

Is = Ii+ βIo = βAIi = βA =

Output impedance

Io = A Ii + = -A If + (∵If = - Ii)

Io +Aβ Io =
Rof = Ro ( 1+ Aβ)

13. Explain the Nyquist criterion for stability of feedback amplifiers.(Nov-Dec2015)

A negative feedback amplifier is designed for a particular frequency and this may cause
distortion or oscillations for some other frequency ranges. Stability problem arises in feedback
amplifiers, if the loop gain has more than two poles. The disturbance will be increasing
exponentially with time. To avoid this problem, the poles of the transfer function must lie on the
left hand side of the complex frequency plane.

Condition Unstable if the curve closes -1 +j0

Stable if the curve doesn'nt closes -1 +j0

Locus of =1

Figure shows the locus of =1. It is a circle of unit radius, with the center -1+j0. If the
feedback is positive of 1 and if it is negative 1.
The system poles are the roots of denominator of H(s). The system zeroes are the roots of
numerator of H(s). The poles depend on Aβ . Nyquist plot is used to check the stability of the
feedback amplifiers. It depends on whether the poles lie in the left or on the right to define stable
and unstable respectively.

If T(s) is the transfer function of loop gain.

T(s) = T(j ) = T(j )∟

If T(j is a real number the phase angle will be 180ͦ . Then the closed loop gain becomes

= .Then the amplifier will work as an oscillator. With negative feedback the
poles shift towards left and the closed loop gain becomes 1+Aβ and maintains stability.
Therefore single pole amplifier is always stable. In the case of two poles the system tries to
maintain to be stable, and in the case of more than two the poles the system will to enter in to
the right hand side and can’t be stable.
 To make the system stable we have to apply frequency compensation techniques.

There are two compensation techniques

(i) Dominant pole compensation

(ii) Miller compensation

In the first technique an additional pole is added in the system.

A(s) =

In the second method A miller capacitor is added to compensate the frequency.

The break frequency is f = . Depending the value of the capacitor the frequency will be
compensated.

Briefly explain the concept of oscillator?(Nov-Dec2013)(Barkhausen Criterion)

The device which is used on positive feedback is called oscillator.

It doesn't require any input signal and it can generate output.

closed loop gain Af =Vₒ/Vṡ

WKT V =Vs+Vf

Vs=Vi-Vf(for positive feedback)

Af=Vₒ/Vi-Vf
 WKT Vf=βVₒ

Af=Vₒ/Vi-βVₒ

divide throughout by Vi

Af = Vₒ/Vi
Vi/Vi - βVₒ/Vi

=A/1-βA.

To start oscillatios Aβ>1 and if Aβ=1 the circuitsets sinusoidal oscillations.

BARKHAUSEN CRITERION:

To fix positive feedback,the amplifier should be a non inverting amplifier ,otherwise if the amplifier is
an inverting amplifier amplifier,the feedback network will provide a phase reversal so the at the input
the circuit will have 0 degree or 360 degree phase.

if A=Vₒ/Vi

Vₒ=AVi

Vf=-βVₒ

=-βAVi

in the above case Vf=Vi

Vi=-βAVi

Vi/Vi=-βA

-βA=1

βA=-1

if the above condition is satisfied ,the circuit can work under Barkhausen condition.

1. Aβ = 1
2. closed loop gain zero degree or360 degree.
2. Explain RC phase shift oscillator with a neat diagram:(Nov-Dec2016)

By using proper values of R&C the values of is adjusted to 60 degree

Z=R-jXc

=tan⁻1 (XC/R)

from the feedback network,

V₁/Vₒ =R₁/R₁+1/j
 =j R₁C₁/1+j R₁C₁

similarly,

V₂/V₁=j R₂C₂/1+j R₂C₂

Vₓ/V₂=j R₃C₃/1+j R₃C₃

Vₓ/Vₒ=V₁/Vₒ V₂/V₁ Vₓ/V₂

=(j RC/1+j

if C₁=C₂=C₃ and

R₁=R₂=R₃

V₁/Vₒ=V₂/V₁=Vₓ/V₂=j /1+j

phase shift for each RC network is 180/3=60 degree.

loop equation for the equivalent circuit is,

Ib(R+1/j C+R)-I₁R=0 ①

-IbR + I₁(2R+1/j )-I₂R=0 ②

hfeIbRC-I₁R+(R+RC+1/j )I₂=0

the matrix formed by the above equation is,

on expanding and solving the above matrix ,

+3 + hfe +6 /j +4R j -5R/ -RC/ +1/ =0

= + (3+hfe)-(5R+RC)/ +j[1/ -6 =0

on comparing imaginary part to 0

1/ =6 +4R /
from the above equation,

fₒ=1/2

on equating the real part to 0,

=0

WKT =1/6 +4R

on substituting the value in the above equation

hfe=-29R/RC+23+4RC/R

if K= /R

hfe=23-29/K+4K

the above condition is considered as the equation for oscillation

ADVANTAGES:

1. Simplecircuitry

2. Useful for audio frequency

DISADVANTAGES:

1. Used for fixed frequency

2. Poor stability

3. Draw the circuit diagram of Wein bridge oscillator and derive the frequency of
oscillation.(Nov-Dec2015)
It is also a RC oscilolator. To derive the frequency of oscillations

I=

Vf = I Z2

= =

Multiply and divide by R2 +

On equating the real part to 0

2+

If R1 = R2 and C1 = C2

on equating the imaginary part to 0

If R1 =R2 = R =1 and C1 = C2 = C= 1 Avf =

4. Explain the operation of twin -T oscillator.(Nov-Dec2016)

The above oscillator is a combination of high pass filter and allow pass filter .together the feedback
network can be called as notch filter.in the above circuit positive feedback is given through R₁andR₂
and the negative feedback is given through the notch filter

when power is ON the positive feedback helps tobuild oscillations.it can set oscillations only at
fr(resonance frequency) and on other frequencies the circuit set negative feedback .it has resonance
frequency same like RC phase shift

f=1/2 RC

5. Derive the general conditions for oscillations.(Nov-Dec2016)

When a capacitor and an inductor are connected in parallel automatically the oscillations were set up
and from the oscillations we can derive the general conditions for oscillation.

From the above circuit

Input impedance Z’ = (ie) (Z1 II hie)

Output impedanceZ2 II ( Z’ + Z3)

On simplifying ZL =

On further simplifying and applying Av = and = we get

hie is called the condition for oscillation for LC

oscillators.

6. Derive the conditions for LC oscillations in Hartley oscillator.(May-June2010)

The Hartley oscillator is having two inductors and a capacitor in the feedback path with the capacitor
in the feedback path with the amplifier

The condition for oscillation is,

hie(Z₁+Z₂+Z₃)=(1+hfe)Z₁Z₂+Z₁Z₃=0

The value of Z₁=j & Z₃=-j/

on substituting the values in the above equation,

-hfe
on equating imaginary part to 0,
f=1/2

to determine the condition for oscillation,

equate the real part to 0,

-hfe

hfe=L₁/L₂= .

7. Draw the circuit for Colpits oscillator and derive the frequency of oscillations.Nov-Dec2011)

For the above diagram Z1 =

,
On substituting the above values in the condition for oscillation

hie

and on simplifying

on equating imaginary part to 0 f =

on equating real part hfe =

8. Draw a neat diagram for Clapp oscillator and derive the condition for oscillation?(May-
June2016)
 The addition of c₃ in the feedback network improves the stability of oscillation .it also eliminates the
stray capacitance effect.

The values Z₁=-j/

condition for oscillation

hie(Z₁+Z₂+Z₃)+(1+hfe)Z₁Z₂+Z₁Z₃=0

on equating the real part to 0,

-hfeZ₁Z₂+Z₁Z₂+Z₁Z₃=0

- - .j -j/ =0
on simplifing,

on substituing the value of

hfe+1/c₂=1/c₁+1/c₂

hfe=c₂/c₁

on equating the imaginary part to 0,

f=1/2

10.Explain Quartz crystal oscillator and its operation.(Nov-Dec2016)

It is a hexagonal prism .but it is cut into a rectangular slab.

Equivalent Circuit

CM-mounting cap when Cm vibrates it gives the internal friction R,intertia L and stiffness C

f=1/2 . /1+

Where Q is the Quality factor,

Q=

when + approaches to 1

fr=1/2

the resonating frequency is

1. series resonating(fs)

2. parallel resonating(fp)

where fs=1/2

fp=1/2
Ceq=Cm.c/Cm+c

Crystals exhibit piezoelecric effect .under the influence of mechanical pressure,the crystal vibrates,and
the equivalent voltages against the vibration getsgenerated across the against the vibration gets generated
across the opposite faces .the resonating frequency depends on the cutof the crystal. The types are

(i) Pierce crystal oscillator

The common LC oscillator can be converted into crystal oscillator if the crystal is used. The resulting
circuit frequency is set by the series resonant frequency of the circuit. The change in temperature have
no effect on the operating frequency and hence good stability is maintained .

(ii) Miller crystal oscillator

RFC radio frequency coil provides isolation between a.c and d.c currents. The resulting circuit frequency
is set by the series resonant frequency of the crystal. The temperature and the circuit parameters have
no effects on the operating frequency and the stability is being maintained.

The total impedance

On simplifying

Where

Nyquist Criterion for checking the stability of feedback amplifiers

The Nyquist stability criterion is a graphical method that determines the stability of a dynamic system,
such as a feedback control system.

The Nyquist stability criterion can be used to:

1. Determine if a system has closed-loop poles outside the unit circle

2. Find the number of closed-loop poles outside the unit circle

3. Find the phase and gain margins of a system

No encirclement: The system is stable

To determine the stability of a system using the Nyquist stability criterion, you can analyze the Nyquist
plot for encirclements of the critical point -1+j0.

Nyquist stability criterion states the number of encirclements about the critical point (1+j0) must be
equal to the poles of characteristic equation, which is nothing but the poles of the open loop transfer
function in the right half of the 's' plane.
 EC 3353 ELECTRO DEVICES AND CIRCUITS

UNIT 5

Class A amplifier

1. Direct coupled or series fed class A amplifier

It is similar to a fixed bias circuit. The load resistance RL is replaced by a speaker. The
current flow is for 360°. Q point is placed at the center of the load line. The efficiency is
calculated as

But Vm =
 Transformer coupled class A amplifier

The load resistor is replaced with a transformer connected with a speaker.

Rl’ = where n is the number of turns in the transformer.

But

The efficiency is increased.

Class B amplifier

There are two types of class B amplifiers.

1.Push pull
2.Complementary symmetry

Push pull class B

Complementary symmetry Class B

Elimination of cross over distortion

 The current flow is only for 180°. Therefore two transistors were used for 360° current
flow.
Positive half cycle Q1 on and negative half cycle Q2 off.
Negative half cycle Q1 off and Q2 on

Efficiency η =

If Vm = VCC
= 78.5%

Waveform cross over distortion.

Since two transistors were used due to the conduction delay there will be a distortion
called cross over. This can be eliminated by using biasing ressitors at the base.

Class AB power amplifier using MOSFET

Class AB amplifier can be designed using MOSFET to generate an output power of 100 W. This
amplifier has high efficiency and less harmonics. This circuit consists of drivers, bias circuit and
power amplification using MOSFET with class AB amplifier MOSFET is preferred over BJT
because of its simple drive circuit, less susceptibility to thermal stability and high input impedance.

lass AB amplifier can be designed using MOSFET to generate an output power of

100 W. This amplifier has high efficiency and less harmonics.

This circuit consists of drivers, bias circuit and power amplification using MOSFET
with class AB amplifier MOSFET is preferred over BJT because of its simple drive
circuit, less susceptibility to thermal stability and high input impedance.
It consists of two VBE multipliers formed by transistors Q5 and Q6 with their
associated resistors. Q6 is connected in direct thermal contact with the output
transistors by connecting Q6 on their common heat sink. The bias voltage VGG can be
reduced by selecting VBE multiplication factor of Q6 appropriately so VBE
decreases with temperature same rate as that of sum of threshold voltages |Vin|
+ |Vtp| of output MOSFET. Thus quiescent current of output transistors is stabilized
against temperature variations.

DRIVER CIRCUIT

Complementary Darlington emitter followers are formed by the transistors Q1

through Q4. It provides the low output resistance necessary for driving the output
MOSFET at high speeds.

VGG is given by
The other VBE multiplier is adjusted to field the value of VGG required for the desired
quiescent current in QN and QP.

The Class AB amplifier using MOSFET is known as Hi-fi amplifier circuit and is
suitable for applications such as keyboard amplifiers, general purpose amplifiers,
guitar amplifiers and subwoofer amplifiers.

Temperature Effect
With power transistors, a designer often uses a heat sink to get a high power
rating for the transistor. As already mentioned, the heat sink allows the
internally generated heat to escape more easily from the transistor. This reduces
the junction temperature, equivalent to increase the maximum power rating.

The heat developed at the collector-base junction of a transistor must flow from
the junction to the transistor case, then from the case to the heat sink, and finally
from heat sink to the surrounding air. Each portion of the path that the heat must
pass through has a thermal resistance. These thermal resistances are θ jC
(junction to case), θCS (case to sink), and θSA (sink to air).
Thermal equivalent circuit for the transistor and heat sink is depicted in Fig.
12.59. This consists of the three thermal resistances connected in series. The
size of heat sink required for a transistor with given power dissipation,
PD may be determined from the thermal equivalent circuit. The temperature
difference between the transistor collector-base junction and the air surrounding
the heat sink (Tj – TA) causes the dissipated power (PD) to flow through each of
the thermal resistances in series.

So for a series thermal resistance circuit,

Power flow,

Total thermal resistance between the junction and surroundings may be

determined from the relation

The condition required to avoid the thermal runaway is given below :

The rate at which heat is released at the collector junction must not exceed the
rate at which the heat can be dissipated under steady-state condition
The condition required to avoid the thermal runaway is given below :

The rate at which heat is released at the collector junction must not exceed the
rate at which the heat can be dissipated under steady-state condition

The condition expressed by Eq. (12.53) is the condition which must be satisfied
to avoid thermal runaway. By suitable design, it is possible to ensure that the
transistor cannot runaway before a specified ambient temperature or even under
any condition.
DC/DC Converters
Dc-dc power converters are employed in a variety of applications, including power supplies for personal
computers, office equipment, spacecraft power systems, laptop computers, and telecommunications
equipment, as well as dc motor drives. The input to a dc-dc converter is an unregulated dc voltage Vg. The
converter produces
a regulated output voltage V, having a 1 + L +

magnitude (and possibly polarity) that 2

Vg + vs(t) C R V
differs from Vg. For example, in a –

computer off-line power supply, the – –

120 V or 240 V ac utility voltage is Dc Load

input Switch network Low-pass filter Dc output

rectified, producing a dc voltage of
(a)
approximately 170 V or 340 V,
respectively. A dc-dc converter then
reduces the voltage to the regulated 5 V or vs(t)

3.3 V required by the processor ICs.

High efficiency is invariably
required, since cooling of inefficient 0

power converters is difficult and Switch

position: 2 1
expensive. The ideal dc-dc converter
exhibits 100% efficiency; in practice, (b)

Figure 1. The buck converter consists of a switch network that reduces

efficiencies of 70% to 95% are typically the dc component of voltage, and a low-pass filter that removes
the high-frequency switching harmonics: (a) schematic, (b)
obtained. This is achieved using switch voltage waveform.
switched-mode, or chopper,
 circuits whose elements dissipate negligible power. Pulse-width modulation (PWM) allows control and regulation
of the total output voltage. This approach is also employed in applications involving alternating current,
including high-efficiency dc-ac power converters (inverters and power amplifiers), ac-ac power converters, and
some ac-dc power converters (low-harmonic rectifiers).
A basic dc-dc converter circuit known as the buck converter is illustrated in Fig. 1. A single-pole
double-throw (SPDT) switch is connected to the dc input voltage Vg as shown. The switch output voltage

vs(t) is equal to Vg when the switch is in position 1, and is equal to zero when the switch is in position 2. The
switch position is varies periodically, such that vs(t) is a rectangular waveform having period Ts and duty cycle
D. The duty cycle is equal to the fraction of time that the switch is connected in position 1, and hence 0 c D c 1.
The switching frequency f s is equal to 1/Ts.

Working Principle of DC-DC converter

The working principle of the DC-to-DC converter is very simple. The inductor in the input
resistance has an unexpected variation in the input current. If the switch is kept as high (on),
then the inductor feeds the energy from the input and stores the energy in the form of
magnetic energy.
If the switch is kept as low (off), it discharges the energy. Here, the output of the capacitor
is assumed as high that is sufficient for the time constant of an RC circuit on the output side.
The huge time constant is compared with the switching period and made sure that the
steady-state is a constant output voltage. It should be Vo(t) = Vo(constant) and present at
the load terminal.

Types of DC-to-DC Converters

1: Magnetic Converters
In these DC-to-DC Converters, energy is periodically stored and released from a magnetic
field in an inductor or a transformer. The frequency ranges from 300 kHz to 10MHz. By
maintaining the duty cycle of the charging voltage the amount of power that needs to be
transferred continuously to a load can be more easily controlled.

Moreover, the control can also be applied to the input current, the output current or to
maintain constant power through the circuit. The transformer-based converter can easily
provide the isolation between input and output.

2: Non-Isolated Converters
Non-isolated converters are mostly used when the change in the voltage is comparatively
small. It posses the input and output terminal to a common ground. The major disadvantage
is that it cannot provide protection from high electrical voltages and it poses more noise.

3: Step-down/Buck Converters
In a typical non-isolated step-down or buck converter the output voltage VOUT depends on
the input voltage VIN and the switching duty cycle D of the power switch.
4: Step-up/Boost Converters
It is used to boost DC to DC converter voltage and it uses the same number of passive
components but arranged to step up the input voltage so that the output is higher than that
of the input.

5: Buck-Boost Converters
This converter allows the input DC voltage to be either stepped-up or stepped-down,
depending on the duty cycle.
The output voltage is given by the relation as mentioned below:

Advantages
• It simplifies the power supply systems in the circuit.
• It provides isolation in the primary and secondary circuits from each other.
• It provides a technique to extend potential (voltage) as required.
• It is available as a hybrid circuit with all elements in a single chip.
• It is also used in the regulation and control of DC voltage.
• The output is well organized as positive or negative.
• Battery space can be reduced by using a converter.

Disadvantages
• Switching converters lead to more noise.
• They are expensive as an external circuit is required.
• Choppers are inadequate due to unsteady voltage and current supply.
• More ripple current, More input and output capacitance, higher losses, etc.

From the above expression, we can notice that the output voltage is always reversed in
polarity with respect to the input. Therefore, a buck-boost converter is also known as a
voltage inverter.