BAHRIA UNIVERSITY
13 NATIONAL STADIUM ROAD, KARACHI
+ 92 21 924 0002-6
FAX: + 92 21 924 0351
bukc.bahria.edu.pk
TEACHING PLAN
Course Title: Digital Logic Design
Course Code: CEN-120
Credit Hours: 3+1
Contact Hours: 3 hours lecture per week
3 hours lab per week
Semester: 2nd Semester
Prerequisite(s): GSC 114 Applied Physics
Instructor(s): Dr. Asif Aziz
Course material
University LMS
available:
After completing this course, the student should be able to:
• Understanding of the Boolean algebra, Boolean functions, Combinational and sequential logic
and PLDs. PLO-1, BT LEVEL C2
Class Learning • Demonstrate the skills to design and analyse both combinational and sequential circuits using
a variety of techniques. PLO-2, BT LEVEL C3
Outcome • Understand the relationship between abstract logic characterization and practical electrical
implementations. PLO-3, BT LEVEL C2
After taking this course students will be able to recognize and use the following concepts,
Objectives
ideas and tools:
• Identify and explain fundamental concepts of digital logic design including basic and
universal gates, number systems, and binary coded systems, basic components of
combinational and sequential circuits.
• Demonstrate the acquired knowledge to apply techniques related to the design and
analysis of digital electronic circuits including Boolean algebra and multi-variable
Karnaugh map methods.
• Analyze small-scale combinational and sequential digital circuits.
• Design small-scale combinational and synchronous sequential digital circuit using
Boolean algebra and K-maps.
• Design and implement digital/computer circuits with modern design tools.
• Participating as a member of a team-oriented design project.
Synopsis: The major areas of study include various binary systems, basic postulates of Boolean
Algebra, correlation between Boolean expressions and their corresponding diagrams,
integrated circuit gates, combinational and sequential circuit Implementations and
Memory chips and systems. Arithmetic Algorithms, Input / Output Organization,
Memory Organization.
COURSE SCHEDULE:
WEE LAB/TUTORIA QUIZ/
TOPICS/SUBTOPICS
K L ASSIGNMENT
Introduction to Number System: Digital
system, Intro to Number System, Decimal ZERO WEEK
01 Number System, Binary Numbers,
Hexadecimal, Octal Numbers, Base
Conversions
Introduction to Number System: Hex to Lab 01: Assignment 1
Binary Conversion, Binary to Hexadecimal, Understanding
Binary coded Decimal numbers, 1s the Lab
02
Complement, 2s Complement method for Equipment’s.
Binary Numbers. Gray Code, BCD
Numbers.
Combinational Logic: Gates include AND, Lab 02: The Quiz 1
OR, NOT, NAND, NOR, XOR, XNOR. Basic Digital
03
Implementation of circuits using AND, OR Logic Gates.
and NOT gates. De Morgan’s Theorem.
Combinational Components: Boolean Lab 03: The
04 Algebra, Binary Logic, Boolean Expression, MULTISM.
Truth Tables.
Combinational Components: Truth Table Lab 04: Boolean
and Circuit Diagram from equations, Algebra and De Assignment 2
05
Boolean expression simplification, Morgan’s Theo.
Universal Gates.
Combinational Components: Concepts of Lab 05:
06 Min & Max Terms. Standard Canonical Karnaugh-Map.
Forms.
Combinational Components: Intro to Lab 06: XOR Quiz 2
Karnaugh Map, Two, Three & Four Gate as
07 variables K map and Exercises. Magnitude
Comp. & Parity
C.
MSI Combinational Components: Circuit Lab 07: Half
Implementation using K Map, Mid Term and Full Adder
08
Revision using Basic
Gates.
Mid-Term Examination
Combinational Circuit Lab 08:
09 Components: XOR, Half Decoder from
Adder, Full adder, BCD Adder. Basic Gates
Combinational Circuit Lab 09:
Components: Decoder, Design with Assignment 3
10
Encoder, Multiplexer and De Multiplexer.
Multiplexer.
Sequential Circuit Lab 10:
11 Components: Introduction to Multiplexers Quiz 3
Sequential Circuits, Basic
Latches, Flip Flops, Difference and De
between flip flops Multiplexers.
Sequential Circuit Lab 11: BCD
Components: Different types to Seven
12 of Flip flops, D Flip Flop, JK Segment
Flip Flop, RS Flip Flop, T Flip Display
Flop. Shift Register,
Sequential Circuit Lab 12:
Components: Shift Registers, Verification of
13 Serial-in Serial out, Serial-in Diff. Types of
Parallel-out, Serial-in serial- Flip Flops.
out, Parallel-in Parallel-out.
Sequential Circuit Lab 13:
Components: Design of Binary
14 Assignment 4
Counters, Johsons counters, Counter.
Ring counters.
Sequential Circuit Lab 14:
Components: Binary counting Decade Quiz 4
using counters, Design of Counters
15
counters. Counters for BCD
code, Grey code and Design of
parity checkers
Sequential Circuit Components:
Types of counters: 3-bit
16 Synchronous / Asynchronous
Counters, Up/Down counters.
BCD decade counters.
Final Examination
COURSE EVALUATION:
Type of Assessment Percentage (%) Remark
Course Work 30 At least 2 Quizzes (10 Marks)
2 Assignments (20 Marks)
Mid-Term Exam 20 Objective 08 Marks and Subjective 12 Marks
Final Exam 50 Objective 20 Marks and Subjective 30 Marks
TEXT BOOKS:
Main Thomsan L. Floyd, Digital Fundamentals, 11TH edition, PEARSON, 2015
Reference
M. Morris Mano, Michael D. Ciletti, Digital Design, 6th edition, PEARSON, 2018
GRADING SCHEME:
Grade Grade Point Marks LL % Marks UL %
A 4.00 ≥ 85 -
A- 3.67 ≥ 80 < 85
B+ 3.33 ≥ 75 < 80
B 3.00 ≥ 71 < 75
B- 2.67 ≥ 68 < 71
C+ 2.33 ≥ 64 < 68
C 2.00 ≥ 60 < 64
C- 1.67 ≥ 57 < 60
D+ 1.33 ≥ 53 < 57
D 1.00 ≥ 50 < 53
F 0.00 - < 50
W WithDraw
COURSE POLICY:
Home works • Home works are due at the beginning of class,
(Assignments) • Late home works will not be accepted,
• All works have to be done independently,
• Students handing in similar home works will receive a grade of 0 (ZERO) and
face possible disciplinary actions.
Makeup Exams In accordance with university regulations, i.e. students should bring a valid excuse
authenticated through valid channels immediately within first week after the exam.
Otherwise they will be considered absent and no makeup exam for them.
Lab/Tutorials All works done in Lab/Tutorials must be individuals.
Attendance • Students are expected to attend all classes
• Attendance is compulsory and will be taken regularly.
• Attendance for less than 80% of the lectures will result in students being barred
from taking the Final Exam.
Code of Conduct The assignments, quizzes and exams need to be done individually. Copying of
another student's work or code, even if changes are subsequently made, is
inappropriate, and such work or code will not be accepted. The University has very
clear guidelines for academic misconduct, and they will be enforced in this class.
Cell Phone Cell phones are restricted during class. Cell phones must be turned off during the
lecture. If your cell phone rings during class, you may be asked to leave.
*It is acknowledged that the objectives, synopsis of the course and distributions of examination marks will
not be changed in the framework of the course as certified.
_________________ ___________________________
Signature of Lecturer Validated by Head of Department
Date: Date:
