60

for negative half cycle of input signal. When no input signal is applied, a DC current flows in
the circuit, due to VBB. This is known as zero signal collector current IC.
During the positive half cycle of the input, the base-emitter junction is more forward biased
and hence the collector current increases. During the negative half cycle of the input, the input
junction is less forward biased and hence the collector current decreases. Hence both the
cycles of the input appear in the output and hence faithful amplification results, as shown in
the below figure.

Hence for faithful amplification, proper zero signal collector current must flow. The value of
zero signal collector current should be at least equal to the maximum collector current due to
the signal alone.
Proper Minimum VBE at any instant
The minimum base to emitter voltage VBE should be greater than the cut-in voltage for the
junction to be forward biased. The minimum voltage needed for a silicon transistor to conduct
is 0.7v and for a germanium transistor to conduct is 0.5v. If the base-emitter voltage VBE is
greater than this voltage, the potential barrier is overcome and hence the base current and
collector currents increase sharply.
Hence if VBE falls low for any part of the input signal, that part will be amplified to a lesser
extent due to the resultant small collector current, which results in unfaithful amplification.
Proper Minimum VCE at any instant
To achieve a faithful amplification, the collector- emitter voltage VCE should not fall below the
cut-in voltage, which is called as Knee Voltage. If VCE is lesser than the knee voltage, the
collector base junction will not be properly reverse biased. Then the collector cannot attract
the electrons which are emitted by the emitter and they will flow towards base which increases
the base current. Thus the value of β falls.
Therefore, if VCE falls low for any part of the input signal, that part will be multiplied to a
lesser extent, resulting in unfaithful amplification. So if VCE is greater than VKNEE the
collector-base junction is properly reverse biased and the value of β remains constant,
resulting in faithful amplification.
 61

TRANSISTOR BIASING, DC LOAD LINE,QUIESCENT POINT

The proper flow of zero signal collector current and the maintenance of proper collector-
emitter voltage during the passage of signal is known as Transistor Biasing. The circuit
which provides transistor biasing is called as Biasing Circuit.
Need for DC biasing
If a signal of very small voltage is given to the input of BJT, it cannot be amplified. Because,
for a BJT, to amplify a signal, two conditions have to be met.
 The input voltage should exceed cut-in voltage for the transistor to be ON.
 The BJT should be in the active region, to be operated as an amplifier.
If appropriate DC voltages and currents are given through BJT by external sources, so that
BJT operates in active region and superimpose the AC signals to be amplified, then this
problem can be avoided. The given DC voltage and currents are so chosen that the transistor
remains in active region for entire input AC cycle. Hence DC biasing is needed.

Output Characteristics
When the output characteristics of a transistor are considered, the curve looks as below for
different input values.

In the above figure, the output characteristics are drawn between collector current IC and
collector voltage VCE for different values of base current IB. These are considered here for
different input values to obtain different output curves.

Operating point

When a value for the maximum possible collector current is considered, that point will be
present on the Y-axis, which is nothing but the saturation point. As well, when a value for
the maximum possible collector emitter voltage is considered, that point will be present on
the X-axis, which is the cutoff point.
 62

When a line is drawn joining these two points, such a line can be called as Load line. This is
called so as it symbolizes the output at the load. This line, when drawn over the output
characteristic curve, makes contact at a point called as Operating point.
This operating point is also called as quiescent point or simply Q-point. There can be many
such intersecting points, but the Q-point is selected in such a way that irrespective of AC
signal swing, the transistor remains in active region. This can be better understood through
the figure below.

The load line has to be drawn in order to obtain the Q-point. A transistor acts as a good
amplifier when it is in active region and when it is made to operate at Q-point, faithful
amplification is achieved.
Faithful amplification is the process of obtaining complete portions of input signal by
increasing the signal strength. This is done when AC signal is applied at its input.

DC Load line
When the transistor is given the bias and no signal is applied at its input, the load line drawn
at such condition, can be understood as DC condition. Here there will be no amplification as
the AC signal is absent. The circuit will be as shown below.

The value of collector emitter voltage at any given time will be

VCE=VCC−ICRC
 63

As VCC and RC are fixed values, the above one is a first degree equation and hence will be a
straight line on the output characteristics. This line is called as D.C. Load line. The figure
below shows the DC load line.

To obtain the load line, the two end points of the straight line are to be determined.
Let those two points be A and B.
To obtain A
When collector emitter voltage VCE = 0, the collector current is maximum and is equal
to VCC/RC. This gives the maximum value of VCE. This is shown as
VCE=VCC−ICRC
0=VCC−ICRC
IC=VCC/RC
This gives the point A (OA = VCC/RC) on collector current axis, shown in the above
figure.
To obtain B
When the collector current IC = 0, then collector emitter voltage is maximum and will
be equal to the VCC. This is shown as
VCE=VCC−ICRC
VCE =VCC
(As IC = 0)
This gives the point B, which means (OB = VCC) on the collector emitter voltage axis shown in the above
figure.

Hence we got both the saturation and cutoff point determined and learnt that the load line is a
straight line. So, a DC load line can be drawn.
 64

METHODS OF TRANSISTOR BIASING

The biasing in transistor circuits is done by using two DC sources VBB and VCC. It is economical to minimize
the DC source to one supply instead of two which also makes the circuit simple.
The commonly used methods of transistor biasing are

 Base Resistor method

 Emitter stabilised biasing
 Biasing with Collector feedback resistor
 Voltage-divider bias
All of these methods have the same basic principle of obtaining the required value of I B and IC from VCC in the
zero signal conditions.

Base Resistor Method

In this method, a resistor RB of high resistance is connected in base, as the name implies. The required zero signal
base current is provided by VCC which flows through RB. The base emitter junction is forward biased, as base is
positive with respect to emitter.

The required value of zero signal base current and hence the collector current (as I C = βIB) can be made to flow
by selecting the proper value of base resistor RB. Hence the value of RB is to be known. The figure above shows
how a base resistor method of biasing circuit looks like.

Forward Bias of Base–Emitter

Consider first the base–emitter circuit loop of Fig. Writing Kirchhoff’s voltage
equation in the clockwise direction for the loop, we obtain
 65

Let IC be the required zero signal collector current=β IB

We know that VCC is a fixed known quantity and IB is chosen at some suitable value. As RB can be found
directly, this method is called as fixed bias method.
Applying KVL at collector to emitter junction or output side:

Advantages

 The circuit is simple.

 Only one resistor RB is required.
 Biasing conditions are set easily.
 No loading effect as no resistor is present at base-emitter junction.
Disadvantages
 The stabilization is poor as heat development can’t be stopped.
 The stability factor is very high. So, there are strong chances of thermal run away.
Hence, this method is rarely employed.
 66

Emitter stabilised biasing

this biasing circuit is nothing but a fixed bias network with an additional emitter resistor, R E. Here, if IC rises due
to an increase in temperature, then the IE also increases which further increases the voltage drop across RE. This
results in the reduction of VC, causing a decrease in IB which in turn brings IC back to its normal value. Thus this
kind of biasing network is seen to offer better stability when compared to fixed base bias network. However the
presence of RE reduces the voltage gain of the amplifier as it results in unwanted AC feedback. In this circuit, the
mathematical equations for different voltages and current are given as
Applying KVL at I/P loop:

Putting the value of emitter current:

 67

Applying KVL At output circuit:

 68

 Voltage-divider bias:

EXACT ANALYSIS:
CONDITION:𝛽𝑅𝐸 < 10𝑅2
 69

CIRCUIT FOR EXACT ANALYSIS

Applying KVL at the for the input thevenin loop:

 70

2.APPROXIMATE ANALYSIS:
CONDITION:𝛽𝑅𝐸 ≥ 10𝑅2
 71

ADVANTAGES OF VOLTAGE DIVIDER BIASING:

 Operating point is almost independent of β variation.

 Operating point stabilized against shift in temperature.
 72

 Biasing with Collector feedback resistor

An improved level of stability can also be obtained by introducing a feedback path from collector to base as
shown in Fig. below.Although the Q-point is not totally independent of beta (even under approximate
conditions), the sensitivity to changes in beta or temperature variations is normally less than encountered for
the fixed-bias or emitter-biased configurations. The analysis will again be performed by first analysing the
base–emitter loop with the results applied to the collector–emitter loop
73
74
75
 76

SMALL SIGNAL ANALYSIS OF BJT

PRACTICAL CIRCUIT OF TRANSISTOR AMPLIFIER:

 77

CURRENTS IN TRANSISTOR AFTER APPLICATION OF AC SIGNAL:

IMPORTANT POINTS:
 78

BJT TRANSISTOR MODELING

The key to the small-signal approach is the use of ac equivalent circuits or models. Here are two
models discussed.

 Re-MODEL
 HYBRID-Π MODEL

A model is the combination of circuit elements, properly chosen, that best approximates the actual
behavior of BJT under specific operating conditions, In summary the ac equivalent circuit of BJT
amplifier is obtained by:
1- Setting all dc sources to zero-potential equivalent and replacing them by a short circuit
connection to ground.

Fig 5-1 Transistor circuit under examination

Fig 5-2 the network of Fig5-1 the short circuit equivalent

2-replacing all capacitors short circuit equivalent.

3-Removing all element bypassed by the short circuit equivalents introduced by steps 1 & 2
4-Redrawing the circuit in a more convenient and logical forms (Fig5-3).

Fig 5-3 small-signal ac analysis 5-

use the hybrid or re equivalent circuit of the BJT to complete the equivalent circuit of the amplifier

6- Finally, the following important parameters are determined for the amplifier:
1- Input impedance Zi
2- Output impedance Zo
3- Voltage gain Av
4-Current gain Ai
5-phase relationship (θ)
 79

The re Transistor Model

The re model employs a diode and controlled current source to duplicate the behavior of a transistor. A current-
controlled current Sources is one where the parameters of the current source are controlled by a current else
where in the network, in general BJT transistor amplifiers are referred to as current-controlled device.

Common-Base Configuration (CB)

Fig 5-4(a) CB BJT transistor (b) re Model for the configuration of (a)

. ac resistance of a diode can be determined by the equation rac=26mV / ID

Same equation can be used to find the ac resistance of the diode of Fig5-4(a) if we simply substitute the emitter
current as follows:

e of re was chosen to emphasize that it is the dc level of emitter current that determines the ac level of the
resistance of the diode of Fig 5-4(b). Substituting the resulting value of re in Fig 5- 4(b) will result in the very useful
model of fig 5-5

Fig 5-5 CB re equivalent circuit

For the CB, Zi range from a few ohms to a maximum of about 50 Ω

If we set the signal to zero (Vi=0) then Ie = 0A and Ic = αIe = α (0A) = 0A,Resulting in an open-circuit
equivalence at the output terminals

For the CB configuration, values of Zo are in MΩ range for CB the input

impedance is relatively small and the output impedance quite high