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Understanding 64-Bit Computing

This document discusses 64-bit computing architectures. It explains that 64-bit processors have general purpose registers that can hold 64-bit data, and 64-bit instructions can operate on 64-bit operands. This doubles both the data stream size and addressable memory range compared to 32-bit processors. 64-bit computing allows for larger integers, addresses, and files to be manipulated in memory and processing.

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Rohit Lashkare
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0% found this document useful (0 votes)
107 views15 pages

Understanding 64-Bit Computing

This document discusses 64-bit computing architectures. It explains that 64-bit processors have general purpose registers that can hold 64-bit data, and 64-bit instructions can operate on 64-bit operands. This doubles both the data stream size and addressable memory range compared to 32-bit processors. 64-bit computing allows for larger integers, addresses, and files to be manipulated in memory and processing.

Uploaded by

Rohit Lashkare
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Department of Computer Science

University of the West Indies


What is 64-bit Computing ?

A 64-bit computing architecture is one that


contains general purpose registers (GPR) that
can hold 64-bit data.

Similarly, a 64-bit instruction is one that can


operate on 64-bit operands.
64-bit Computing
Code Stream Data Stream 64-bit data

Mixture of 32 and 64-bit registers


64-bit data
Programming Models

Doubled PC Doubled register


size size
What is 64-bit Computing ?

In 64-bit processors:

The data stream doubles in size and hence


the GPR’s are doubled in capacity

The instruction stream remains the same


size and therefore the Instruction Register
(IR) remains fixed.
The Data Stream

In modern processors the data stream is


composed of:

Integer and address data which are operated on in


the ALU with associated registers.

Floating Point data which are operated on in the


FPU with associated registers.

Vector (SIMD) data which are operated on in the


Vector Unit with associated registers.
64-bit Architecture

The only difference in moving to 64-bits is in:

 the integer and address hardware.


Intel ISA
64-bit Integer Data

Wider data registers increases the dynamic range of


integer representation:

 A 32-bit processor can manipulate


232 ≈ 4.3e9 integers

 A 64-bit processor can manipulate


264 ≈ 1.8e19 integers

By doubling the bits we have increased the dynamic


range by a factor of 4.3 Billion.
64-bit Address Data

Wider data registers also increases the dynamic range of


addressable memory:

 A 32-bit processor can manipulate


232 ≈ 4.3e9 addresses ≈ 4GB

 A 64-bit processor can manipulate


264 ≈ 1.8e19 addresses = 180 PetaBytes.

Quote: “640K ought to be enough for anybody.”


Bill Gates 1981
Increased Memory Addressing
What can you do with over 4GB of Memory?

1. Applications that use very large objects,


i.e., > 2 gigabyte objects
– Video editing
– Simulation
– Visualization

2. Applications that use files that are larger than 232


bytes.
Can memory-map very LARGE files!
– e.g. Back-end Servers and Databases.
What can you do with over 4GB of Memory?

3. Large scientific applications

1. They work with numbers outside the dynamic range of 32-bit


integers.
2. This causes overflows or underflows and hence wrong
answers in the output registers
( you can check the PSW to determine if such a situation
occurs )

4. Cryptography

1. Modern cryptographic algorithms rely on the factoring and


multiplication of very large numbers
2. The larger the number the more secure the encryption.
64-bit Drawbacks?

Memory address values ( called pointers ) are now twice as large


and take up twice the space.

 Pointers normally take up a fraction of the space in cache

Now they are doubled in size and can squeeze out other
useful data from the cache and reduce performance.

( slight improvement is to tag 64-bit integers during


programming e.g. REX mnemonic prefix, increase size < 10%
for current applications)
Conclusions

64-bit code can be compiled on 32-bit architectures.

 64-bit data can be processed as two 32-bit


calculations although a performance penalty is
incurred.

 Only applications designed to process 64-bit


data and are implemented on 64-bit hardware
will achieve any speedup.
 The addressable memory increases from 4 GB to 264 =
18 billion GB
 Size of registers extended to 64 bits
 Integer and address data up to 64 bits in length can
now be operated on
 264 = 1.8 x 1019 integers can be represented with 64
bits vs. 4.3 x 109 with 32 bits
 Dynamic range has increased by a factor of 4.3 billion!

 The best and simple definition is enhancing the


processing word in the architecture to 64 bits.

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