Lecture-02
Advanced Microcontrollers and RTOS
https://en.wikipedia.org/wiki/ARM7#ARM_license
Introduction to ARM7 Processors
• ARM7 core family consists of ARM700, ARM710, ARM7DI, ARM710a, ARM720T,
ARM740T, ARM710T, ARM7TDMI, ARM7TDMI-S, ARM7EJ-S. The ARM7TDMI and
ARM7TDMI-S were the most popular cores of the family.
• ARM Holdings neither manufactures nor sells CPU devices based on its own designs,
but rather licenses the processor architecture to interested parties
• To all licensees, ARM provides an interactable hardware description of the ARM
core, as well as complete software development toolset and the right to sell
manufactured silicon containing the ARM CPU.
• Integrated device manufacturers (IDM) receive the ARM Processor IP as
synthesizable RTL (written in Verilog). In this form, they have the ability to perform
architectural level optimizations and extensions. This allows the manufacturer to
achieve custom design goals, such as higher clock speed, very low power
consumption, instruction set extensions, optimizations for size, debug support, etc
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ARM7 Cores:
• 1993 ARM700
• 1994 ARM710
• 1994 ARM7DI
• 1994 ARM7TDMI
• 1995 ARM710a
• 1997 ARM710T
• 1997 ARM720T
• 1997 ARM740T
• 2001 ARM7TDMI-S
• 2001 ARM7EJ-S
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Microprocessors Versus Microcontrollers
• Microprocessors do not contain RAM, ROM, I/O Ports,
Peripherals on the chip itself
• Microprocessors are used for General Purpose applications
• Ex: 8085, 8086, Pentium, Intel® Core™ processors family (Core
i3, i5, i7 etc.)
• External RAM, ROM, I/O ports are added for the system
designed using microprocessors
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• A microcontroller has a CPU (Microprocessor) in addition to fix
amount of RAM, ROM, I/O ports and different peripherals on a
single chip
• In other words the processor, RAM, ROM and I/O ports are
embedded together on one chip
• The on chip RAM, ROM, I/O ports makes a microcontroller
suitable for the applications in which cost and space are critical
• The Microcontrollers are used for specific applications
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• Examples:
• ATMEGA 16/32, 8051, STM32F4xx (ARM Cortex Based
Microcontrollers), LPC214xx (ARM7 Based Microcontrollers) etc.
LPC2148 Microcontroller
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• ARM7TDMI was used in Nokia 6110, the first ARM-powered GSM
phone. This led to the popular series of Nokia phones using the
processor, including the 3210 and 3310.
• Dreamcast – home video game console (audio coprocessor)
• Game Boy Advance – handheld video game console
• Nintendo DS – successor to the Game Boy Advance
• Zune HD – portable media player
• Roomba – robotic vacuum cleaner
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Introduction to ARM7TDMI-S
• The ARM7TDMI-S is a member of the ARM family of general-purpose
32-bit microprocessors.
• The ARM family offers high performance for very low power
consumption
• The ARM architecture is based on Reduced Instruction Set Computer
(RISC) principles.
https://developer.arm.com/docs/ddi0084/f/intro
duction/about-the-arm7tdmis
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• Instruction pipeline
It uses a pipeline to increase the speed of the
flow of instructions to the processor
The instructions are executed in three steps:
Fetch
Decode
Ex
ec
ut
e
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• The Instruction is fetched
Fetch from the Memory
• The instruction is Decoded
Decode
• Execution of the Instruction
Execute
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• During normal operation, while one instruction is being executed, its
successor is being decoded, and a third instruction is being fetched from
memory.
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Memory Access
• The ARM7TDMI-S has a single 32‑bit data bus carrying both
instructions and data.
It has four memory cycles:
• idle cycle
• Non sequential cycle
• sequential cycle
• coprocessor register transfer cycle
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arm7tdmis
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ARM7TDMI‑S architecture
• The Processor has two instruction sets:
• The 32 bit ARM instruction Set
• The 16 bit thumb instruction set
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Processor Core:
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Programmer’s Model:
The ARM7TDMI-S has two operating states:
• ARM state32-bit, word-aligned ARM instructions are executed in this
state.
• Thumb state16-bit, halfword-aligned Thumb instructions.
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• The ARM7TDMI-S views memory as a linear collection of bytes
numbered in ascending order from zero:
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Data types:
• word (32-bit)
• halfword (16-bit)
• byte (8-bit)
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Memory formats
• The ARM7TDMI processor views memory as a linear collection of
bytes numbered in ascending order from zero. For example:
• bytes zero to three hold the first stored word
• bytes four to seven hold the second stored word.
• The ARM7TDMI processor is bi-endian and can treat words in
memory as being stored in either:
• Little-endian.
• Big-endian
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Little-endian
• In little-endian format, the lowest addressed byte in a word is
considered the least-significant byte of the word and the highest
addressed byte is the most significant.
• So the byte at address 0 of the memory system connects to data
lines 7 through 0.
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Big-endian
• In big-endian format, the ARM7TDMI processor stores the most
significant byte of a word at the lowest-numbered byte, and the
least significant byte at the highest-numbered byte.
• So the byte at address 0 of the memory system connects to data
lines 31 through 24.
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Operating Modes
• User mode is the usual ARM program execution state, and is used for
executing most application programs.
• Fast interrupt (FIQ) mode supports a data transfer or channel process.
• Interrupt (IRQ) mode is used for general-purpose interrupt handling.
• Supervisor mode is a protected mode for the operating system.
• Abort mode is entered after a data or instruction pre fetch abort.
• System mode is a privileged user mode for the operating system.
• Undefined mode is entered when an undefined instruction is executed.
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• Modes other than User mode are collectively known as privileged
modes.
• Privileged modes are used to service interrupts, exceptions, or access
protected resources.
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Registers
• 31 general-purpose 32-bit registers
• 6 status registers
• These registers are not all accessible at the same time. The processor
state and operating mode determine which registers are available to
the programmer.
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• In ARM state, 16 general registers, and one or two status registers are
accessible at any one time. In privileged modes, mode-specific
banked registers become available.
• 16 directly-accessible registers, r0 to r15
• Current Program Status Register (CPSR)
• Registers r0 to r12 are general-purpose registers used to hold either
data or address values
• Register 14 is used as the subroutine Link Register (LR).
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Program counter :
• Register r15 holds the Program Counter (PC).
Stack Pointer:
Register r13 is used as the stack pointer (SP).
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Program Status Registers
• The ARM7TDMI-S contains a CPSR and five SPSRs for exception
handlers to use. The program status registers:
SPSR: Saved Program Status Registers
CPSR: Current Program Status Register
• hold the condition code flags
• control the enabling and disabling of interrupts
• set the processor operating mode.
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