Microprocessor System

SESSION OF Intel 8085

 History of Intel Microprocessors
Before 8085

INTEL 4004 INTEL 8008 INTEL 8080

1969
1972 1974
16 Pins DIP Package
18 Pins DIP Package 40 Pin DIP Package
•Clock speed : 108 KHz
•Clock speed : 800 KHz •Clock speed : 2 MHz
* Number of transistors:
* Number of transistor: * Number of transistor:
2300
3500 4500
•4-bit register and 4-bit data bus.
* 8-bit register and 8-bit data bus. •8-bit registers
The world first
•16-bit address bus and an 8-bit data
microprocessor
bus
 INTEL 8085 Microprocessor

• Year 1977
• Enhancement of 8080
• 40 Pins DIP Package
• The 8085 uses approximately 6,500
transistors
• Clock Speed: Max 6 MHz
• 8-bit Data Bus & 16 Bit Address Bus
 8085 INTRODUCTION
The features of INTEL 8085 are :
• It is an 8 bit processor.
• It is a single chip N-MOS(N Type Metal Oxide Semiconductor)
device with 40 pins DIP Package.
• It uses all instructions of 808 therefore it is program compatible
with 8080
• It has multiplexed address and data bus.(AD0-AD7)
• It works on single 5 Volt dc power supply.
• The maximum clock frequency is 6 MHz while minimum
frequency is 500kHz.
• It provides 74 instructions with 5 different addressing modes, Two
new instruction has been added in 8085, for taking advantage of
added hardware
 8085 INTRODUCTION
► It provides 16 address lines so it can access 2^16 =64K
bytes of memory.
► It generates 8 bit I/O address so it can access 2^8=256
input ports.
► It provides 5 hardware interrupts:TRAP, RST 5.5, RST 6.5,
RST 7.5,INTR.
► It provides Acc ,one flag register ,6 general purpose
registers and two special purpose registers(SP,PC).
► It provides serial lines SID ,SOD.So serial peripherals can
be interfaced with 8085 directly.
How Would you identify Pin Numbers
of DIP IC Package?
Short Description of Pin Diagram

Note: you may refer to Fig 8-2 (b) on page 210 of

Microprocessor Fundamentals by Roger
8085 Pin Diagram Description(1/7)
ADDRESS BUS, DATA BUS & ALE

•Multiplexedaddress and data bus.(AD0-AD7) from Pin

12 through 19.

• Least Significant 8 Lines of Address Bus shared with 8-

bit Data Bus.

•When these Pins works as Data Bus and When as

Address Bus is Decided by ALE (Address Latch Enable)
Output Pin Number 30 Signal.
• When ALE = 1 its Address, when ALE = 0 its Data.
8085 Pin Diagram Description (2/7)
Power & Clock Signals

• 8085 MPU works on Single +5V Power Supply

• Pin 40 & 20: Vcc is Power and Vss is Ground
• Pin 1 & 2 : X1 & X2 are Input pins that are connected from a crystal to the
internal clock circuitry of 8085 MP
•Pin 37: CLK is a Output Pin and it is used for timing & synchronization of
other peripherals by MP
8085 MPU
X1
Crystal X2 Internal Clock
Circuitry
Frequency A
Frequency ½ A
8085 Pin Diagram Description (3/7)

RESTART SIGNALS

•Pin 36: RESET IN is Input Pin if it is 0 then it will reset MPU and set
Program counter to address 000H

•Data Bus Address Bus and Control lines are TRI-STATED during a Reset. Tri-
state means MP will release their control & they are isolated from MP, and
any other peripheral can take control of them.

•Pin 3: RESET OUT is a Output pin, if it is 1 then it will inform all peripherals
that System is restart
•
8085 Pin Diagram Description (4/7)

SERIAL INPUT & OUTPUT

SIGNALS

• 8085 has two pins for serial data

input and output so, serial devices
can be directly interfaced with 8085
• Pin 5: SID is a Serial Input Pin, it
is used to input serial data (i.e. one
bit at a time) to MSB of
Accumulator. This Pin is control by
RIM instruction
• Pin 4: SOD is Serial Output Pin, it
is used to send serial data, by SIM Figure: 8-7 From Book Page 217
instruction
8085 Pin Diagram Description (5/7)
READY & HOLD SIGNALS
• Pin 35: is READY input port, it is used by other peripherals to inform MP
that they are ready to send or receive data
•If READY pin is low means 0 then MP will be in wait state until again the
REDY signal is high 1, this mostly occur frequently because of low speed of
other peripherals
• Pin39: is HOLD input signal, used by other peripherals to request MP that
they want to use the Data & Address Bus (may occur in DMA operations)
•Upon receiving HOLD signal, MP will first finish its own data transfer on
busses then
• Address Bus, Data Bus, RD, WR, IO/M pins are Tri-stated (means isolated
from MP)
• Pin 38: HOLDA, is a Output signal, it is an Acknowledgement to peripheral
requesting HOLD, and it inform the requesting peripheral that MP is going to
release the control of Buses in next clock cycle
8085 Pin Diagram Description (6/7)
MACHINE CYCLE
•Pins 33: S1, 29: S0, 34:
IO/M are Output signals that
are used to inform other
peripherals that what type of
machine cycle MP is running

Figure 8-3 Page 211

8085 Pin Diagram Description (7/7)
Interrupts SIGNALS
• An interrupt is a signal that alter the normal execution of
Microprocessor.
• In 8085 there are 5 interrupts Inputs TRAP, RST 7.5, RST 6.5, RST
5.5, INTR, through these interrupt signals can be sent to MP
• When MP receive interrupt it Acknowledged the interrupting device
through INTRA output signal.
• Those interrupts that can be enabled or disabled by software are
called Maskable interrupts e.g.: RST 7.5, RST 6.5, RST 5.5, INTR
• Those interrupts that can not be disabled are called Non-Maskable
interrupts e.g. TRAP .
8085 Pin Diagram Description (7/7)
Interrupts SIGNALS

Fig 8-6 page 216

8085 Pin Diagram Description (7/7)
Interrupts SIGNALS
• When TRAP signal goes high it will cause 8085 to save the PC
contents to stack and jump to memory location 0024H.(It cannot
be disabled called non maskable).
• RESTARTS interrupt which Restarts the program at new location in
memory.
• RST 7.5 , after saving the contents it will jump to 003CH location.
• RST 6.5 , after saving the contents it will jump to 0034CH location.
• RST 5.5 , after saving the contents it will jump to 002CH location.
• The lowest priority hardware interrupt is INTR input which causes
the processor to fetch an instruction from special external source
• Last four interrupts can be disabled or enabled by software.
End of PIN Diagram Description
8085 ARCHITECTURE
 Functional Blocks of 8085 ARCHITECTURE

The various functional blocks of 8085 are as follows:

1. Registers
2. Arithmetic logic unit
3. Data/Address buffer
4. Incrementer/decrementer address latch
5. Interrupt control
6. Serial I/O control
7. Timing and control circuitry
8. Instructions decoder and machine cycle encoder.
 Description of 8085 ARCHITECTURE (1/8)
REGISTERS OF 8085:

1. ACCUMULATOR
This 8-bit register is the most important one amongst all the registers of 8085. Any
data input/output to/from the microprocessor takes place via the accumulator
(register). It is generally used for temporary storage of data and for the
placement of final result of arithmetic/logical operations. Accumulator (ACC or A)
register is extensively used for arithmetic, logical, store and rotate operations

2. TEMPORARY REGISTERS
The temporary data register of 8085 is an 8-bit register, which is not available to the
programmer, but is used internally for execution of most of the arithmetic and
logical operations.
 Description of 8085 ARCHITECTURE (2/8)
3. GENERAL PURPOSE REGISTERS

• The general purpose registers of 8085 are: B, C, D, E, H and L.

They are all 8-bit registers but can also be used as 16-bit register
pairs—BC, DE and HL. These registers are also known as scratch
pad registers.

• HL register pair can be used as a data pointer or memory pointer.

• General purpose registers store temporary data during program

execution, which can also be stored in different accessible memory
locations. But storing temporary data in memory requires bus access
—hence more time is needed to store. Thus it is always advisable to
store data in general purpose registers.
 Description of 8085 ARCHITECTURE (3/8)
4. PROGRAM COUNTER

Program counter (PC) is a sixteen bit register which

contains the address of the instruction to be executed
just next. PC acts as a address pointer (also known as
memory pointer) to the next instruction. As the
processor executes instructions one after another, the
PC is incremented—the number by which the PC
increments depends on the nature of R/W memory the
instruction. For example, for a 1-byte instruction, PC is
incremented by one, while for a 3-byte instruction, the
processor increments PC by three address locations.

5. STACK POINTER

Stack pointer (SP) is a sixteen bit register which points to the ‘stack’. The stack is an
area in the R/W memory where temporary data or return addresses (in cases of
subroutine CALL) are stored. Stack is a auto-decrement facility provided in the system.
The stack top is initialized by the SP by using the instruction LXI SP, memory address.

In the memory map, the program should be written at one end and stack should be
initialized at the other end of the map—this is done to avoid crashing of program.
 Description of 8085 ARCHITECTURE (4/8)
6. INSTRUCTION REGISTER

Program written by the programmer resides in the R/W memory. When an

instruction is being executed by the system, the opcode of the instruction is
fetched from the memory and stored in the 8-bit instruction register. The
opcode is loaded into the instruction register during opcode fetch cycle. It is
then sent to the instruction decoder.

7. INCREMENT/DECREMENT ADDRESS LATCH

This 16-bit register increments/decrements the contents of PC or SP when

instructions related to them are executed.
 Description of 8085 ARCHITECTURE (5/8)
8. STATUS FLAGS REGISTER
It is an 8-bit register in which five bit positions contain the status of five condition flags
which are Zero (Z), Sign (S), Carry (CY), Parity (P) and Auxiliary carry (AC). Each of
these five flags is a 1 bit F/F. The flag register can’t be written into. The flag register
format is shown in Fig

Sign (S) flag: – If the MSB of the result of an operation is 1, this flag is set, otherwise it is reset.

Zero (Z) flag:– If the result of an instruction is zero, this flag is set, otherwise reset.

Auxiliary Carry (AC ) flag:– If there is a carry out of bit 3 and into bit 4 resulting from the execution
of an arithmetic operation, it is set otherwise reset. This flag is used for BCD operation and is not
available to the programmer to change the sequence of an instruction.

Carry (CY) flag:– If an instruction results in a carry (for addition operation) or borrow (for subtraction
or comparison) out of bit D7, then this flag is set, otherwise reset.

Parity (P) flag:– This flag is set when the result of an operation contains an even number of 1’s and
is reset otherwise.
 Description of 8085 ARCHITECTURE (6/8)
ALU
• ALU is responsible for all arithmetic and logic operations
of MP.

• The ALU functions as a part which includes arithmetic

logic group of circuits. This includes accumulator, flags
F/Fs and temporary register blocks.

• 8085 does not have the above two instructions. It can

neither multiply nor divide two 8-bit numbers. The same
are executed by the processor following the process of
repetitive addition or subtraction respectively.
 Description of 8085 ARCHITECTURE (7/8)

SERIAL I/O CONTROL

It is used to accept the serial 1 bit data by using SID and SOD signals
and it can be performed by using SIM & RIM instructions

INTERRUPT CONTROL
It accepts different interrupts like TRAP INT5.5,6.5,7.5and INTR.

ADDRESS / DATA BUFFERS

8-bit Temperory Storage for Data/Address before transmitting to or
after receiving from Data/Address Bus

INSTRUCTION DECODER & MACHINE CYLE ENCODING

This section is responsible for decoding the opcode and provide this
information to timing & control section
Description of 8085 ARCHITECTURE (8/8)
TIMMING AND CONTROL SECTION

The T&C section is a part of CPU and generates

timing and control signals for execution of
instructions. This section includes Clock signals,
Control signals, Status signals, DMA signals as
also the Reset section. This section controls
fetching and decoding operations. It also
generates appropriate control signals for
instruction execution as also the signals
required to interface external devices.
End of Internal Architecture of
8085
What are the different instruction word sizes in 8085?

The instruction word sizes are of the following types:

 1-byte instruction
 2-byte instruction
 3-byte instruction

The examples are given below:

 1-byte instruction : ADD B

 2-byte instruction : MVIC, 07
 3-byte instruction : LDA 4400
Explanation of word size of instructions
ADDRESSING MODES OF 8085
 Each instruction indicates an operation to be performed on certain data.
There are various methods to specify the data for the instructions, known
as ‘addressing modes’.

 Or An Addressing mode is the technique used to fetch the desired

operand during execution of an instruction

 For 8085 microprocessor, there are five addressing modes.

These are:
 Direct addressing
 Register addressing
 Register indirect addressing
 Immediate addressing
 Implicit addressing.
ADDRESSING MODES OF 8085
(a)Direct Addressing:
In this mode, the address of the operand is specified within the
instruction itself.
• Specified using three byte instruction format. 1st byte is
OPCODE for direct addressing instruction 2nd and 3r bytes are
lower and higher order byte of address of oprand.

Examples of this type are:

LDA 4000H, STA 5513H, etc.
IN/OUT instructions (like IN PORT C, OUT PORT B, etc.) also falls
under this
category. 3AH

0000 0000

LDA 1111 1111 0000 0010

1111 1111
Low order and
high order byte
address
 ADDRESSING MODES OF 8085
(b) Register Addressing:
In this mode of addressing, the operand are in the general purpose
registers.
Examples are: MOV A, B ; ADD D, etc. take example ADD C

0000 0111
+ 0000 1111
0000 1000 Accumulator

0(S) 0(Z) ---- 0(AC) -- 1(P) - 0(C)

FLAGS
 ADDRESSING MODES OF 8085
c) Register Indirect Addressing:
MOV A, M; ADD M are examples of this mode of addressing. These
instructions utilize 1-byte. In this mode, instead of specifying a
register, a register pair is specified to accommodate the 16-bit
address of the operand.

(d) Immediate Addressing:

MVI A, 07; ADI 0F are examples of Immediate Addressing mode.
The operand is specified in the instruction in this mode. Here, the
operand address is not specified.

(e) Implicit Addressing:

In this mode of addressing, the operand is fully absent. Examples
are RAR, RAL, CMA, etc.
 Instruction set Classification

• An instruction is a binary pattern designed inside a

microprocessor to perform a specific function. The
entire group of instructions, called the instruction set,
• Determines what functions the microprocessor can
perform.
Classification of instruction
• data transfer (copy) operations,
• Arithmetic operations,
• Logical operations,
• Branching operations, and
• Machine-control operations.
 Instruction set Classification
• Data Transfer (Copy) Operations
This group of instructions copy data from a location called
a source to another location called a destination,
without modifying the contents of the source.
 Instruction set Classification
Arithmetic Operations
These instructions perform arithmetic operations such as
addition, subtraction,
increment, and decrement.

•Addition
•Subtraction
•Increment/Decrement
 Instruction set Classification
Arithmetic Operations
These instructions perform arithmetic operations such as
addition, subtraction,
increment, and decrement.

•Addition
•Subtraction
•Increment/Decrement
 Instruction set Classification
Logical Operations
These instructions perform various logical operations with
the contents of the accumulator.
AND, OR Exclusive-OR - Any 8-bit number, or the
contents of a register, or of a memory location can be
logically ANDed, Ored, or Exclusive-ORed with the
contents of the accumulator.
Rotate- Each bit in the accumulator can be shifted either
left or right to the next position.
Compare- Any 8-bit number, or the contents of a
register, or a memory location can be compared for
equality, greater than, or less than, with the contents of
the
accumulator.
Complement - The contents of the accumulator can be
complemented.
 Instruction set Classification
Branching Operations
This group of instructions alters the sequence of program
execution either conditionally or unconditionally.
Jump - Conditional jumps are an important aspect of the
decision-making process in the programming. These
instructions test for a certain conditions (e.g., Zero or
Carry flag) and alter the program sequence when the
condition is met.

Call, Return, and Restart - These instructions change

the sequence of a program either by calling a subroutine
or returning from a subroutine. The conditional Call and
Return instructions also can test condition flags.
 Instruction set Classification
Machine Control Operations
These instructions control machine functions such as Halt,
Interrupt, or do nothing.

Summary:
The microprocessor operations related to data
manipulation can be summarized in
four functions:
1. copying data
2. performing arithmetic operations
3. performing logical operations
4. testing for a given condition and alerting the program
sequence