CST1500

Computer Systems Architecture and

Operating Systems

Lecture 4 - Introduction to Digital Logic

1
 Overview
• This Lecture
– Introduction to Digital Logic
• Gates
• Boolean algebra
– Combinatorial Logic
– Source: Chapter 11 (10th edition)
• Next Lecture
– Sequential Logic

2
 Basic Logic Gates
• Basic logic Gates

3
 NOT Gate (or Inverter)

A Q

0 1
Q=Ā
1 0

(a) Circuit symbol (b) Truth Table (c) Boolean expression

4
 How Many Functions
• How many functions are there of 1 binary input with 1
binary output?

A Q A Q A Q A Q
0 0 0 0 0 1 0 1
1 0 1 1 1 0 1 1

FALS IDENTITY NOT TRUE

E

5
 AND Gate

A B Q

0 0 0 Q=A·B
0 1 0 Can be extended:
Q=A·B·C
1 0 0
·...
1 1 1

(a) Circuit symbol (b) Truth Table (c) Boolean expression

6
 NAND (AND then NOT)

A B Q

0 0 1
0 1 1
1 0 1 Q =𝐀·𝐁

1 1 0
(a) Circuit symbol (b) Truth Table (c) Boolean expression

7
 OR

A B Q

0 0 0
Q=A+B
0 1 1 Can be extended
Q=A+B+
1 0 1 C+...
1 1 1

(a) Circuit symbol (b) Truth Table (c) Boolean expression

8
 NOR (or then not)

A B Q

0 0 1
0 1 0 Q=𝐀+𝐁
1 0 0
1 1 0
(a) Circuit symbol (b) Truth Table (c) Boolean expression

9
EOR / XOR Gate (exclusive or)

A B Q

0 0 0

0 1 1

(a) Circuit symbol 1 0 1

1 1 0
(b) Truth Table
(c) Boolean expression
10
Introduction to Combinatorial Logic
• Combinatorial logic circuit - one whose outputs are
dependent only on the inputs
• Assume the outputs respond immediately
• In real circuits, propagation delays must be considered
– Hence the clock-cycle on your PC

11
 Defining a Combinatorial Circuit
• Truth table
– For each of the 2n possible combinations of input signals, the
binary value of each of the m outputs is listed

• Boolean equations
– Each output signal is expressed as a Boolean function of its input
signals

• Graphical signals (Circuit Symbol)

– Interconnection of gates used to implement the circuit

12
1-Bit Half Adder A 1-bit
Sum
S
half adder
B Carry
C

A B CS
0 0 00
S=A•B+A•B
0 1 01 = A xor B

1 0 01 C=A•B
= A and B
1 1 10
(a) Truth Table (b) Circuit symbol (c) Boolean expression

13
 Full Adder

Inputs Outputs
A B Cin Cout S
000 0 0
100 0 1
010 0 1
110 1 0
001 0 1
101 1 0
011 1 0 (b) Circuit symbol

111 1 1
(a) Truth Table 14
 Ripple Carry Adder

Adding bigger binary numbers

• Chain of full adders

15
 Boolean Algebra

• Boolean Constants
• These are ‘0’ (false) and ‘1’ (true)
• Boolean Variables
• Variables that only take the values ‘0’ or ‘1’
• Boolean Functions
• Each of the logic functions (such as AND, OR and NOT are
represented by symbols as described previously)
• Boolean Theorems
• As set of identities and laws as will be shown next
 Boolean Algebra laws
Identity Proposition
A+0=A
A+1=1
Operator Precedence
A•1=A
- (NOT) 1
A•0=0
• (AND) 2
Inverse Proposition
+ (OR) 3
A + Ā= 1 A • Ā= 0
Commutative Proposition
A•B=B•A A+B=B+A
Distributive Proposition
A • (B + C) = (A • B) + (A • C) A + (B • C) = (A + B) • (A + C)

17
Boolean Algebra (cont)

(AB)’ = A’ + B’
Same expression to
(A + B)’ = A’ * B’

19
Proof by Truth Table

20
 De Morgan
• Equations of 1-bit half adder requires 2 AND gates, 1 OR
gate, and 2 NOT gates

• Inefficient since IC’s contain groups of a single type of gate

• De Morgan’s theorem states it is possible to convert a NOR

into a NAND and vice versa
(AB)’ = A’ + B’ & (A + B)’ = A’ * B’

Equivalent Ways of Drawing NAND / NOR Gates

21
 NAND Logic
• NOT

• AND

• OR

23
 NAND Logic
• NAND

• NOR

• XOR

24
Example: 3-Bit Parity Generator

• Add an extra bit to data such that the number of

ones in the data is always odd
• Output - a single output (P)
• Inputs - three inputs labeled A, B, C

A
Parity
Generator P
B

25
 Example (cont): 3-Bit Parity
Generator
• Boolean Equation A B C P
0 0 0 0 1
– In ‘sum of products form’
1 0 0 1 0
• In which rows does p=1
2 0 1 0 0
• What are the inputs on those rows
3 0 1 1 1
4 1 0 0 0
5 1 0 1 1
6 1 1 0 1
7 1 1 1 0

26
Example (cont): 3-Bit Parity
Generator

27
7-Segment Decimal Decoder
Example

28
 C
Transistor B

• To implement a logic gate in hardware, you use a transistor E

• Transistors are all enclosed in an “IC”, or integrated circuit
• Intel Pentium IV processors have 55 million transistors.
• Transistors are Electronic Switch
– B=Base, C=Collector, E=Emitter
• Apply 0v to B and the switch opens
– C is disconnected from E
• Apply +5v to B and the switch closes
– C is connected to E
• In other words, B is the switch that connects C to E

29
 NAND Gate
• For Q to be Low (binary 0)
– A and B must be closed
• Otherwise Q
– If A is open
+5V
A
• +5V flows to Q
– If A is closed but B is open
• +5V flows to Q
– If A and B are closed B
• “short circuit Q”

30
 Electronic Switch
• How about a switch that we can
– turn on and off with a control C
line (C)
•Output (Q) = Input (A) iff C = 1
A Switch Q

C
• This is the same as an AND gate

A Q

31
 Flip-flops
• Consider the following circuit:

• What does it do?

• Will be fully discussed in the following lecture
 Memory

• A flip-flop holds a single bit of memory

• The bit “flip-flops” between the two NAND gates
• In reality, flip-flops are a bit more complicated
• Have 5 (or so) logic gates (transistors) per flip-flop
• Consider a 1Gb memory chip
• 1Gb = 8,589,934,592 bits of memory
• That’s about 43 million transistors
• In reality, those transistors are split into 9 ICs of about 5
million transistors each
 Multiplexer
• A digital switch in which the select lines (sel1 & sel2)
select between the inputs(I0 I1, I2, I3)
• Imagine I is 4 x 1-bit memory cells and sel selects the
memory location for output to OUT

34
 Demultiplexer
• The demultiplexer works in reverse
– One of the outputs (Y0-Y3) is selected (sel1-sel2) for input
• Imagine INPUT is 1-bit value and sel selects where to
store the value

35
 Multiplexing
• Imagine using 1 wire to carry 5 conversations

36
 Summary
• You computer consist of different logic gates:
- Not
- AND
- NAND
- OR
- NOR
- XOR

• De Morgan’s theorem states it is possible to convert a NOR into a

NAND and vice versa

• Transistor are electronic switches

• Multiplexer and demultiplexer are both used in memory cells to

output or store values.