Introduction to Computer Architecture

Lecture 2 – Digital Logic Design

August 20th, 2008

www.qatar.cmu.edu

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Digital Systems
Digital vs. Analog Waveforms

+5 +5
1 0 1
V V
Time T ime

–5 –5

Digital: Analog:
only assumes discrete values values vary over a range continuously

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Digital Hardware
Systems
Boolean Algebra and Logical Operators

Algebra: variables, values, operations

In Boolean algebra, the values are the symbols 0 and 1

If a logic statement is false, it has value 0
If a logic statement is true, it has value 1

Operations: AND, OR, NOT

X Y X AND Y X Y X OR Y X NOT X
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

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Example: Seven Segment Display

° Chip to drive digital display

L1
L L
4 6
L2
L L
5 7
L3

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 Example
(cont.)
L1 B3 B2 B1 B0 Val L1 L2 L3 L4 L5 L6 L7
0 0 0 0 0 1 0 1 1 1 1 1
L L 0 0 0 1 1 0 0 0 0 0 1 1
4 6 0 0 1 0 2 1 1 1 0 1 1 0
0 0 1 1 3 1 1 1 0 0 1 1
L2 0 1 0 0 4 0 1 0 1 0 1 1
0 1 0 1 5 1 1 1 1 0 0 1
L L 0 1 1 0 6 1 1 1 1 1 0 1
5 7 0 1 1 1 7 1 0 0 0 0 1 1
1 0 0 0 8 1 1 1 1 1 1 1
L3 1 0 0 1 9 1 1 1 1 0 1 1

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Example (cont.)

° Implement L4:

Some gate level implementation

of the Boolean function for L4

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 Representations of Digital Design:
Switches
A switch connects two points under control signal.

Normally Open when the control signal is 0 (false), the switch is open

when it is 1 (true), the switch is closed

Normally Closed when control is 1 (true), switch is open

when control is 0 (false), switch is closed

True True

Control Closed Control Open

Switch Switch

False False
Normally Open Normally Closed
Switch Switch

Open Closed
Switch Switch
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 Switch Representations
Examples: routing inputs to outputs through a maze

EXAMPLE:
Car in Garage Car
IF car in garage garage door open running
AND garage door open
AND car running Car can
True
THEN back out car back out

EXAMPLE: Garage door Car in

closed garage Car
IF car in driveway running
OR (car in garage
AND NOT garage door True
Car can
closed) back out
AND car running True
THEN can back out car Car in
driveway
Floating nodes:
what happens if the car is not running?
outputs are floating rather than forced to be false
Under all possible control signal settings
(1) all outputs must be connected to some input through a path
(2) no output is connected to more than one input through any path
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 Steering Logic:
Switches
Voltage Controlled Switches
Channel
Region
Gate
Oxide
Source Drain
Silicon Bulk
n-type Si
p-type Si
"n-Channel MOS"
Metal Gate, Oxide, Silicon Sandwich

Diffusion regions: negatively charged ions driven into Si surface

Si Bulk: positively charged ions

By "pulling" electrons to the surface, a conducting channel is formed

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Switching or Steering
Logic

Voltage Controlled Switches

Gate

Logic 1 on gate,
Source Drain Source and Drain connected
nMOS Transistor

Gate
Logic 0 on gate,
Source and Drain connected
Source Drain
pMOS Transistor

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Using Switches to implement Logic

Inverter Operation
+5V +5V

"1" "0" "0" "1"

Input is 1 Input is 0
Pull-up does not conduct Pull-up conducts
Pull-down conducts Pull-down does not conduct
Output connected to GND Output connected to VDD

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NAND Gate

NAND Gate Operation

"1" "1" "0" "1"
+5V +5V

"0" "1"

A = 1, B = 1 A = 0, B = 1
Pull-up network does not conduct Pull-up network has path to VDD
Pull-down network conducts Pull-down network path broken
Output node connected to GND Output node connected to VDD

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NOR Gate

NOR Gate Operation

"0" "0" "1" "0"

+5V +5V

"1" "0"

A = 0, B = 0 A = 1, B = 0
Pull-up network conducts Pull-up network broken
Pull-down network broken Pull-down network conducts
Output node at VDD Output node at GND

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 Switch Representations

Implementation of AND and OR Functions with Switches

A B A B

False False
output output

True True

AND function OR function

Series connection to TRUE Parallel connection to TRUE

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Representations of a Digital Design

Truth Tables
tabulate all possible input combinations and their associated
output values

Example: half adder Example: full adder

adds two binary digits adds two binary digits and
to form Sum and Carry Carry in to form Sum and
Carry Out
A B Sum Carry A B Cin S um C out
0 0 0 0 0 0 0 0 0
0 1 1 0 0 0 1 1 0
1 0 1 0 0 1 0 1 0
1 1 0 1 0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
NOTE: 1 plus 1 is 0 with a 1 1 1 1 1
carry of 1 in binary

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Representing Digital Design: Boolean
Algebra
values: 0, 1
variables: A, B, C, . . ., X, Y, Z
operations: NOT, AND, OR, . . .

NOT X is written as X
X AND Y is written as X & Y, or sometimes X Y
X OR Y is written as X + Y

Deriving Boolean equations from truth tables:

Sum = A B + A B
A B Sum Carry
OR'd together product terms
0 0 0 0 for each truth table
0 1 1 0 row where the function is 1
1 0 1 0
1 1 0 1 if input variable is 0, it appears in
complemented form;
if 1, it appears uncomplemented
Carry = A B
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Representing Digital Logic: Boolean
Algebra

Another example:

A B Cin Sum Cout Sum = A B Cin + A B Cin + A B Cin + A B Cin

0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Cout = A B Cin + A B Cin + A B Cin + A B Cin

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Gate Representations of a Digital
Design
most widely used primitive building block in digital system design
Standard
Logic Gate Half Adder Schematic
Representation
A
Inverter

AND
SUM

B
OR

CARR Y

Net: electrically connected collection of wires

Netlist: tabulation of gate inputs & outputs

and the nets they are connected to

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Representations of a Digital Design:
Gates
Full Adder Schematic
\Cin \ B \ A
Cin B A
A

SUM
Cin

A
B

Cout B Cout
Cin

A
Cin

Fan-in: number of inputs to a gate

Fan-out: number of gate inputs an output is connected to

Technology "Rules of Composition" place limits on fan-in/fan-out

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Waveform
Representation
dynamic behavior of a circuit
real circuits have non-zero delays

Timing Diagram of the Half Adder

100 200
A
B
SUM
CARR Y

sum sum
propagation propagation
delay delay
circuit hazard: 1 plus 0 is 1, not 0!

Output changes are delayed from input changes

The propagation delay is sensitive to paths in the circuit

Outputs may temporarily change from the correct value to the

wrong value back again to the correct value: this is called
a glitch or hazard
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Routing Stuff Around – Multiplexors and
Demultiplexors
Multi-point connections

A0 A1 B0 B1
Multiple input sources
Sa MUX MUX Sb

A B

Sum

Ss DEMUX Multiple output destinations

S0 S1

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 So far Combinatorial (or stateless)
logic
° Things don’t get really interesting
until we have memory elements
•Think about a digital watch, or a
vending machine (or a
microprocessor!)
•This is called “Sequential Logic”

° Two questions:
•How do we design memory elements?
- How do we create logic that remembers?
•How do we design sequential logic
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 Memory
Elements
° The trick is to use feedback
Cascaded Inverters: Static Memory Cell
"1"
"0" D Q
Clk

° Example: D-Latch D

Clk

° Latch vs. Flip Flop

•Flip flop: two latches in a row
•Allows you to read the old value and
write a new value without a race
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 Sequential Logic
Design
inputs outputs
Combinatorial
Current Logic Next state
state
State

° State as part of the input

° Next state as part of the output
° State stored in flip flops (registers!)
° Clock controls everything (synchronous logic)
° Lets rethink our 8 segment display example to
make it display a counter

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 Take home
points
° Logic built using switches
(transistors)
° Boolean algebra and truth tables
° Translation to gates: sum of
products
° Multiplexors, demultiplexors, ALU …
all designed this way
° Sequential logic
• Memory elements
• Old state part of inputs, next state part
of outputs
• Counters, registers, control all
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