SESSION 4
Introduction To SystemVerilog
Prepared by Ahmed Eissa
[email protected]
CONTENTS
• OOP in verification
• OOP in SystemVerilog
WHAT, WHERE
AND WHY OOP?:
THE WHAT
• Stands for object oriented
programming
• A programming paradigm
which is a style, or “way,” of
programming
• Uses objects of classes as core
components
• Example: A car is assembled
from parts and components,
such as chassis, doors,
engine, wheels, brake, and
transmission.
• The components are reusable,
e.g., a wheel can be used in
many cars (of the same
specifications).
WHAT, WHERE AND WHY OOP?: THE
WHERE
• Most modern programming languages
– C++
– Java
– Pyhton
– Perl
– Ruby
– MATLAB
– Objective-C
– SystemVerilog
WHAT, WHERE AND WHY OOP?: THE
WHY
• Reusability
• Object-Oriented Programming (OOP) lets you create complex data
types and tie them together with the routines that work with them.
• Grouping data and code together helps you in creating and
maintaining large testbenches
• In SystemVerilog, it is much easier to work with classes than with
modules
THE FOUR PILLARS OF
OOP
THE FOUR PILLARS OF OOP
THE FOUR
PILLARS OF OOP:
INHERITANCE
• Inheritance is the OOP
ability that allows
classes to be derived
from other classes.
• The parent class is
called a superclass
• The derivatives classes
are called subclasses.
THE FOUR PILLARS OF OOP: INHERITANCE
THE FOUR PILLARS OF OOP:
INHERITANCE
• Subclasses inherit fields and
methods from their
superclasses
THE FOUR PILLARS OF OOP:
INHERITANCE
THE FOUR PILLARS OF OOP:
POLYMORPHISM
• Polymorphism comes from the Greek language, and means “many
forms”
• Polymorphism allows subclasses of a class to define their own
unique behaviors and yet share some of the same functionality of
the parent class
THE FOUR PILLARS OF OOP:
POLYMORPHISM
class animal
speak();// method
class cat class dog
speak();// method speak();// method
THE FOUR PILLARS OF OOP:
ENCAPSULATION
• Encapsulation is all about wrapping variables and methods in
one single unit.
THE FOUR PILLARS OF OOP: ENCAPSULATION
THE FOUR PILLARS OF OOP:
ABSTRACTION
• Refers to showing only the essential features of the
application and hiding the details
• Abstraction = Encapsulation + Data hiding
BASIC OOP IN
SYSTEMVERILOG
BASIC OOP IN SYSTEMVERILOG
• SystemVerilog introduces an object-oriented class data
abstraction:
– Classes are data types
– Classes allow objects to be dynamically created, deleted, assigned, and
accessed via object handles.
– includes data and subroutines (functions and tasks) that operate on
that data
– A class’s data is referred to as class properties
– A class’s subroutines are called methods
– A object is an instance of the class
class Packet ; initial begin
//data or class properties
Packet p = new();
BASIC OOP IN SYSTEMVERILOG
bit [3:0] command;
bit [40:0] address; p.command = INIT;
bit [4:0] master_id;
integer time_requested; p.address = $random;
integer time_issued;
integer status;
packet_time = p.time_requested;
// initialization end
function new();
command = IDLE;
address = 41’b0;
master_id = 5’bx;
endfunction
// methods
// public access entry points
task clean();
command = 0; address = 0; master_id = 5’bx;
endtask
task issue_request( int delay );
// send request to bus
endtask
function integer current_status();
current_status = status;
endfunction
endclass
BASIC OOP IN SYSTEMVERILOG
• A class defines a data type
– Class declaration does not occupy any memory, it only creates a new
type??
• An object is an instance of that class
• An object is used by first declaring a variable of that class type
(that holds an object handle)
– then creating an object of that class (using the new function) and
assigning it to the variable.
– Uninitialized object handles are set by default to the special value null.
An uninitialized object can be detected by comparing its handle with
null.
• The focus in object-oriented programming is the object
BASIC OOP IN SYSTEMVERILOG
• A class variable holds a handle referencing an object
• Uninitialized objects have the special value null
• Unallocated object can’t normally be accessed??!
BASIC OOP IN SYSTEMVERILOG
class bus_transaction; …
//properties bus_transaction b1 =new();
bit [31:0] data;
int unsigned address; initial begin
bit wr_en; $display(b1.command);
function reset(); b1.reset();
data = 32’h00000000;
address = 0;
end
wr_en = 1’b0;
endfunction
…
endclass
BASIC OOP IN SYSTEMVERILOG
• A class can be defined in a program, module, package, or outside
any of these
• Recommendation
– Store a single class per file
– Group related classes inside a single package
BASIC OOP IN SYSTEMVERILOG:
CLASS CONSTRUCTOR
• SystemVerilog provides a mechanism for initializing an instance at
the time the object is created.
• The new function is also called the class constructor
– Created by default
– A function with no return type
▪ like any other function, it must be nonblocking.
– It is also possible to pass arguments to the constructor, which allows
run-time customization of an object:
– Can be only one in each class
– a new memory is allocated for each call of the construct (dynmaic)
BASIC OOP IN SYSTEMVERILOG:
CLASS CONSTRUCTOR
module test;
class bus_transaction b1 = new();
bus_transaction; endmodule
//properties
bit [31:0] data;
int unsigned address;
bit wr_en; module test;
bus_transaction b1;
// constructor bus_transaction b2;
//methods initial
b1 = new();
endclass b2 = new ();
endmodule
BASIC OOP IN SYSTEMVERILOG
• SystemVerilog does not require the complex memory allocation and
deallocation of C++. Construction of an object is straightforward
and garbage collection, as in Java, is implicit and automatic. There
can be no memory leaks or other subtle behavior that is so often
the bane of C++ programmers.
• SystemVerilog objects are dynamically created and destroyed
– Memory allocation and deallocation (garbage collection) is handled
automatically
– Since pointers are a key ingredient in the flexibility of classes,
SystemVerilog implements them too, but in a safer form, called handles
– Objects are allocated via its constructor called “new” method
– Objects are automatically cleared (de-allocated) by the SystemVerilog
garbage collector when no handle is assigned to them
BASIC OOP IN SYSTEMVERILOG: THIS
• this: a reserved to keyword which is a A predefined object handle
that refers to the current object
Challenge:
How to copy an object?
Easy
assign the
new object to
the old one
BASIC OOP IN SYSTEMVERILOG: COPY
• A handle is only a pointer
Challenge:
How to copy an object?
Then make it
like dynamic
array
b2 = new()
(b1)
BASIC OOP IN SYSTEMVERILOG: COPY
• Shallow copy:
– All of the variables are copied across integers, strings, instance
handles, etc.
– Objects, however, are not copied, only their handles; as before, two
names for the same object have been created.
– This is true even if the class declaration includes the instantiation
operator new.
– This works well if the fields are values, but may not be what you want
for fields that point to dynamically allocated memory.
BASIC OOP IN SYSTEMVERILOG: COPY
BASIC OOP IN SYSTEMVERILOG: COPY
• A deep copy
– Copies all fields and makes copies of dynamically allocated memory
pointed to by the fields.
– To make a deep copy, you must write a copy constructor
BASIC OOP IN SYSTEMVERILOG: COPY
Challenge:
How to have a shared variable between all object of a class?
Declare a
global variable
BASIC OOP IN SYSTEMVERILOG
• Global variables are a curse
– This “pollutes” the global name space and makes variables visible to
everyone, even if you want to keep them local
BASIC OOP IN SYSTEMVERILOG:
STATIC PROPERTIES
• Static: Storage allocated on instantiation and never de-allocated
• SystemVerilog allows static variables to be declared within a class
• A static variable declared inside a class is
– Shared between all class instances (objects)
– Accessible only via the class
BASIC OOP IN SYSTEMVERILOG:
STATIC PROPERTIES
class Transaction; Transaction t1, t2;
initial begin
//Num of object t1 = new(); // 1st, instance, id =0; //
static int count; count = 1
$display(“First id=%0d, count=%0d, t1.id, t1.count);
int id;
t2 = new(); // 2nd instance, id=1, //
function new(); count=2
id = count ++; $display(“second id=%0d, count=%0d, t1.id,
t1.count);
endfunction
endclass end
BASIC OOP IN SYSTEMVERILOG:
STATIC PROPERTIES
• Static variables can be accessed via the class name only without a
handle using the scope operator “::“
• This means that they can be accessed before any object is
constructed (allocated in the memory)?!!
BASIC OOP IN SYSTEMVERILOG:
STATIC PROPERTIES
class Transaction;
static int count;//Num of objects
endclass
initial begin
run_test();
$display(“%0d transaction were created”€,Transaction::count);
end
BASIC OOP IN SYSTEMVERILOG:
STATIC METHODS
• Class methods can be static too
• Usually used to control static properties
• As static properties, they can be accessed via the class name only
even before any object of that class is created
• Rule: static methods can’t read or write non-static variables. Why?
– no objects of the class means, no storage is allocated to non-static
variables
BASIC OOP IN SYSTEMVERILOG:
STATIC METHODS
class Transaction;
static int count = 0;
int id;
static function void display_statics();
$display(“count = %d”, count);
endfunction
endclass
initial begin
$display(“%0d transaction were created”, Transaction::count);
end
OOP IN SYSTEMVERILOG: DATA
HIDING
• By default, all the members and methods of a class are accessible
from any where using the object handle, sometimes this could
corrupt the class members values,
which should not be touched at all.
• In SystemVerilog, everything is public unless labeled local or
protected.
OOP IN SYSTEMVERILOG: DATA
HIDING
• Access control rules that restrict the members of a class from
being used outside the class, this is achieved by prefixing the class
members with the keywords:
– local
▪ External access to the class members can be avoided by declaring members
as local.
▪ Any violation could result in compilation error
▪ Present but not visible from child classes
▪ May only be accessed by methods in the parent class
▪ syntax: local integer x;
TASKS AND FUNCTIONS: RECURSION
class parent_class;
local bit [31:0] tmp_addr; Error- Illegal class variable access
testbench.sv,
function new(bit [31:0] r_addr); Local member 'tmp_addr' of class
tmp_addr = r_addr + 10; 'parent_class' is not visible to
endfunction
scope
function display();
$display("tmp_addr = %0d",tmp_addr);
'encapsulation'
endfunction
endclass
module encapsulation;
initial begin
parent_class p_c = new(5);
p_c.tmp_addr = 20; //Accessing local variable
outside the class
p_c.display();
end
endmodule
OOP IN SYSTEMVERILOG: DATA
HIDING
– protected
▪ In some use cases it is requires to access the class members only by the
derived class's, this can be done by prefixing the class members with
protected keyword.
▪ Treated as local members in the parent class but visible in child classes
▪ Inherited as protected and treated as local members in the child class
▪ Any violation could result in compilation error.
▪ Syntax: protected integer x
FINAL REMARKS
COMMON INTERVIEW QUESTION
• Shallow copy vs deep copy
• What is polymorphism?
• Static vs automatic in class
ASSIGNMENTS
• Reading assignment: Study chapter five from SystemVerilog for
Verification book (33 pages)
• Reading assignment: Study section 4.1 and 4.2 (page 87 to 97)
from SystemVerilog for Verification book (20 page)
• Solve lab 2
REFERENCES
• Main textbook: SystemVerilog for Verification by Chris Spear
• Writing Testbenches using System Verilog
• Systemverilog Language Reference Manual
THANK YOU
