This contains artefacts of modified riscv32ic gnu toolchain https://github.com/riscv/riscv-gnu-toolchain with custom instructions

AES Hardware Accelerator in VHDL, device driver in C and RTL implementation of AES-128 bit according to standard in VHDL for complete System on Chip.

This code calculates properties like inter hamming distance and uniqueness of PUF's of 128 bit

RTL design of a UART (Universal Asynchronous Receiver Transmitter).

This project will test the FPGA UART RTL design using external microcontroller i.e. STM32F401RE that has third party UART TX/RX available.

Trading software

STM32 F4xx UART(tx/rx), GPIO(input/out), DMA, I2C, SPI and Systick drivers

This program redirect Mbed stdout to the STM

mbed os 5 driver for oled b click