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@arsenm arsenm commented Sep 13, 2025

Permit tied operands to be mismatched agpr or vgpr. The operands
are tied so they will eventually resolve to the same subclass. I'm
surprised the generic verifier doesn't enforce tied operands using
identical classes.

Fixes expensive_checks failures.

Permit tied operands to be mismatched agpr or vgpr. The operands
are tied so they will eventually resolve to the same subclass. I'm
surprised the generic verifier doesn't enforce tied operands using
identical classes.

Fixes expensive_checks failures.
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arsenm commented Sep 13, 2025

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@arsenm arsenm requested a review from rampitec September 13, 2025 01:09
@arsenm arsenm marked this pull request as ready for review September 13, 2025 01:09
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llvmbot commented Sep 13, 2025

@llvm/pr-subscribers-backend-amdgpu

Author: Matt Arsenault (arsenm)

Changes

Permit tied operands to be mismatched agpr or vgpr. The operands
are tied so they will eventually resolve to the same subclass. I'm
surprised the generic verifier doesn't enforce tied operands using
identical classes.

Fixes expensive_checks failures.


Full diff: https://github.com/llvm/llvm-project/pull/158391.diff

1 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/SIInstrInfo.cpp (+1-1)
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 0361868e2c1e8..70223da961e92 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -5590,7 +5590,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
       Data = nullptr;
 
     if (ST.hasGFX90AInsts()) {
-      if (Dst && Data &&
+      if (Dst && Data && !Dst->isTied() && !Data->isTied() &&
           (RI.isAGPR(MRI, Dst->getReg()) != RI.isAGPR(MRI, Data->getReg()))) {
         ErrInfo = "Invalid register class: "
                   "vdata and vdst should be both VGPR or AGPR";

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