AMDGPU: Relax verifier for agpr/vgpr loads and stores #158391
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Permit tied operands to be mismatched agpr or vgpr. The operands are tied so they will eventually resolve to the same subclass. I'm surprised the generic verifier doesn't enforce tied operands using identical classes. Fixes expensive_checks failures.
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@llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) ChangesPermit tied operands to be mismatched agpr or vgpr. The operands Fixes expensive_checks failures. Full diff: https://github.com/llvm/llvm-project/pull/158391.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 0361868e2c1e8..70223da961e92 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -5590,7 +5590,7 @@ bool SIInstrInfo::verifyInstruction(const MachineInstr &MI,
Data = nullptr;
if (ST.hasGFX90AInsts()) {
- if (Dst && Data &&
+ if (Dst && Data && !Dst->isTied() && !Data->isTied() &&
(RI.isAGPR(MRI, Dst->getReg()) != RI.isAGPR(MRI, Data->getReg()))) {
ErrInfo = "Invalid register class: "
"vdata and vdst should be both VGPR or AGPR";
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rampitec
approved these changes
Sep 13, 2025
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/163/builds/26396 Here is the relevant piece of the build log for the reference |
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Permit tied operands to be mismatched agpr or vgpr. The operands
are tied so they will eventually resolve to the same subclass. I'm
surprised the generic verifier doesn't enforce tied operands using
identical classes.
Fixes expensive_checks failures.