Isn't this already covered by #11869?

Isn't this already covered by #11869?

That is about esp32c6

This PR has subject esp32c2.

So c6 versus c2?

Nice one @sanderjo there's a bunch of new chips getting added to IDF these days!

It still needs testing but this commit on the top of my C6 branch is intended to make it easier to bring in new chips like this one if you want to take a look: #15862

@sanderjo I saw the ESP32C2 definition in mpconfigport.h in @andrewleech's branch so I thought it had basic C2 integration too, along with IDF 5.2 - my bad.

@TrekMax MICROPY_EMIT_RV32 being enabled should work on ESP32C2 too, it has the same RV32 core as C3 after all. Same for MICROPY_NLR_SETJMP being disabled.

Edit: forgot to mention that MICROPY_EMIT_RV32 used with MICROPY_NLR_SETJMP will crash native tests unless N_NLR_SETJMP is enabled in py/emitnrv32.c. So just follow C3's definitions set in ports/esp32/mpconfigport.h.

@agatti the latest changes on C6 (about to push) should enable the emitter on all risk chips based on the soc defines, rather than listing individual chips.

I suggest this PR would be well placed to rebase on top of the C6 work once it's merged as lots of people have contributed to that PR to help it fill gaps / support that will then naturally apply to many of the newer chips.

@andrewleech oh, that's nice to hear. Hopefully that would make support for the C5 easier to add once that chip shows up in production :)

Thanks @TrekMax for updating your PR! (Note for housekeeping: this is replacing earlier PR #15440).

Similar to discussions above, suggest we tackle in this order:

1. Merge esp32c6 support (IDF v5.2) #11869
2. Damien will do the upcoming 1.24 MicroPython release.
3. Merge ports/esp32: Use capability defines to configure features. #15862 - this should make adding future SoCs much simpler, but has some risk of bugs in other SoCs.
4. Rebase this branch, then review and merge ESP32-C2 support.

@TrekMax Let us know if we can help with any part of this process. It should be possible to update this PR with totally new commits without needing to close and open a new PR. There is a guide to doing this online at https://github.com/jimmo/git-and-micropython#README

@projectgus Thanks. I will wait for esp32c6 support (IDF v5.2) #11869 to be merged, then rebase this branch, and then review and commit ESP32-C2 support.

@projectgus Hey , the commit has been rebased to the latest master, please review it. Thanks!

Hi @TrekMax could you also take a look at this which is intended to make it much easier to bring in new chips: #15862

@andrewleech Of course. I have ESP32C3, ESP32C2 and ESP32S3 to verify it.

@TrekMax please can you rebase this PR on the latest master, because there have been a lot of changes to the esp32 port, in particular support for IDF v5.3.

@TrekMax Further to damien's request: now that #15862 is merged a lot of the C2 specific #ifdefs are probably not needed, so the PR will hopefully become very simple. 😁

@TrekMax Thanks for updating the PR in response to the review! It's looking pretty tidy.

There are a couple of unresolved questions above, do you know the answer to them?

@TrekMax Any updates on this PR?

Current status of this PR: it needs rebasing on latest master, and resolving the few questions above left by @projectgus .

miracle fix for the Wi-Fi & Bluetooth problems

Turns out this was possible! By tweaking various config settings it was possible to free up 40KB of static RAM (went from 60KB free static RAM to 100KB) and also reduce the runtime memory usage from Wi-Fi and TCP/IP. These tweaks are added in their own sdkconfig.free_ram file, as they're potentially useful for other chips as well.

With the free RAM increases implemented, tests pass:

• multi_net - passing [*][^]
• net_inet - passing
• multi_bluetooth - passing [*]
• unit tests - defaults, extmod_hardware & ports/esp32 - passing

[*] I had to tweak the run-multitests.py script for ESP32C2 as (like ESP8266) the ESP8684 prints its early boot log at 74880bps which is interpreted as line noise by the script and can trigger encoding errors. Will submit another PR for this.

[^] Except DTLS tests, it seems DTLS support has been disabled on ESP-IDF v5.4.2 (on all targets). Will investigate and submit a fix separately.

Codecov Report

✅ All modified and coverable lines are covered by tests.
✅ Project coverage is 98.38%. Comparing base (88cb6bc) to head (d4399b3).
⚠️ Report is 3 commits behind head on master.

@@           Coverage Diff           @@
##           master   #15906   +/-   ##
=======================================
  Coverage   98.38%   98.38%           
=======================================
  Files         171      171           
  Lines       22257    22257           
=======================================
  Hits        21898    21898           
  Misses        359      359           

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Thanks @projectgus for getting this working, and tweaking the RAM for WiFi/BLE. That's really good, and this PR is relatively simple.

Just a few minor comments above, but otherwise I think this is good to go in.

@dpgeorge Thanks for the detailed review, have updated!

With these RAM tweaks there's almost as much free RAM on the C2 as the original ESP32 (without SPIRAM) - 142KiB vs 125KiB:

Original:

>>> micropython.mem_info()
stack: 704 out of 15360
GC: total: 56000, used: 3200, free: 52800, max new split: 90112
 No. of 1-blocks: 59, 2-blocks: 10, max blk sz: 19, max free sz: 3287

C2:

>>> import micropython
>>> micropython.mem_info()
stack: 500 out of 15360
GC: total: 35968, used: 1232, free: 34736, max new split: 92160
 No. of 1-blocks: 22, 2-blocks: 7, max blk sz: 19, max free sz: 2158

@dpgeorge Updated!