NATIONAL UNIVERSITY of SINGAPORE
Department of Electrical and Computer Engineering
EE2005 Electronics
Homework Assignment #8 Solution
1.
10V
M3
10V
C3
M2
RB1
vout
100k
RREF
R2
C2
R1
v2
C1
M1 CS
VB=5V
v1
500A
10
RS
100
vs
Rin
Fig. 8-1
A multistage MOSFET amplifier is shown in the Fig. 8-1. You may assume that the body
and the source terminals of the NMOS and PMOS are connected together, i.e. no body effect
for NMOS and PMOS. You may also assume the following device parameters and all
NMOS and PMOS devices are identical:
Kn=2mA/V2, VTHN=1V, n=0.001V-1 , Cgd=0.5pF, Cgs=5pF
Kp=2mA/V2, |VTHP|=1V, p=0.001V-1, Cgd=0.5pF, Cgs=5pF
a) Design RREF so that the drain currents for M1, M2 and M3 are 500A. (3 marks)
I D ,1 = I D , 2 = I D ,3 = K n (VGS ,1 VTHN ) = K p VGS ,3 VTHP
2
= 500 A
VGS ,1 = VGS , 2 = VGS ,3 = 1.5V
RREF =
10 VGS ,3
500 A
= 17 k
b) Identify the two stage amplifier configuration and estimate the small signal
transconductance for transistors M1 and M2.
CG CS
g m , M 1 = g m , M 2 = 4 K n I D = 2mA / V
(3 marks)
c) Determine the two ports network parameters for the two stage amplifier, i.e. Rin1, Rout1,
Gm1 or Av1, Rin2, Rout2, Gm2 or Av2.
(6 marks)
M2
M2
RB1
vout
100k
Gm2
R2
vout
R2
Rin2
R1
v2
Rout2
Rout1
RB1//R1
RS
M1
v1
v2
M1
100
Gm1
vs
v1
RS
100
Rin1
CG Gm1 = g m , M 1 = 2 mA / V
Rin1 =
[Table
Rout 2 = R2 // ro , M 2
[Table
g m, M 1
Rout 1 = RB1 // R1 // ro , M 1 [1 + g m , M 1 RS ]
Rin 2 =
CS Gm 2 = g m , M 2 = 2 mA / V
ro , M 1 + RB1 // R1
ro , M 1
2 Configurat ion H ]
[Table
2 Configurat ion G ]
2 Configurat ion G with RE = 0]
d) Assume R1=R2, design R1 so that the overall gain (vout/vs) is -60.
Assume R1 = R2 << RB1 , ro , M 1 , ro , M 2 Rin1
vs
(3 marks)
1
g m, M 1
vout v1 v2 vout
Rin1
=
=
g m , M 1 (Rout 1 // Rin 2 ) ( g m , M 2 )(Rout 2 )
vs
vs v1 v2
Rin1 + RS
Rin1
g m , M 1 (R1 ) ( g m , M 2 )(R2 ) = 60
Rin1 + RS
R1 = R2 = 4.24 k << RB1 , ro , M 1 , ro , M 2 Assumption valid
e) Create a SPICE netlist and verify your gain result in part (d). You may assume
C1=C2=C3=100F in your simulation.
(5 marks)
*AC simulation for Question 1
VDD VDD
0
10V
VB VB
0
5V
VS VS
0
AC 1
RS VS
VS1 100
CS VS1
V1 10U
M1 V2
VB V1 V1 MODN
M2 VOUT
VG2 VDD VDD MODP
M3 VG3
VG3 VDD VDD MODP
RREF
VG3 0
17K
C3 VG3
VDD 100U
RB1 VG3
VG2 100K
C1 V2
VG2 100U
R1 V2
VC2 4.47K
R2 VC2
VOUT
4.47K
C2 VC2
0
100U
IB
V1
0
500U
.MODEL MODN NMOS LEVEL=1 W=2043u l=10.6u vto=1 tox=100n lambda=0.001 cgdo=245p
.MODEL MODP PMOS LEVEL=1 w=2043u l=10.6u vto=-1 tox=100n lambda=0.001 cgdo=245p
.OP
.AC DEC 10 10 10Meg
.PROBE
.END
2.
10V
10V
RA1
Rin
100
vs
Rout
8k
Q1
20k
C1
RS
10V
RD
C2
10
M2
40k
M1
10 R
A3
40k
C4
RA2
10V
10V
RREF1
C3
10
vout
RL
1k
RREF2
10
M3
M3A
M4A M4
Fig. 8-2
A multistage amplifier using MOSFET and BJT is shown in the figure above. You may
assume that the body and the source terminal of the NMOS are connected together, i.e. no
body effect for NMOS. You may assume the following BJT and NMOS parameters:
IS=10-15A, =100, VA=100V
Kn=2mA/V2, VTHN=1V, n=0.01V-1
f)
Design RREF so that the drain current for M3 and M4 is 500A each.
(3 marks)
I D ,M 3 A = I D , M 4 A = K n (VGS , M 3 A VTHN ) = 500 A VGS , M 3 A = VGS , M 4 A = 1.5V
2
I D ,M 3 A = I D , RREF 1 =
VDD VGS , M 3 A
RREF 1
= 500A RREF 1 = RREF 2 = 17k
g) Estimate Rin and Rout of the multistage amplifier.
(3 marks)
g m ,M 1 = g m ,M 2 = 4 KI D ,M 1 = 2mA / V
g m ,Q1 =
IC
= 20m
VT
ro ,Q1 =
Rin = R A 2 // R A3 = 20k
ro,M 1 = ro,M 2 = ro,M 3 = ro,M 4 =
1
= 200k
n I D , M 1
VA
= 200k
IC
R
1
Rout = D +
// r
130
o ,M 4
+1 g
m ,Q1
h) Assume that all transistors are operating in the saturation region. Estimate the AC small
signal gain (vout/vs).
(4 marks)
AV =
(1)(2m )(8k // 105k )
i)
g m ,Q1 RL
Rin
1
( g m , M 1 )
g m , M 2 {RD // r ,Q1 (1 + g m ,Q1 RL ) }
Rin + RS
g m,M 2
1 + g m ,Q1 RL
20
= 14.16(23dB )
21
The above circuit actually suffers from one problem and does not function properly as a
multistage amplifier. Describe what the problem is.
(3 marks)
80 k
10V = 8V
VGS , M 2 = 1.5V V S , M 2 = 6.5V
100 k
= 10 I D , M 2 R D = 6V < V S .M 2 Amplifier not functionin g because M 2 is off
VG , M 2 =
V D ,M 2
j)
You can solve the above problem by simply changing the value of one of the components
without affecting your calculation in part (a)-(c).
Please state the component and its
corresponding value.
(3 marks)
V DS , M 2 > V DSSAT , M 2 = VGS , M 2 VTHN = 0.5V V S , M 2 < V D , M 2 0.5V = 5.5V
Choose V S , M 2 = 4.5V VG , M 2 = V S , M 2 + VGS , M 2 = 6V
VG , M 2 =
80 k
10V = 6V R A1 = 53 .3k
80 k + R A1
Change component R A1 and new value should be 53 .3k
k) Create a SPICE netlist for the above circuit and verify your gain result after you have
solved the problem in (d).
(4 marks)
*AC simulation for exam question 3
Vs
A
0
AC
1
Rs
A
B
100
C2
B
C
10u
RA1
E
D
53.3k
RA2
D
C
40k
RA3
C
0
40k
C1
D
0
10u
RD
E
F
8k
M2
F
D
G
G
MODN
M1
G
C
H
H
MODN
C3
H
0
10u
Q1
E
F
I
NPNMODEL
RREF1
E
J
17k
RREF2
E
K
17k
M3
H
J
0
0
MODN
M3A
J
J
0
0
MODN
M4
I
K
0
0
MODN
M4A
K
K
0
0
MODN
C4
I
L
10u
RL
L
0
1k
VDD
E
0
10
.MODEL NPNModel NPN IS=1E-15 BF=100 VAF=100
.MODEL MODN NMOS LEVEL=1 KP=4m LAMBDA=0.01 VTO=1
.AC DEC 10 10 10Meg
.PROBE
.END
3.
10V
RS
vs,rms
0.5mV
10V
RC
RREF
100
1.4k
RB2
RB1
vout
Q1
Q2
20k
20k
Rx
An input source and a common emitter amplifier are shown above. You may assume the
following BJT:
IS=10-15A, =100, VA=100V
(a) Design RREF so that the biasing current for Q1 is 500A. (2%)
(b) Estimate value of Rx. (2%)
(c) Estimate the small signal AC gain, vout/vs. (2%)
(a) I C ,Q 2 I RREF = 500A I B ,Q 2 = 5A
RREF =
VDD VBE ,Q1 I B ,Q 2 RB 2
I RREF
(b) g m,Q 2 = 20m
= 18.4k
R
1
RX = RB1 + B 2 +
// RREF 20.248k
+1 g
m ,Q 2
RB2
RB2
RB2
Ry
20k
(c )
Ry
20k
vout
= g m ,Q1 (RC // ro ,Q1 ) 28
vs
Ry
20k
Table 1
Configuration F
4. Consider the amplifier shown in Fig. 8-4. The MOSFET has K=100A/V2, VTH=0.5V, =0
and no body effect, whereas the BJT has =288 and VA=100.
a) Design RREF so that the biasing current for M1 is 500A.
b) Find the biasing of Q1.
c) Identify the two-stage amplifier and find their corresponding two-ports network
parameters.
d) Find the overall gain AV=vout/vs.
5V
5V
RREF
RD1
Cout
2.3k
47F
vout
RB1
M2
Q1
2V
M1
10k
RC
RL
100k
10k
-5V
RS
vs
Cin
100 47F
Fig. 8-4
(a) I D ,M 1 I D ,M 2 = 500A = K n (VGS ,M 2 VTHN )
VGS ,M 2 = 2.736 RREF =
5 2.736
= 4.5k
500
5 2.7
= 1m I C ,Q1 500
2.3k
(c) CS CB
(b) I RD1 =
g m ,M 1 = g m,M 2 = 4 KI D ,M 1 = 447 g m ,Q1 = 20m
Gm1 = g m,M 1 = 447 Rin1 = RB1 +
Rin 2 =
1
g m,Q1
ro ,M 1 = ro ,Q1 = 200k r ,Q1 = 14.4k
1
// RREF = 11.5k
g m ,M 2
Rout1 = RD1 // ro ,M 1 = 2.3k Gm 2 = g m ,Q1 = 20m
ro ,Q1 + RC // RL
1
= 50 Rout 2 = RC //{ro ,Q1 1 + g m,Q1 (RD1 // r ,Q1 ) } 10k
RC // RL g m ,Q1
ro,Q1 +
Rin1
(d ) AV =
( g m,M 1 )(Rout1 // Rin 2 ) g m ,Q 2 (Rout 2 // RL )
Rin1 + RS
=4
5. Consider the amplifiers shown in Fig. 8-5(a) and (b). (a) Find the small-signal midband AC
voltage gain vo/vs of Fig. 8-5(a). (b) Find the small-signal midband AC voltage gain vo/vs of Fig.
8-5(b). (c) Explain whether Fig. 8-5(b) suffers from body effect.
10V
RD
R1
RS
Cout
vo
Cin
RL
R2
vs
Fig. 8-5(a)
10V
RD
R1
RS
Cout
vo
Cin
RL
vs
R2
CE
Fig. 8-5(b)
(a )
( g m )(RD // RL )
vo
R1 // R2
=
=0
v s RS + (R1 // R2 ) 1 + g m ( )
(b)
vo
R1 // R2
( g m )(RD // RL )
=
v s RS + (R1 // R2 )
(c) For small signal AC analysis, Fig. 8-5(b) doesnt have body transconductance and thus
doesnt suffer from body effect. For DC analysis, due to the difference of source and body
voltage, the threshold voltage will change.
