Virtual Memory: Princeton University, Princeton, New Jersey
Virtual Memory: Princeton University, Princeton, New Jersey
PETER J. DENNING
Princeton University,* Princeton,
\
New Jersey
The need for automatic storage allocation arises from desires for program
modularity, machine independence, and resource sharing. Virtual memory is an
elegant way of achieving these objectives. In a virtual memory, the addresses a
program may use to identify information are distinguished from the addresses the
memory system uses to identify physical storage sites, and program-generated
addresses are translated automatically to the corresponding machine addresses.
Two principal methods for implementing virtual memory, segmentation and
paging, are compared and contrasted. Many contemporary implementations have
experienced one or more of these problems: poor utilization of storage, thrashing,
and high costs associated with loading information into memory. These and
subsidiary problems are studied from a theoretic view, and are shown to be
controllable by a proper combination of hardware and memory management
policies.
Key words and phrases: virtual memory, one-level store, memory allocation,
storage allocation, dynamic storage allocation, segmentation, paging, replacement
algorithms, storage fragmentation, thrashing, working set
CR categories: 4.3, 6.2
tinguished. This distinction has been made which, by their very nature, demand dy-
to facilitate the eventual achievement of namic storage allocation.
three objectives. The major system reasons compelling
1. Machine independence. There is no a dynamic storage allocation result from cer-
priori correspondence between address tain objectives arising principally in multi-
space and memory space. programming and time-sharing systems: (1)
The philosophy behind machine inde- the ability to load a program into a space of
pendence is: It relieves the programmer arbitrary size; (2) the ability to run a
of the burden of resource management, partially loaded program; (3) the ability to
allowing him to devote his efforts fully to the vary the amount of space in use by a given
solution of his problem; it permits equip- program; (4) the ability to "relocate" a
ment changes in the computer system with- program, i.e. to place it in any available
out forcing reprogramming; and it permits part of memory or to move it around during
the same program to be run at different execution; (5) the ability to begin running a
installations. program within certain deadlines; and (6)
2. Program modularity. Programs may the ability to change system equipment
be constructed as collections of sepa- without having to reprogram or recompile.
rately compilable modules which are Program texts prepared under the static
not linked together to form a complete approach require that the (rather inflexible)
program until execution time. assumptions about memory availability, On
which they are predicated, be satisfied be-
The philosophy behind program modularity fore they can be run. Such texts are generally
is: It enables independent compilation, test- incompatible with these six objectives.
ing, and documentation of the components
of a program; it makes it easier for several Even within the dynamic storage alloca-
programmers to work independently on tion camp there was disagreement. One
parts of the same job; and it enables the group held that the-programmer, being best
modules constructed for one job to be used informed about his own algorithm's opera-
in another, i.e. building on the work of tion, should be in complete control of storage
others [D4, D5, D10, D l l , D12, D13, allocation. He would exercise this control
P2, R3, W4]. by calling on system routines which would
"allocate" and "deallocate" memory regions
3. List processing. Languages (e.g. LisP) on his behalf. This thinking is at least
having capability for handling problems partially responsible for the block struc-
involving structured data are in- ture and stack implementation of the
creasingly important. ALGOL programming language (1958) and
As we suggested earlier, these three pro- subsequently the ALgoL-oriented Burroughs
gramming objectives invalidate reliable pre- computers. It has also influenced the imple-
dictability, upon which static storage allo- mentation of list-processing languages [B8,
cation is predicated. The mechanisms that C4, K4].
implement machine independence cannot The other group in the dynamic storage
(by definition) establish a correspondence allocation camp advocated a very different
between addresses and locations until exe- approach: automatic storage allocation. Their
cution time, much too late for a programmer thinking was influenced by their belief
or a compiler to preplan memory use. Pro- that complicated programs beget storage
gram modularity makes it impossible for the allocation problems so complicated that
compiler of a module to know either what most programmers could not afford the time
modules will constitute the remainder of a to manage memory well, and most particu-
program or (even if it could know) what larly by their belief that multiprogram-
their resource requirements might be. List ming would soon be a concept of great
processing languages employ data struc- importance. Because the availability in
tures whose sizes vary during execution and main memory of particular parts of address
space may be unpredictable under multi- The foregoing discussion has summarized
programming, a programmer's ability to the ideas leading to the virtual memory
allocate and deallocate storage regions may concept. By distinguishing between ad-
be seriously impaired. Realizing that the dresses and locations, and automating stor-
principal source of difficulty was the small age allocation, virtual memory facilitates
size of programmable main memory, this certain programming and system design
group advanced the concept of a o~e-level objectives especially important in multipro-
store. In 1961 a group at M I T [M5] pro- gramming and time-sharing computers. The
posed the construction of a computer having discussion in the remainder of this paper
several million words of main memory (an divides into two general areas: the mecha-
amount then considered vast) so that the riisms for effecting virtual memory, and the
storage allocation problem would vanish. policies for using the mechanisms. The prin-
Economic reasons prevented this from ac- cipal mechanisms are: segmentation, under
tually being realized. which the address space is organized into
In 1961 the group at Manchester, Eng- variable size "segments" of contiguous
land, published a proposal for a one-level addresses; and paging, under which the
store on the Atlas computer [F3, K3], a address space is organized into fixed size
proposal that has had profound influence "pages" of contiguous addresses. We shall
on computer System architecture. Their compare and contrast these two mecha-
idea, known now as virtual memory, gives nisms and show why systems using some
the programmer the illusion that he has a form of paging are predominant.
very large main memory at his disposal, Although it has some very important
even though the computer actually has a advantages, virtual memory has not been
relatively small main memory. At the heart without its problems. There are four of
of their idea is the notion that "address" particular interest. (1) Many programmers,
is a concept distinct from "physical loca- in their illusion that memory is unlimited,
tion." It becomes the responsibility of the are unduly addicted to the old idea that time
computer hardware and software auto- and space may be traded, in the sense
matically and propitiously to move infor- that a program's running time may be re-
mation into main memory when and only duced if there is more programmable
when it is required for processing, and to memory space available. But space in a
arrange that program-generated addresses virtual memory may be an illusion; un-
be directed to the memory locations that necessarily large and carelessly organized
happen to contain the information addressed. programs may generate excessive overhead
The problem of storage allocation (for ob- in the automatic storage allocation mecha-
jects represented in virtual memory) thus nism, inevitably detracting from tile effi-
vanishes completely from the programmer's ciency of program operation. Nonetheless,
purview and appears in that of the com- as programmers and language designers
puter system. By basing memory use on gain experience with virtual memory, this
system-observed actual use of space, rather problem should disappear. (2) Many paged
than (poor) programmer estimates of space, systems suffer severe loss of usable storage--
virtual memory is potentially more efficient "fragmentation"--because storage requests
that preplanned memory allocation, for it must be rounded up to the nearest integral
is a form of adaptive system. number of pages. (3) Many time-sharing
By the mid-1960s the ideas of virtual systems using "pure demand paging" (a
memory had gained widespread acceptance, policy under which a page is loaded into
and had been applied to the internal design main memory only after an attempted
of many large processors--IBM 360/85 and reference to it finds it missing) experience
195, CDC 7600, Burroughs B6500 and later severe costs as a program's working pages
series, and GE 645, to name a few. The are loaded singly on demand at the start
fact of its acceptance testifies to its general- of each time quantum of execution. (4)
ity and elegance. Many systems have shown extreme sensi-
by sound strategies.
The reader should note that these four
observed inadequacies of many contem-
porary systems result not from ill-conceived Fie,. 1. Basic system hardware
mechanisms, but from ill-conceived policies.
These difficulties have been so publicized
that an unsuspecting newcomer may be also from waiting for rotating or movable
led erroneously to the conclusion that vir- devices to be positioned ("latency time").
tual memory is folly. Quite the contrary; We take the average transport time to be T.
virtual memory is destined to occupy a Since main memories are ordinarily elec-
place of importance in computing for many tronically accessed and auxiliary memories
years to come. mechanically accessed, ,5 is typically 1
~sec and T is typically at least 10 msec.
Thus speed ratios (T/h) in the order of 104
or more are not uncommon.
BASIC SYSTEM HARDWARE
Main memory m a y be regarded as a
As our basic computer system, we take that linear array of "locations," each serving
shown in Figure 1. The memory system as a storage site for an information item.
consists of two levels, main memory and Each location is identified by a unique
auxiliary memory. One or more processors "memory address." If the memory contains
have direct access to main memory, but not m locations, the addresses are the integers
to auxiliary memory; therefore information 0, 1, . - . , m - 1. If a i s an address, the
may be processed only when in main mem- item stored in location a is called the "con-
ory, and information not being processed tents of a,'; and is denoted c(a). Under
may reside in auxiliary memory. From now program control, a processor generates a
on, the term " m e m o r y " specifically means sequence of "references" to memory loca-
"main memory." tions, each consisting of an address and a
There are two time parameters of interest command to " f e t c h " from or " s t o r e " into
here. The first, known as "memory reference the designated location.
time," is measured between the moments
at which references to items in memory are
DEFINITION OF VIRTUAL MEMORY
initiated b y a processor; it is composed of
delays resulting from memory cycle time, As mentioned earlier, virtual memory may
from instruction execution time, from "in- be used to give the programmer the illu-
terference" b y other processors attempting sion that memory is much larger t h a n in
to reference the same memory module reality. To do this, it is necessary to allow
simultaneously, and possibly also from the programmer t~ use a set-of addresses
switching processors among programs. We different from that provided by the memory
take the average memory reference time to be and to provide a mechanism for translating
,5. The second time parameter, known as program-generated addresses into the cor-
"transport time," is the time required to rect memory location addresses. An address
complete a transaction that moves infor- used by the programmer is called a " n a m e "
mation between the two levels of memory; or a "virtual address," and the set of such
it consists of delays resulting from waiting names is called the address space, or name
in queues, from waiting for the requested space. An address used b~,: the memory is
information transfer to finish, and possibly called a "location" or " m e m o r y address,"
iI
mapping f, the programmer may be given
the illusion t h a t items consecutive in N are
4 stored consecutively in M, even though the
items m a y in fact be stored in arbitrary
order. This property of address maps is
known as "artificial contiguity" [R3].
m-!
The mapping device, when presented with
M0f~Y SPACE
7 name a, will generate a p = f(a) if item a is
ADDRESS SPACE present in M, and a missing-item fault
FiG. 2. Mapping from name to memory space otherwise. The fault will interrupt the
processing of the program until the missing
item can be secured from auxiliary memory
and the set of such locations is called the and placed in M at some location a' (which
memory space. F o r future reference we takes one transport time); the address map
denote the address space by N -- {0, 1, f is then redefined so that f(a) = a', and
• .., n- 1} and the memory space b y the reference may be completed. If M is full,
M = {0, 1, . - . , m - 1} and we assume some item will have to be removed to make
n > m unless we say otherwise. way for the item entering, the particular
Since the address space is regarded as a item being chosen at the discretion of the
collection of potentially usable names for replacement rule (if item b is entering and the
information items, there is no requirement replacement rule chooses the replace item a,
that every virtual address "represent" or where a p -- f(a), then the address map is
" c o n t a i n " any information. redefined so t h a t f(b) becomes a' and
The price to be paid for there being no a f(a) becomes ¢). Contrasted with the re-
priori correspondence between virtual ad- placement rule, which decides which items
dresses and memory locations is increa,sed to remove, are the fetch rule, which decides
complexity in the addressing mechanism. when an item is to be loaded, and the
We must incorporate a way of associating placement rule, w h i c h decides where to
names with locations during execution. place an item. If no action is taken to load
T o this end we define, for each moment of an item into M until a fault for it occurs,
time, a function f : N - + M U {4~} such t h a t the fetch rule is known as a demand rule;
otherwise, if action is taken to load an item
' if item a is in M at location a', before it is referenced, the fetch rule is
f(a) = if item a is missing from M.
known as a nondemand or anticipatory rule.
This function f is known as the address map,
or the address-translation function. ADDRESS TRANSLATION MECHANISM
-r 1
For reasons given earlier, it is to our I MAP TABLE f I
advantage to make n much larger than m,
'
but this is not necessary. Even if n _~ m, O'
virtual storage could help with the relocation
problem [Dll], i.e. t h a t of moving informa- P t AOORESS } MEMORY
tion around in memory. I
Figure 2 gives an example of a mapping
f, where a line (a, a') for a in N and a' OPERATION:
in M indicates that item a is stored in loca- a loaded into VA
tion a', and the absence of a line indicates if ath entry of j blank, missing-item fault
t h a t item a is not present in M. Figure 3 a' loaded into MA
shows how a hardware device implementing FIG. 3. Implementation of address map
T/a between main and auxiliary memory is for a wide range of s, including s much less
small; but is it competitive when T/h is than So. In other words, a given program is
large (say, 104 or greater)? Sayre reports compatible with many memory sizes under
affirmatively. automatic folding, but only one under
Brawn and Gusta~vson, Sayre tells us, manual.
considered a number of programs represent- As we shall see in the section on Program
ing a wide range of possible behaviors, and Behavior and Memory Management, virtual
the following experiment in a memory sys- memory management mechanisms perform
tem with T/& in excess o f 104. For a given most efficiently when programs exhibit good
program, let Ta(so) denote the total running locality, i.e. they tend to concentrate their
time (execution and transport time) when references in small regions of address space.
N is folded automatically into a memory We shall define a measure of locality, the
of size So, when a demand fetch rule and a working set of information, which will be
good replacement rule are in effect. Let the smallest set of virtual addresses that
Tm(so) denote the total running time when must be assigned to memory locations so
N is folded manually for a memory of size that the program may operate efficiently.
so. For the programs considered, Sayre reports that the running time under
automatic folding, Ta(s0), can be very
0.8 < T~(so)/T~(so) < 1.7, sensitive to programmers' having paid at-
(i)
W[Ta(so)/Tm(so)] = 1.21, tention to endowing the programs with
small working sets, and relation (i) depends
where E[ ] denotes expected value. In on this having been done. Should program-
other words, automatic folding was (on the mers not pay attention to this, very large
average) no more than 21 percent less Ta(so)/Tm(so) can occur. Sayre reports that
efficient than manual folding. the costs of producing good manually :folded
Now, let Ks(so) denote the number of text appear to exceed by 25 to 45 percent
transports issued while the program ran the costs for producing nonfolded text with
under the automatic folding conditions, and good locality. Thus, one can tolerate as
Kin(so) denote the number of transports much as 25 percent inefficiency in the auto-
under the manual folding conditions. For matic folding mechanism before virtual
the programs considered, memory begins to be less efficient than
0.6 < K~(so)/K,,(So) < 1.05, manual folding. Relations (i) indicates this
generally is the case.
E[K~(so)/Km(so)] = 0.94. On the basis of the experimental evidence,
Thus the automatic folder (i.e. the virtual therefore, we may conclude that the best
memory) generally produced fewer moves automatic folding mechanisms compete very
than the manuM folder (i.e. the program- well (and may indeed outperform) the best
mer). A similar result was observed by the manually folded texts. Virtual memory is
Atlas designers for a more restricted class of thus empirically justifiable.
programs [K3]. The advantage of manual
folding is that, unlike virtual memory with a
demand fetch rule, processing may be over- IMPLEMENTATION OF VIRTUAL MEMORY
lapped with transports This suggests that The table implementation for the address
anticipatory fetch rules might result in mapping f described in the section on Defi-
ratios Ta(so)/T,~(so) consistently less than nition of Virtual Memory is impractical,
one [P1]. because it would require a second memory
The experiments show also that the auto- of size m to store the mapping table. In the
matic folder is robust, i.e. it continues to following sections we shall examine t h r e e
give good performance for memory sizes methods that result in a considerable re-
well below the intended So. Specifically, duction in the amount of mapping informa-
T~(s)/Tm(so) was found essentially constant tion that must be stored. Each method
groups information into blocks, a block machine independence and list processing,
being a set of contiguous addresses in ad- are not peculiar to virtual memory systems.
dress space. The entries in the mapping They were fought for in physical storage
table will refer now to blocks, which are far during the late 1950s [W5]. 'Dynamic storage
less numerous than individual addresses in allocation, linking and relocatable loaders
address space. The first method--segmenta- [M3], relocation and base registers [Dll],
tion-organizes address space into blocks and now virtual memory, ~ll result from the
("segments") of arbitrary size. The second fight's having been won.
method--paging--organizes memory space The segmented address space achieves these
into blocks ("pages") of fixed size. The third objectives. Address space is regarded as a
method combines both segmentation and collection of named segments, each being a
paging. linear array of addresses. In a segmented
Both segments and pages have names, address space, the programmer references
which can be used to loeate entries in the an information item by a two-component
map tables. Segment names are usually (but address (s, w), in which s is a segment name
not always) assigned by the programmer and and w a word name within s. (For example,
are interpreted by the software, and page the address (3, 5) refers to the 5th word in
names are usually assigned by the system in the 3rd segment.) We shall discuss shortly
and interpreted by the hardware. Segmenta- how the address map must be constructed
tion and paging, when combined, form an to implement this.
addressing system incorporating both levels
By allocating each program module to its
of names. Otherwise, the only essential
own segment, a module's name and internal
difference between the two schemes is
addresses are unaffected by changes in other
paging's fixed block size.
modules; thus the first two objectives may
Segmentation be satisfied. By associating with each seg-
Programmers normally require the ability ment certain access privileges (e.g. read,
to group their information into content- write, or instruction-fetch), protection may
related or function-related blocks, and the be enforced. By enabling the same segment
ability to refer to these blocks by name. to be known in different address spaces under
Modern computer systems have four objec- different names, the fourth objective may be
tives, each of which forces the system to satisfied.
provide the programmer with means of Figure 4 shows the essentials of an ad-
handling the named blocks of his address dress translation mechanism that imple-
space: ments segmentation. The memory is a
• Program modularity. Each program linear array of locations, and each segment
module constitutes a named block which is is loaded in entirety into a contiguous
subject to recompilation and change at any region of memory. The address a at which
time. segment s begins is its base address, and the
number b of locations occupied by s is its
• Varying data structures. The size of
limit, or bound. Each entry in the segment
certain data structures (e.g. stacks) may
table is called a descriptor; the sth descriptor
vary during use, and it may be necessary to
contains the base-limit information (a, b)
assign each such structure to its own, varia-
for segment s if s is present in memory, and
ble size block.
is blank otherwise. The steps performed in
• Protection. Program modules must be forming a location address a' from a name
protected against unauthorized access. space address (s, w) are shown in Figure 4.
• Sharing. Programmer A may wish to Note that a missing-segment fault occurs
borrow module S from programmer B, even if s it not present in memory, interrupting
though S occupies addresses which A has program execution until s is placed in
already reserved for other purposes. memory; and an overflow fault occurs if w
These four objectives, together with falls outside the allowable limit of s. Pro-
"1
In this case, each program-generated
access would incur two memory-references,
tl.'
one to the segment table, and the other to
the segment being referenced; segmentation
SEGMENT llA7 LIMIT
would thus cause the program to run as slow
MEMORY
AOORESS as half speed, a high price to pay. A common
WORD solution to this problem incorporates a
small high speed associative memory into
the address translation hardware. Each
associative register contains an entry (8, a, b)
OPERATION: and only the most recently used such entries
(s, w) loaded into segment and word registers are retained there. If the associative memory
if sth entry of ST blank, missing-segment fault contains (s, a, b) at the moment (s, w) is to
if w > b, overflow fault be referenced, the information (a, b) is
(a + w) loaded into MA immediately available for generating the
Fro. 4. Address translation for segmentation location address a'; otherwise the additional
reference to the segment table is required.
I t has been found that 8 to 16 associative
teetion bits (the darkened region in the registers are sufficient to cause programs
table entry of Figure 4) can be checked to run at very nearly full speed [$4]. (The
against the type of access being attempted exact number depends of course on which
(i.e. read, write, or instruction-fetch) and a machine is under consideration.)
protection fault generated if a violation is Historically, the four objectives discussed
detected. at the beginning of this section haw~ been
The segment table can be stored in main provided by "file systems," which permit
memory instead of being a component of programmers to manipulate named "files"
the address translation mechanism. Figure 5 and to control decisions that move them
shows the operation of the mapping mecha- between main and auxiliary memory. In
nism when the segment table is in memory principle, there is no need for the pro-
starting at location A. The segment table grammer to use a file system in a virtual
is itself a segment, known as the descriptor memory computer, since auxiliary memory
segment, and the segment table base register is presumably hidden from him and all his
information m a y be permanently represented
in his address space. In practice, most
SEGMENT MEMORY contemporary "virtual memory systems"
--~ AOORESS
provide both a virtual memory and a file
SEGMENT
system, together with "file processing primi-
WORD BASE IdI~MOI~Y tives" that operate outside the virtual
REGISTER.
memory. In these systems, a "segment" is a
OPERATION : "file" that has been moved from auxiliary
(s, w) loaded into segment and word registers memory into address space. Multics is the
(A + s) loaded into M A only documented exception to this [B7].
c(A + s) fetched into MR Among the earliest proposals for segmen-
if MR blank, missing-segment fault
a := base field of MR • tation, though without the use of an address
b := limit field of MR space, was Holt's [H2]. Addressing schemes
if w > b, overflow fault very similar to that given in Figure 4 were
(a + w) loaded into MA first implemented on the Rice University
Fro. 5. Segmentation with mapping table in mem- Computer [I1, I2] and on the Burroughs
ory B5000 computer [B10, M1]. This idea was
I " MEMORY
ADORE:S$
describes segment s and b is the limit for
segment s. The word address w is converted
WORD to a pair (p, wt) as in paging, and p is used
to index page table A to find the frame
OPERATION : address pl containing page p. As before,
(s, w) loaded into segment and word registers protection bits may be included in the seg-
if sth entry of ST blank, missing-segmentfault ment table entry. As before, the segment and
if w > b, overflowfault page tables may be stored in memory, the
p := [w/z] addressing mechanism being appropriately
w' := R~(w)
if pth entry of PTA blank, missing-page fault modified. As before, associative memory may
(p " + w') loaded into MA be used to speed up address formation;
indeed, the associative memory is essential
FIo. 7. Address translation for segmentation and here, since each program-generated mem-
paging
ory reference address incurs two table
references, and the program could run at one-
devote most of the later sections of this paper third speed without the associative memory.
to it. (If the processor has a sufficiently rich
repertoire of register*to-register operations,
Segmentation and Paging speed degradation would not be as bad as
Because paging by itself does not alter the one-third.)
linearity of address space, it does not achieve We mentioned earlier that segmentation
the objectives that motivate segmentation. and paging combined serve to achieve the
Because segmentation by itself requires that objective of sharing or borrowing programs
contiguous regions of various sizes be found (see the section on Segmentation .above).
in m e m o r y to store segments, it does not Programmer X, who owns segment s, may
result in the simple uniform treatment of allow programmer Y to borrow s, and Y may
main memory afforded by paging. To under- choose to call s by another name s'. Then
stand what is meant by "uniform treatment" programmer X's segment table will contain
of memory, compare the problem of loading (A, b) at entry s, and programmer Y's
new segment into memory with that of segment table will contain (A, b) at e,ntry s',
loading a new page into memory. Loading a where A designates a single (shared) page
segment requires finding an unallocated table describing the segment in question.
region large enough to contain the new The details of implementation, as well as a
segment, whereas loading a page requires description of advantages and difficulties of
finding an unallocated page frame. The sharing segments, are adequately described
latter problem is much less difficult than in [A5, B7].
the former: whereas every unallocated page
frame is exactly the right size, not every Most addressing mechanisms use a single
unallocated region may be large enough, register to implement the segment and word
even though the sum of several such regions registers shown separately in Figure 7. Typi-
may well be enough. (The question of find- cally the leftmost q bits of this register con-
ing or creating unallocated regions will be tMn the segment name, and the rightmost r
considered later.) bits contain the word name; thus there may
It is possible to combine segmentation be as many as 2q segments and 2 ~ words
and paging into one implementation, thereby per segment. In these implementations the
accruing the advantages of both. Figure 7 r word-bits serve as the program counter
shows the essentials of such an addressing (PC). Now suppose the program attempts to
mechanism. Each segment, being a small increment the program counter (i.e. PC : =
first is the "fifty percent rule" (due to Knuth might seem, for simulation experiments
[K4]), which states that the average number [K4] show that there is a large variance in
of holes is half the average number of seg- hole sizes, and it is often possible to make f
ments. The other is the "unused memory as small as 10 percent (i.e. k approximately
rule," which establishes a relation between ¼). Even so, it is not possible to reduce f to
the difficulty of placing a segment and the zero.
amount of unused memory. Of the many placement algorithms having
FIFTY PERCENT RVL~ [K4]. Suppose the the properties described above, there are two
memory system described above is in equilib- of special interest. The first is appealing
rium, having an average of n segments and h because it makes best use of holes, and the
holes, where n and h are large. Then h is second is appealing because it is simple to
approximately n /2. implement. Assume there are h holes of sizes
To establish this, we find the probability p xl, x2, • •., xh, and an insertion request of
that an arbitrarily chosen segment has a hole size s arrives.
as right neighbor ("right" has meaning 1. Best fit. The hole table lists holes in
according to Figure 8). Over a segment's order of increasing size (i.e. xl ~_ x2 _< . . .
lifetime in memory, half the transactions _< xh). Find the smallest i such that s _< xi.
applying to the memory region on its im- 2. First fit. The hole table lists holes in
mediate right are insertions, half are dele- order of increasing initial address. Find the
tions; thus p = ½. Therefore, the number of smallest i such that s < xl. (After a long
segments with holes as right neighbors is time, small holes would tend to accumulate
np = n/2, i.e. the number of holes is ap- at the head of the hole list, thereby increas-
proximately n/2. ing the search time. To prevent this, the
UNUSED MEMORY RULE. Suppose the hole table is implemented as a circular list
memory system described above is in equilib- with a "start pointer"; each search advances
rium, and let f be the fraction of memory the pointer and begins searching with the
occupied by holes. Suppose further that the designated hole.)
average segment size is So and that the average Knuth [K4] reports detailed simulation
hole size is at least kSo for some k > O. Then experiments on these and other placement
f >_ k / ( k + 2). policies. He finds that the first-fit algorithm
To establish this result for an m-word is the most efficient of a large class of al-
memory we note that, by the fifty percent gorithms, including the best-fit. He finds also
rule, there are n / 2 holes in memory; since that the memory size must be at least ten
each segment occupies an average space of times the average segment size for efficient
size so, the amount of space occupied by operation. Similar conclusions are also
holes is m -- nso, and the average space per reported by Collins [C6].
hole (hole size) is x = (m -- nso)/h = Knuth reports also on another algorithm
2(m - nso)/n. But we assume x ~ ks0, which he found slightly better than first-fit
which implies but which, being not in the class of placement
(him)so < 2/(k + 2). policies described above, does not follow the
fifty percent rule and the unused memory
Then rule. This policy is called the "buddy sys-
f = ( m - - n s o ) / m = 1 - (n/m)so tem." Its dynamic properties have not yet
been completely deduced [K4].
_> ~ - 2 / ( k + 2) = k / ( k + 2).
3. Buddy system. Assume that the re-
In other words, if we wish to limit place- quest size is s = 2 ~ for some i ~ ,~. This
ment algorithm overhead by maintaining policy maintains k hole-lists, one for each
large holes, we must be prepared to " p a y " size hole, 21, 2~, . . . , 2k. A hole may be re-
for this limitation by "wasting" a fraction f moved from the (i + 1)-list by splitting it in
of memory. This is not quite as serious as it half, thereby creating a pair of "buddies" of
; Z!
168 • Peter J. Denning
F Fragmentation
Our discussion in the previous section
unveiled a problem of some importance in
virtual memory systems; storage fragmenta-
o.e .-~,-, I tion, the inability to assign physical locations
to virtual addresses that contain informa-
tion.
(14
There are three major types of storage
fragmentation. The first is external frag-
O.4 mentation [R2], which occurs in nonpaged
memories when checkerboarding becomes so
pronounced that every hole is too small to
0.2 be used. (More precisely, external frag-
mentation occurs for segments of size s with
0 f
probability E(s), the probability that
o e.z 0.4 0.6 o.e Lo s > max{xl}, where {xi} are the hole sizes.
Fro. 10. Inefficiencyof compaction E(s) follows the curve suggested in :Figure
11.) The second is internal fragmentation
pacting, we must tolerate a significant waste [R2], which results in paged memories be-
of memory. Because of the relative slowness cause storage requests must be rounded up
of compaction compared to searching a well- to an integral number of pages, the last part
organized hole list, the former tends to be of the last page being wasted (Figure 12).
less efficient than the latter, and compaction (More precisely, if z is the page size and s a
is not often used. segment size, then s is assigned to k pages,
In summary, nonpaged memory requires where (k -- 1)z < s < kz; then kz - s
an "investment," i.e. a certain amount of words are wasted inside the last page.) The
unused memory and overhead in placement third is table fragmentation, which occurs in
policies, for efficient operation. Some sys- both paged and nonpaged memories because
tems, notably the Burroughs B5000 series physical locations are occupied by mapping
[R3] and certain CDC 6600 installations tables and are therefore unavailable for
[B1], have chosen to make this investment; assignment to virtual addresses.
but most have elected to use paged memory, Randell [R2] reports simulation experi-
which can be fully utilized by pages at all ments showing that fragmentation raay be
times. Many of the techniques discussed in serious, and that internal fragmentation is
this section have been used with great suc- more troublesome than external. His experi-
cess in applications of a less general purpose ments rely on three assumptions: (1) each
nature, particularly in list-processing sys- segment is entirely present or entirely
tems [BS, C4, K4]. missing from memory, (2) each segment
begins at a new page boundary, and (3)
£¢,)
segments are inserted or deleted one at a
time. Many systems violate (1), there being
some nonzero probability that a segment's
final page is missing. Many systems violate
(2) and (3) by providing facilities theft allow
I ~ I 2 k
L I-l ao
v!
over and above those gained by minimizing is an aspect of paged memory that makes
fragmentation. Nonpaged memory systems its implementation more elegant and much
(or paged systems with large page sizes) "cleaner" than implementations of non-
cannot enjoy this benefit. paged memory: its "uniform" treatment of
fnemory. Whereas paging regards main
COMPARISON OF PAGED AND NONPAGED memory simply as a pool of anonymous
MEMORIES blocks of storage, segmentation regards it
as a patchwork of segments and holes of
As we have discussed, the various imple- various sizes. The same statement holds
mentations of virtual memory fall into two for auxiliary memory. Therefore (fixed
classes: paged and nonpaged. We have length) page transports are much simpler
discussed a great number of facts pertaining to manage than (variable length) segment
to each. Table I summarizes these facts and transports. The difficulty of transporting
compares the two methods. variable length segments is compounded
According to Table I, paging is superior b y overhead in watching out for the specific
to nonpaging in all respects save suscepti- segment length in order not to overrun
bility to internal fragmentation; hut internal buffers. I t is no surprise that some form
fragmentation can be controlled by proper of paging is used in almost all virtual mem-
choice of page size. Not listed in the table ories.
pose a page request arrives when the drum Let Cd(A) denote the space-time cost
load is L. The time each system delays this of loading a working set into memory under
request is demand paging from auxiliary memory A,
Tp = t~(L/s + (s + 2)/2s), and Ca(A) the cost of loading a working set
L~O. into memory under swapping from auxiliary
T~ = t,(L + 1)(s -4- 2)/2s, memory A. We shall establish f()ur asser-
The incoming request will be known as tions:
the "tagged" request. In System P, the • Under demand paging, the paging drum
tagged request enters a sector queue whose costs significantly less than the FCFS drum
expected length is L' = L/s. Before com- (i.e. Cd(F) -- Cd(P) is large).
pleting service the tagged request experi- • With nonmoving auxiliary storage
ences the following additive delays: L/2 for (e.g. A is LCS or ECS), demand paging never
the drum to begin serving the first request costs more than swapping (i.e. Ca(A) _<
in the queue; L't, for the drum to begin Cs(A)).
serving the tagged request; and t~/s for its • The combined swapping and demand
own transmission. Thus T~ = t~(L' -4- paging strategy is at best of questionable
½ + 1/s). In System F, the tagged request value when compared to "pure" demand
joins the single queue with L requests ahead paging with a paging drum.
of it. There are now L + 1 requests in the
• Unless predictions can be made with
queue, each requiring time t r(~1 + 1/S) to
little error, prepaging, even from a paging
complete.
drum, may not be advantageous.
From these two results we see that, under
These assertions are considered in the
normal drum loads (L > 0), ee > e~ and
following paragraphs. Assume that a working
T~ < TF, with the greatest differences
set of size w is to be loaded, that a single
occurring at heavy loads. For these reasons,
transport operation requires processor time
paging systems using FCFS drums may
to, and that the drum has revolution time
experience severe loss of efficiency.
tr and s sectors.
Cost The cost Cd(A) is determined as follows.
To evaluate the "cost" of demand paging, Suppose k - 1 of the w pages have already
two concepts are useful: "space-time prod- been loaded and a fault for the kth page
uct" and "working set." Suppose a program occurs; we must reserve one more page of
occupies re(t) pages of memory at time t; memory and stop the program for the kth
the space-time product of memory usage transport time Tk. Since there is no correla-
across an interval (t~, t2) is defined to be tion between the order of page calls and
their order of storage on the drum, Tk = T
C(t~,h) = re(t) dt. for 1 < k <: w. Thus
1
:i
176 • Peter J. Denning
The cost Ca(A) is determined as follows. is necessary for Ca(F) < Cd(P). For the
We reserve w pages of memory, then trans- normally heavy drum loads (L large) found
port the entire working set as a unit in a in paging systems, w0 _--~ s q- 1 is slightly
transport time T t. Thus more than a full drum circumference.. If we
repeat the analysis to include the cost of
Ca(A) = wT'. (ii)
swapping w pages out again at time quantum
If A is ECS with access time t~ (see the end, we find w0 ~ 2s; for typical drums 2s
section on Page Size above) and page trans- is approximately 8000 words, a substantial
mission time t t , then working set. To sum up: as the drum load
varies from the former extreme to the latter,
T = t0+ t~ + t~, the system enters and exits states unfavor-
T' = to + t~ "b w t t . able to swapping; even in favorable states,
swapping is cheaper only when working
Substituting these vMues into (i) and (ii) sets of substantial size are moved. Our
respectively, we find analysis does not account for two other
C~(A) - Cd(A) factors: it may be expensive to find or main-
tain a supply of contiguous sectors into
= (w(w - 1)/2)(tt - to - t,). which working sets may be swapped, and
This expression is positive if tt ~_ to -q- t~, it may be expensive to implement both a
which normally is the case. If A is LCS, swapping policy and a demand paging
then t~ = 0, and the same conclusion follows. policy in the same system. Swapping thus
This establishes the second assertion. appears at best to be of marginal value in a
demand paging system. This establishes the
A "swapping d r u m " is an F C F S drum F third assertion.
for which the system guarantees t h a t each
working set's pages are stored on contiguous Now, let Cp(P) denote the cost of pre-
sectors. Suppose a request for a working paging from drum system P, and suppose
set of w pages arrives when L other requests > 0 is the probability that a prepaged
of sizes ~ , • • • , vL are in the drum queue; page is not used. To prepage from drum P,
the swapping drum transport time is given we would specify the w pages as a group
and add them to the drum load L. Ignoring
by
to, this costs approximately wTp', where
1 T r ' is Tp evaluated at load L + w. Of these
w pages, ew were preloaded erroneously, so
there will be ew additional page faults;
(The argument to derive T' is analogous to assuming each of these replaces an erroneous
t h a t for deriving Tp .) We are interested page with a correct one, the cost for each
in comparing is w T e . Thus,
Cd(P) = (w(w + 1)/2)(to + Te), Cp(P) = wTp' + ~w(wT~).
C,(F) = w T ' . After some algebra, we find
We shall ignore to since to << t~. Consider w ~ w0 = (2L + s + 2)/
two extremes of the drum load v~, . . . , vL •
At the one, each v~ is a request to swap in a ((1 -- 2e)(2L + s q- 2) -- 4)
full working set; taking w as the average is sufficient for Cp(P) < Cd(P) to hold. This
working set size and each v~ = w, we find has two consequences. First, if • is small and
(after some algebra) t h a t for all w > 0, L large, then w0 ~ 1, and prepaging would
C,(F) > Cd(P). At the other extreme, each almost always be advantageous. Second, in
v~ is a request for a single page; taking each order that the denominator of the expression
v~ = 1, we find (after some algebra) that for w0 be positive, we require
w> wo = I + 2 L s / ( 2 L + s - - 2) e < ½(2L -b s -- 2)/(2L + s zr- 2).
traffic through memory to the system's When the page size is fixed and T > h
capacity for handling it, the better the (typically, in fact, T >> ~), minimizing the
performance of the virtual memory. To total cost of running a program under
minimize this ratio, we must (1) choose a paging requires minimizing the number of
memory management policy to minimize the page faults. To understand what this en-
rate at which a given program load generates tails, we need a precise definition of replace-
page faults, (2) modify program structure ment algorithm.
to reduce the rate at which a given program A subset S of N such that S contains
generates new page faults, and (3) provide m or fewer pages (written [S[ < m) is a
hardware support to increase the system's possible memory state, and 9lZ,, is the set
capacity for handling page traffic. These of all such S. A replacement algorithm
generally keeps records about the program's
three aspects are examined in detail in the
behavior; the status of its records will be
following sections.
called a control State q, and Q is the set of
all such q. A replacement algorithm con-
figuration is a pair (S, q). If the configura-
PROGRAM BEHAVIOR AND MEMORY tion is (S, q) and page i is referenced, a
MANAGEMENT new configuration (S/, qt) is entered. We
describe this behavior b y the allocation
Program behavior is among the least under-
mapping
stood aspects of computer system design
and analysis. And yet we need to model g: ~Zm X Q X N - + ffg,~ X Q,
program behavior if we are to have a sound where
basis on which to predict a program's future
memory needs or if we are to understand g(S, q, i) = (S', q')
how close resource allocation policies are to and i is in S'. Starting from an initial con-
being optimal. figuration (So, q0), a replacement algorithm
processes the references rlr2 . . . rk by gen- mization of the number of faults generated.
erating a sequence of configurations. Since the days of the earliest paging machine,
people have reasoned that, to minimize the
(So, qo), (S,, q~), ... , (S~, qk),
number of faults, it is necessary to maxi-
where mize the times between faults [K3]. There-
fore the following has been the accepted
(Sk , qk) = g(Sk-1, qk-~ , r~), k > 1.
PRINCIPLE OF OPTIMALITY. Let S =
Thus a replacement algorithm A may be {1 ~, 2 t, " " , m p} be the memory state at time
described by specifying the 3-tuple A = t, the moment of a page fault, and let t(i ~) > t
(Q, q0, g). be the earliest moment at which page i' is
Now if A is a demand paging replace- next referenced. Define v(i') = t(i') -- t.
ment algorithm, then whenever (S', q') = Replace that page i' for which ~.(i t) is maxi-
g(S, q, i), the memory state S p must satisfy mum. I f the future is not precisely known,
these properties: replace that page i' for which the expected
• If i E S then S ~ = S (no page fault). time E[r(ir)] is m a x i m u m .
• If i ~ S and I S [ < m, then S' = In the case that we maximize E[~.(i')]--
S [J {i} (page i added to memory). the case of realizable algorithms--we are
attempting only to minimize the expected
• I f i ~ S a n d I S I = m, t h e n A selects
number of faults, rather than the actual
somej E S a n d S ' = (S - {j}) (J {i} (page
number of faults. Thus an optimal un-
i replaces j).
realizable algorithm would produce fewer
It can be shown that, for any nondemand faults than an optimal realizable algorithm.
paging algorithm A, one may construct a
demand paging algorithm A' that produces The principle of optimality has great
intuitive appeal. Belady [B3] has used it to
no more faults than A on every reference
string [A2, M2]. We are therefore justified develop an optimal unrealizable algorithm.
in restricting attention to demand paging Many other authors have developed various
algorithms. From now on, the term "al- optimal realizable algorithms, each depend-
gorithm" specifically means "demand paging ing on the particular assumptions used to
determine E[r(i')]; for example, the Atlas
replacement algorithm."
machine's algorithm assumed most pro-
Optimal Paging Algorithms grams were looping and therefore generating
Suppose r~ ..- rk -.. rK is the reference periodic reference strings [K3], and several
systems used an algorithm that supposes
string generated by a given run of a pro-
gram, and the reference moment t(rk) is E[r(i')] = t - t'(i') where t'(i') < t is the
that of a page fault. If algorithm A requires time i' was most recently referenced (this
precise knowledge of the future (rk+l --. r~) rule is called "least recently used"). We
to make its replacement decision at t(rk), shall not attempt to survey the multitude
A is an "unrealizable" algorithm. Otherwise, of paging algorithms that have been pro-
if A bases its decision at t(rk) only on as- posed and studied, these being amply treated
in the literature [B3, B4, B6, C3, (38, D4,
sumptions about the future (e.g. probabil-
ities), A is a "realizable" algorithm. In D5, D9, H1, K5, J2, K3, 02, S2, S3, $5].
most practical applications, we must be Despite its intuitive simplicity, the Prin-
content with realizable algorithms; un- ciple of Optimality is known not to hold for
realizable ones would require "preprocess- arbitrary assumptions about reference string
ing" the program and recording its refer- structure and statistics. Even when it does
ence string. Not only is this operation costly, hold, proofs of this are difficult, and are
but the record so obtained may well be known only in simple cases [A2, M2].
invalid, due to conditional branching. Even though the Principle of Optimality
As discussed in the previous section, we may not in fact be always optimal, it is a
take as o u r optimality criterion the mini- good heuristic, and experience and experi-
The Principle of Locality and the Working R(k) are strict and the expected ranking life-
Set Model times long.
An important program property, alluded From the principle of locality comes the
to in previous sections, is locality. Infor- notion of "working set." A program's work-
mally, locality means that during any inter- ing set at the kth reference is defined to be
val of execution, a program favors a subset
of its pages, and this set of favored pages W(k, h) = {i E N I page i appears among
changes membership slowly. Locality is an rk-h+l ".- rk}, h ~ 1.
experimentally observed phenomenon mani-
festing itself partly as a tendency for refer- In other words, W(k, h) is the "contents"
ences to a given page to cluster, partly in of a "window" of size h looking backwards
the shape of the f ( A , m) curve in Figure 18 at the reference string from reference rk.
[B3, B4, D4, D5, D9], and partly in the The working set at time t is W(t, h) =
rapidity with which a program acquires W(k, h) where t(r~) < t < t(rk+l). Page i is
certain pages on demand at the beginning expected to be a member of the working set
of a time quantum [C3, F2]. Locality is not if it is referenced in the window, i.e. if
unexpected, by the very nature of the way k
programs are constructed: ai(j) ~ 1.
--Context. At any given time a program j~k--h+l
is operating in one of its modules, which (This equation, together with assumptions
causes a concentration of references in cer- about the at(k), could be used to determine
tain "regions" or "localities" of address a value for h. For example, if it were as-
space. For example', its instructions are sumed that ai(k) = al and it were declared
being fetched from within the pages of some
that pages with a~ < a0 for some given a0
subroutine, or its data are being fetched ought not be expected as members of the
from the content of some specific data seg- working set, then h = 1/ao .) Therefore, a
ment.
working set is expected to contain the "most
--Looping. Programs tend often to loop useful" pages; by the principle of locality it
for a long time within a small set of pages. changes membership slowly.
In order to render the statement of Now suppose locality holds and R(k) =
locality more precise, we introduce the (1 p, 2', . . . , n'). If i' is ranked higher than
notion of the "reference density" for page i: j ' (i.e. a~,(k) > aj,(k)) then E[r(i')] <
ai(k) = Pr[reference rk = i], i E N.
E[r(j')], and because ranking lifetimes are
long, this relation is expected not to change.
Thus 0 _< a~(k) _~ I and ~ at(k) = 1. Al- Since i' is more likely than j ' to be in
though a program's reference densities are W(k, h), there follows:
unknown (and perhaps unknowable), the WORKING SET PRINCIPLE. Suppose mem-
definition of "working set" given below ory management operates according to the
obviates the need for attempting to measure following rule: A program may run if and
them. By a "ranking" of a program's pages only if its working set is in memory, and a
we mean a permutation R(k) = (1', 2', page m a y not be removed if it is the member
• . . , n ' ) such that a,(k) ~ . . . ~_ a~,(k); of a working set of a running program. Then,
a ranking R(k) is "strict" if a,(k) > .-. > according to the principle of locality, this rule
a~,(k). A "ranking change" occurs at refer- is an implementation of the principle of opti-
ence k if R(/c - 1) ~ R(k); a "ranking life- mality.
time" is the number of references between The working set principle is more than a
ranking changes. Ranking lifetimes will memory management policy, for it implies
tend to be long if the a~(k) are slowly vary- a strong correlation between processor and
ing functions of k. memory allocation. Its implementation does
PRINCIPLE OF LOCALITY. The rankings not depend on measurement of reference
that it tells how memory is to be managed the kth program is introduced, it is granted
under multiprogramming, is a form of a mk' pages and the global policy changes the
local policy. Indeed, global policies are in remaining mi to mi' < m~. Letting Dj de-
general suboptimal, partly because there is note the total expected processing efficiency
no way to determine when memory is "over- when j programs are in memory, we .have
crowded," and partly because there is no k--1
way to guarantee that a program's work Dk-, = ~ d,(mi),
space is large enough to contain its working
set even if memory is not "overcrowded." k
Multiprogramming under a global policy Dk = ~ di(m~').
i=l
is susceptible to thrashing, a collapse of
performance that may occur when memory Thrashing occurs if Dk << D~_1,1 i.e. the
(or parts of memory) is overcommitted addition of one more program triggers a
[D6]. Thrashing is a complicated phenome- collapse of processing efficiency. Using (i)
non. At the risk of oversimplification, we we find
shall derive a condition that estimates when k--1
it will occur. We assume (1) that the ith Dk-j -- Dk < a ~ (f~(m~') -- f~(m~))
i~l
program in memory has average work space
m~ and fault probability fi(ml) under the -- dk(mk') (it)
given global policy, where f~ is stationary
over the time interval under consideration; aFo -- dk(mk').
and (2) for each i, fi(m') ~ f~(m) whenever Now if the quantity Dk_~ -- Dk is near its
totem.
upper bound and aF0 is not small, then it is
A " d u t y factor" d(m) for a program occu- possible to obtain Dk_l << Dk. Experiments
pying a work space of average size m m a y on the RCA Spectra 70/46 computer sys-
be defined as follows: if f(m) is the program's tem, for which a > 104 (a drum auxiliary
fault probability, then the expected number memory), show that this condition is easy
of references between faults is l / f (m); if each to induce [D2]. Conversely, we can prevent
memory reference takes expected time 5 thrashing if we can guarantee t h a t aF9 is
(see the section on Basic System Hardware) small, which may be done by using faster
and each page transport takes expected auxiliary memory or by operating programs
time T, then the expected fraction of time with space allocations which vary only in
this program spends in execution is ranges where F0 is small.
d(m) [5/f(m)l/[5/f(m) + T], Now suppose a working set policy is in
o~ = T/~. effect. Let the random variable ~(h~) denote
= 1/[1 --~ af(m)], the working set size of program i for window
Using condition (2) above, it is not difficult size h~, and let g~(h~) denote the probability
to show that, if m' < m, that a page is not in the working set. Be-
cause the pages with highest reference den-
0 ~ d(m) -- d(m') < a(f(m') -- f(m)). (i) sities are most likely to be members of the
If d(m) -- d(m') is near its upper bound and working set, gi is decreasing, i.e. gi(hi) >
a is large, a relatively small change in work g~(h~ + 1). The d u t y factor d~(h~) for pro-
space size will be reflected as a large change gram i under a working set policy satisfies
in d. This is necessary to induce thrashing. d,(h~) > 1/[1 + age(hi)I,
Now imagine the following conditions
holding for an M-page multiprogrammed where the inequality holds because a page
memory using a global policy. Initially there not in the working set may still be in the
are k - 1 programs in memory, the ith pro- memory, so t h a t g~(h~) is at least as large
gram occupies a work space of average size as t h e fault probability. Since g~ is decreas-
mi ~ 1, and ml -b " - + mk-1 = M. When Notation x << y means "x is much less than y."
ing, we may always choose h~ large enough likely to call one another; there was a re-
so that g~(hO _< go for some given go, 0 < markable reduction in the number of page
go <_ 1 ; therefore we may guarantee that faults using the latter method. McKellar
and Coffman [M4] have studied how matrix
do ~ 1/(1 + ago) _~ ddh~) _< 1. elements should be assigned to pages and
In other words, we may always choose h~ how standard matrix operations could be
large enough that program i operates at or organized to give better performance under
above the desired level do of efficiency. paging; they too report a rather remarkable
(Normally, we would choose do so that the improvement in certain cases.
relation do ~ 1 is false.) This implies that Informally, the code distribution problem
is: How can the compiler (or the subroutine
l~do < Dk _< k. (iii) linker) be employed to distribute program
If we are considering adding the kth pro- code and data into pages in order to improve
gram to memory, we may do so if and only if locality and obtain small, stable working
sets? Formally, the code distribution prob-
k--1
lem may be stated in the following way.
w,(hk) _< M - ~ ~i(h~), A program is regarded as a directed graph
i--1
G whose nodes represent instructions or
i.e. there is space in memory for its working data and whose edges represent possible
set. Assuming that do << 1 is false, the addi- single-step control transfers. With edge
tion of the kth program cannot cause thrash- (i, j) is associated a cost c~i >_ 0 of travers-
ing. Suppose it does, i.e. suppose Dk << ing that edge (c~ might, for example, repre-
Dk_~ ; by (iii) we have sent the probability that (i, j) will be used).
Given a page size z ~ 1, a pagination of the
kdo < Dk << Dk-1 < lc,
program is a partition of the nodes of G
which yields the contradiction do << 1. into disjoint sets X~, . . . , Xr such that Xk
Thus working set policies may be used to contains at most z nodes, 1 < k < r. Each
prevent thrashing. Experiments on the RCA X~ will be placed on its own page. For a
Spectra 70/46 computer system appear to given pair of pages (X, X/), let
verify this [D2].
v(x, x ' ) = i52 52 c,j
EX jEX ~
matics involved, the results may not be must teach techniques that may be applied
particularly useful except in certain obvious without knowledge of machine details (page
cases such as those mentioned above. If the size, memory size, and the like). Highly
trend toward increased use of modular structured programming languages, where
programming continues, the value of using the "context" (see the section on The Prin-
a compiler to determine an optimal pagina- ciple of Locality and the Working Set
tion is questionable: (1) program modules Model) is readily detectable at the machine
tend to be small, and very often fit on their level, may be the answer; in other words,
own pages; and (2) in contradiction to the the programming language would "force"
assumption that the code optimizer must the programmer into the "correct" style.
know the connectivity structure of the The programming language ALGOL, which
entire program, the compiler of a module makes heavy use of a stack during execu-
may not know the internal structure of any tion, is an example of this; the working set
other module. (If it did, the very purpose of will surely contain the information near the
modular programming would be defeated.) top of the stack, and is therefore easily
The optimization process cannot, therefore, measured. Much more sophisticated ap-
be invoked prior to loading time; and if the proaches have been conceived [D14].
trend toward data dependent program
structures continues, there is some question
whether even the loader can perform mean- HARDWARE SUPPORT
ingful optimization.
Improving programming style to improve We have seen that the three principal po-
locality is an almost intangible objective tential difficulties with multiprogrammed,
and is something about which little is known paged memory systems are fragmentation,
or can be said [K6]. A few experiments thrashing, and the high space-time cost of
show that locality (and therefore paging loading working sets into memory under
behavior) is strongly a function of a pro- demand paging. These three problems are
grammer's style, and it is possible to im- partially attributable to the large speed
prove many programs significantly by rela- ratio T/A between the main and auxiliary
tively minor alterations in strategy, altera- memory; if this ratio is large, it forces large
tions based on only a slight knowledge of page sizes in order to make page transport
the paging environment [B9, $2]. It is not operations efficient, it makes processing
known, however, whether programmers can efficiency very sensitive to fluctuations in
fault probability, and it causes the space-
be properly educated and inculcated with
time cost of a single page-transport opera-
the "right" rules of thumb so that they tion to be very high. Therefore, one aspect
habitually produce programs with "good" of improving hardware for virtual memory
locality. If any such education is to be concerns the reduction of this ratio.
fruitful for a large class of programmers, it
The literature reports two directions in
which approaches to reducing the ratio
T/A have proceeded, to which we shall
refer as slave memory ("cache" memory)
[F5, L2, W3, W4] and distributive memory
[A3, D8, F1, L1, V1]. Both approaches
employ a memory hierarchy (Figure 20)
consisting of k "levels"; levels M1, ...
Mk_l are electronically accessed (e.g. core
PROCESSOR memory, thin film memory, or silicon-
register memory), and level Mk is mechan-
....... S L k V E CONNECTIONS
--- DISTRIBUTIVE CONNECTIONS ically accessed (e.g. drum or disk). The
Fro. 20. Memory hierarchy structure electronic levels may be accessed without
latency time. Generally, the lower the num- vantage is that the mechanism is simple
ber of the level, the faster its speed, the enough to be implemented almost entirely in
higher its cost, and the lower its capacity. hardware [W3]. A fourth advantage is the
The distinguishing feature is that slave possibility of implementing certain associa-
memory permits processing only from level tive processing operations in the main
M1, whereas distributive memory allows level [$6].
processing from any of the electronic levels Many modern processors employ an
M1, -.. , Mk-1. "instruction stack," which is a small num-
Typically, the combined capacity of the ber of registers (usually no more than 32)
electronic levels in these approaches is large that store the most recently referenced in-
enough to hold all the information of all structions of a program. Not only does this
active programs. Therefore, the transport stack permit "lookahead," it' acts as a small
time for a page among the electronic levels slave memory that allows processing to
is small, because the speed ratios between proceed at nearly register speed for loops
adjacent levels can be made small. Accord- that are contained in the stack [W3]. The
ingly, a hierarchical memory organization most notable examples of slave memory
of this kind can achieve the objectives re- implemented as discussed above are the
quired to make paged virtual memory per- cache memory [L2] on the IBM 360/85,
form well. IBM 360/195, and CDC 7600. These sys-
The slave memory approach [W3] was tems use k = 3, Mj being a silicon-register
first implemented as the "cache store" on memory with cycle time about 0.1 gsec and
the IBM 360/85 [L2]. This approach is so Ms a core memory with cycle time about
named because information transfers among 1 gsec. The level Mj is about 32K bytes
levels are entirely controlled by activity in capacity, and has been found substantial
the ("master") level M~ . The rules of opera- enough to accumulate the working sets of
tion are: all but the largest programs. Even if the
1. Whenever a page is stored in M i , there working set cannot be contained in M1,
is a copy of it in each of M~+i, • • • , Mk-1. performance is not appreciably degraded
Whenever a page in M1 is modified, all because the speed ratio between M1 and
copies of it in the lower levels must be M2 is small.
modified likewise. In the distributive memory approach, the
processor may access information stored in
2. Whenever a page not in Mj is refer-
any of the electronic levels. Thus the pages
enced, a request for it is sent to the lower
of a given program may be distributed
levels; the retrieval time depends on the
among the various levels while being proc-
"distance" to the "nearest" level containing
essed. Generally, the more frequently a
a copy of the required page.
page is referenced, the higher should be the
3. Whenever M~ is full and a new page is level in which it is stored. The most notable
brought in from M~+j, a replacement policy, example of such a system is that at Carnegie-
usually least recently used, is invoked to Mellon University IF1, L1, V1], which uses
select a page to be deleted (since there is k = 3; M~ is a standard core memory with
already a copy in M~+i, there is no need to cycle time about 1 ~sec and Ms a large
move the displaced page). capacity store (LCS) with cycle time about
The principal advantage of this organiza- 8 ~sec.
tion is that a program's working set will The distributive memory system presents
rapidly accumulate in M~ and be retained certain sticky implementation problems not
there; accesses will thus be completed at found in the slave memory system. The
nearly the speed of Mj . A second advantage worst is a requirement that there be a policy
is that, because transport times are small, to determine when a page should be moved
pages may be small, and all the advantages to a higher (or lower) level. These policies
of small pages are accrued. A third ad- are generally based on a tradeoff between
the cost of not moving the page and running A third aspect of improving virtual mem-
at slower speed, and the cost of moving the ory hardware concerns the nature of the
page; they generally require some estimate of addressing mechanisms. Difficulties have
each page's reference density for these de- occurred in virtual memories where informa-
cisions, the estimates being obtained by tion is potentially sharable among distinct
preprocessing [C1], by measurements taken address spaces [B7, D13]. Here each seg-
in a previous time quantum [F1], or dy- ment may have two names: a "local" name
namically [D8]. Systems using dynamic which serves to identify it within a given
measurement techniques require additional address space, and a "global" name which
mechanism to avoid instability [D8]. serves to identify it systemwide. Local
Which of the two approaches--slave or names are interpreted in the usual way by
distributive memory--is superior is an un- hardware (see the section on Implementa-
settled question. That the implementation tion of Virtual Memory), and global names
problems of distributive memory seem more are interpreted by software (e.g. "file direc-
severe leads one to suspect that perhaps the tories"). The mechanism for converting
slave memory approach may be the better global names to local names is quite involved
way to use the hardware. and time consuming [B7, D1]. The solution
Reducing the ratio T / A is not alone appears to require that every segment have
sufficient to improve performance of virtual one, system-wide name which may be in-
memory systems. A second aspect of im- terpreted by hardware at every level of
proving hardware for these systems con- memory [D141.
cerns mechanisms for obtaining measure-
ments useful in memory allocation. Most
systems implement page table entries with CONCLUSIONS
one or more of these extra bits present:
We began this survey of virtual memory
1. Modified bit. Set to 1 if and only if system principles by tracing the; history
the page was modified since being placed in
and evolution of the forces that compelled
memory. If this bit is 0, the page may be dynamic storage allocation, i.e. desires for
deleted rather than replaced, assuming there
program modularity, machine independence,
is a copy in a lower level of memory.
dynamic data structures, eliminating manual
2. Use bit. Set to 1 whenever the page is overlays, multiprogramming, and time-
referenced, and to 0 by a usage metering sharin~-Amoag the mo t~eg_~t solutions
routine. The metering routine can compile to the d ~ n a m i c ~ f ~ g ~ allocation~problem is
statistics on page use by reading these bits. virtual memory, wherein a-_or.p_gr:A_~._2,r--Js--
3. Unused bit. Set to 1 when a page is .given the illusion that his address spa c,e_is
placed in memory and to 0 the first time it .~.e"- ihem(J~ space. There ~-aar6t w o basic
is referenced. This hit signifies that the page ap~roa~s~o-i~p-I~menting the automatic
has not yet been referenced by the program translation of addresses from address to
that demanded it, and should not be re- memory space, these being ~mentatiox~5
moved from memory at least until that time. and .paging) since segmentation ~ i - r e O
The use bits may serve to determine a by programmers and paging b y system
working set or to calculate reference den- implementers, the best implementation c()n~- "
sities. Counters can also be used for this bines the two. We compared "pur~! seg=_.
purpose [D8]. If the addressing mechanism mentation with paging, and ffoa!ng~p_gy~
contains a large enough associative memory memory systems generally ,.J.~pexic[r except
that its contents remain stable, then the for three potential difficulties-'~ (1) suscepti-
pages entered there may be regarded as the bility to low storage utilization for large
program's working set; similarly, the pages page sizes, (2) propensity toward thrashing
which accumulate in the level M1 of the under multiprogramming, and (3) the high
slave memory may be regarded as the pro- cost of loading working sets under demand
gram's working set. paging at the start of a time quantum. One
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