Main Memory

register

CPU cache

• larger capacity
Main Memory • lower speed
• lower cost

Secondary Storage

Server (or INTERNET)

• Memory management : method of managing
memory.
• Various ways to manage memory.
• CPU can access directly through main memory and
registers built into processes.
• Note : any instructions needs to execute it must be
in one of these storage device.
•Process has separate memory space-
determine legal address that process can
access.
• Based on two registers: base and limit
• Base hold physical memory address
• Limit register –specifies the size of the range
• Eg: base =300040 and limit hold 120900
• Program can access all address between 300040 THROUGH
120900.
 Binding of Instructions and Data to Memory

• Address binding of instructions and data to memory

addresses can happen at three different stages
• Compile time: If memory location known a priori, absolute
code can be generated; must recompile code if starting
location changes
• Load time: Must generate relocatable code if memory
location is not known at compile time
• Execution time: Binding delayed until run time if the process
can be moved during its execution from one memory segment
to another
• Need hardware support for address maps (e.g., base and
limit registers)
 Logical vs. Physical Address Space

• Logical address space that is bound to a separate physical

address space is central to proper memory management
• Logical address – generated by the CPU; also referred to as virtual
address
• Physical address – address seen by the memory unit
• Logical and physical addresses are the same in compile-time
and load-time address-binding schemes; logical (virtual) and
physical addresses differ in execution-time address-binding
scheme
• Logical address space is the set of all logical addresses
generated by a program
• Physical address space is the set of all physical addresses
generated by a program
• Logical address
• Logical addresses are generated by the CPU during
program execution.
• Used by programs to access data and instructions stored
in memory.

hardware base that makes a virtual memory system possible.

MMU (Memory Management Unit)

• The hardware base that makes a virtual memory system possible.

• Allows software to reference physical memory by virtual addresses,
quite often more than one.
• It accomplishes this through the use of page and page tables.
• Use a section of memory to translate virtual addresses into physical
addresses via a series of table lookups.
• The software that handles the page fault is generally part of an operating
system and the hardware that detects this situation
Virtual Memory
• Virtual memory as an alternate set of memory addresses.
• Programs use these virtual addresses rather than real
addresses to store instructions and data.
• When the program is actually executed, the virtual
addresses are converted into real memory addresses.

• Virtual memory was developed in approximately 1959 –

1962, at the University of Manchester for the Atlas
Computer, completed in 1962.

• In 1961, Burroughs released the B5000, the first commercial

computer with virtual memory.

More discussion about VM during

paging
Logical address mapping to Physical address

• Example Scenario: open an MP3 file.

• Step 1
• User-Level Code Requests File
• FILE *fp = fopen("song.mp3", "rb");
• System call to open() internally(cached in RAM).
• Only parts of the file loaded into memory as needed.
• Step 2
• OS load file to VM
• Process has page table to translate virtual address to physical address.
• CPU doesn’t access Ram directly using virtual address, use page table to
translate virtual addresses to physical ones.
What is page table

• Every process (music player) thinks it has its own big block of
memory — this is virtual memory.
• However, the actual RAM is shared among all processes.
• need a mapping from the virtual addresses (used by programs) to physical
addresses (actual RAM).
• This mapping is done using the page table,
• maintained by the OS and used by the CPU’s Memory Management Unit
(MMU).
• Virtual address(logical address*) is split into:
• Page number (to find in the page table)
• Offset (location within that page)
• Virtual Address = [Page Number | Offset]
• = 0x00132010
= 0x00132 (page number) + 0x010 (offset) exact location
within a page.
Look up page number 0x00132 in the page table.
Find corresponding physical frame number, e.g., 0x00A2000.

Physical Address = 0x00A20000 + 0x010 = 0x00A20010

PT :stores the
mapping between
virtual addresses
(used by programs)
and physical
addresses
Example

• Page Size = 4 KB = 2¹² bytes = 4096 bytes

• Virtual Address (VA): 0x00132010

• Step 1: Split the Virtual Address
• Virtual Address (Hex): 0x00132010 = 0000 0000 0001 0011 0010 0000 0001
0000 (Binary)

• In binary:
• - Page Number bits = upper 20 bits: 0000 0000 0001 0011 0010 (i.e., 0x132)
• - Offset bits = lower 12 bits: 0000 0001 0000 (i.e., 0x010)
• Step 2: Page Table Lookup
• Page Number = 0x132

• OS looks up entry 0x132 in the page table.

• Suppose entry 0x132 → frame number 0x00A2.

• Physical Frame Address = 0x00A2 * 0x1000(hex deci of 4096 bytes) =

0x00A20000
Swapping
• A process can be swapped temporarily out of memory to a
backing store, and then brought back into memory for
continued execution
• Total physical memory space of processes can exceed physical
memory
• Backing store – fast disk large enough to accommodate
copies of all memory images for all users; must provide direct
access to these memory images
• Roll out, roll in – swapping variant used for priority-based
scheduling algorithms; lower-priority process is swapped out
so higher-priority process can be loaded and executed
• Major part of swap time is transfer time; total transfer time is
directly proportional to the amount of memory swapped
Schematic View of Swapping
Contiguous Allocation
• Main memory must support both OS and user processes
• Limited resource, must allocate efficiently
• Contiguous allocation is one early method
• Main memory usually into two partitions:
• Resident operating system, usually held in low memory with interrupt
vector
• User processes then held in high memory
• Each process contained in single contiguous section of memory
 Multiple-partition allocation
• Multiple-partition allocation
• Degree of multiprogramming limited by number of partitions
• Variable-partition sizes for efficiency (sized to a given process’ needs)
• Hole – block of available memory; holes of various size are scattered throughout
memory
• When a process arrives, it is allocated memory from a hole large enough to
accommodate it
• Process exiting frees its partition, adjacent free partitions combined
• Operating system maintains information about:
a) allocated partitions b) free partitions (hole)
 Dynamic Storage-Allocation Problem
How to satisfy a request of size n from a list of free holes?

• First-fit: Allocate the first hole that is big enough

• Best-fit: Allocate the smallest hole that is big enough; must

search entire list, unless ordered by size
• Produces the smallest leftover hole

• Worst-fit: Allocate the largest hole; must also search entire

list
• Produces the largest leftover hole
First-fit and best-fit better than worst-fit in terms of speed and storage
utilization
Enter size of 10 memory blocks:
Block 0: 100
Block 1: 500
Block 2: 200
Block 3: 300
Block 4: 600
...
Enter process size: 250

Process of size 250 allocated to block

1 (size 500) [First Fit]
Process of size 250 allocated to block
3 (size 300) [Next Fit]
Process of size 250 allocated to block
4 (size 600) [Best Fit]
Fragmentation
• External Fragmentation – total memory space exists to
satisfy a request, but it is not contiguous
• Internal Fragmentation – allocated memory may be
slightly larger than requested memory; this size difference
is memory internal to a partition, but not being used
• First fit analysis reveals that given N blocks allocated, 0.5 N
blocks lost to fragmentation
• 1/3 may be unusable -> 50-percent rule
Fragmentation (Cont.)

• Reduce external fragmentation by compaction

• Shuffle memory contents to place all free memory together in one
large block
• Compaction is possible only if relocation is dynamic, and is done at
execution time
• I/O problem
• Latch job in memory while it is involved in I/O
• Do I/O only into OS buffers
• Now consider that backing store has same fragmentation
problems
Paging
• Physical address space of a process can be noncontiguous;
process is allocated physical memory whenever the latter is
available
• Avoids external fragmentation
• Avoids problem of varying sized memory chunks
• Divide physical memory into fixed-sized blocks called frames
• Size is power of 2, between 512 bytes and 16 Mbytes
• Divide logical memory into blocks of same size called pages
• Keep track of all free frames
• To run a program of size N pages, need to find N free frames
and load program
• Set up a page table to translate logical to physical addresses
• Backing store likewise split into pages
• Still have Internal fragmentation
Address Translation Scheme
• Address generated by CPU is divided into:
• Page number (p) – used as an index into a page table which contains
base address of each page in physical memory
• Page offset (d) – combined with base address to define the physical
memory address that is sent to the memory unit

page number page offset

p d
m -n n
• For given logical address space 2m and page size 2n
Paging Hardware
Paging Model of Logical and Physical Memory
Paging Hardware With TLB
Background
• Code needs to be in memory to execute, but entire program rarely
used
• Error code, unusual routines, large data structures
• Entire program code not needed at same time
• Consider ability to execute partially-loaded program
• Program no longer constrained by limits of physical memory
• Each program takes less memory while running -> more programs run at the
same time
• Increased CPU utilization and throughput with no increase in response time or
turnaround time
• Less I/O needed to load or swap programs into memory -> each user
program runs faster
Background (Cont.)
• Virtual memory – separation of user logical memory from physical
memory
• Only part of the program needs to be in memory for execution
• Logical address space can therefore be much larger than physical address space
• Allows address spaces to be shared by several processes
• Allows for more efficient process creation
• More programs running concurrently
• Less I/O needed to load or swap processes
Page Fault

• A page fault is an event that occurs in a virtual memory system when

a program tries to access a page that is not currently in the main
memory (RAM).
Page Fault

• If there is a reference to a page, first reference to that page

will trap to operating system:
page fault
1.Operating system looks at another table to decide:
• Invalid reference  abort
• Just not in memory
2.Find free frame
3.Swap page into frame via scheduled disk operation
4.Reset tables to indicate page now in memory
Set validation bit = v
5.Restart the instruction that caused the page fault
Steps in
 Valid-Invalid Bit
• With each page table entry a valid–invalid bit is associated
(v  in-memory – memory resident, i  not-in-memory)
• Initially valid–invalid bit is set to i on all entries
• Example of a page table snapshot:

• During MMU address translation, if valid–invalid bit in page table entry is i  page fault
Page Table When Some Pages Are Not in Main Memory