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Application of Mentorgraphics Tools: Eldo Platform

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120 views5 pages

Application of Mentorgraphics Tools: Eldo Platform

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© © All Rights Reserved
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Application of MentorGraphics tools

 Analog circuits, Digital circuits, Analog and Mixed circuits can be


simulated, Synthesized using Tanner tools.
 RF Analog & digital circuit designs (ADiT simulator).
 Design of Sensors, Actuator, Electrical components (Tanner MEMS ,
Tanner Photonics).
 Antenna Designs Using HyperLynx 3D (IE3D)
 Layouts can be done using Tanner L-Edit for Analog circuits, Digital
circuits, Analog and Mixed signalling circuits.
 Physical Verification Using Calibre nmDRC tools.

Eldo Platform

 The Eldo Platform delivers a proven set of capabilities targeted at analog-


centric ICs in BCD and other analog technologies.

Analog FastSPICE (AFS) Platform

 The Analog FastSPICE Platform™ (AFS™) provides the world's fastest,


most accurate, highest capacity simulation for nanometer-scale circuits-
including high-performance mixed-signal SoCs.

Calibre

 Calibre nmDRC™ has reduced average DRC runtime by a factor of five,


while Calibre's innovative Hyperscaling and MTFlex™ technologies have
cut memory requirements in half.
 Calibre nmDRC also reduced overall cycle time with incremental DRC,
which allows designers to make DRC runs in parallel. As DRC violations
are reported, designers can immediately fix and recheck just the affected
areas, while the initial DRC run continues.
 Calibre nmLVS provides actual device geometry measurement,
programmable electrical rule checking, and sophisticated interactive
debugging capabilities to ensure accurate circuit verification and further
improve the designer's productivity
Calibre 3DSTACK

Calibre 3DSTACK extends Calibre die-level signoff verification to enable


complete signoff verification of a wide variety of 2.5D and 3D stacked die
assemblies. With Calibre 3DSTACK, designers can perform signoff DRC and LVS
checking of complete multi-die systems at any process node without breaking
current tool flows or requiring new data formats, significantly reducing time to
tapeout. Because 3DSTACK is enabled using standard Calibre DRC, Calibre LVS
and Calibre DESIGNrev license features, no new licenses or tools are required.

Pattern-driven design correction, analysis and verification


 Streamline and simplify complex checks

 Integrate with all major design environments

 Ensure consistency and accuracy

Tanner MEMS

 Tanner MEMS design flow delivers 3D MEMS design and fabrication


support in one unified environment, and makes it easy to integrate MEMS
devices with analog/mixed-signal processing circuitry on the same IC.
 Foundry-proven, it enhances the manufacturability of MEMS devices via
mechanical, thermal, acoustic, electrical, electrostatic, magnetic and fluid
analyses

 Create a MEMS 3D model from layout

 Highly programmable layout editor with MEMS-friendly capabilities, such


as curved polygons

 Design rule checking for MEMS manufacturability

 System-level simulation of IC design and MEMS devices

 Complete layer & design geometry visualization

 Automatically generate behavioral models of your MEMS devices


 Import DXF with boundary reconstruction, export DXF

 Available for Windows or Linux

Tanner S-Edit Schematic Capture

 Industry-standard support including tight SPICE simulation integration


and waveform cross-probing

 Directly view operating point simulation results in the schematic

 Cross-probe between schematic, layout and LVS report with net/device


highlighting

 Configurable schematic Electrical Rule Checks (ERC)

 Advanced array and bus support

 Integrated with Tanner L-Edit IC to speed the layout and ECO process

 Available for Windows and Linux

Industry-standard import and export support

 Export to SPICE, EDIF, Verilog, and VHDL


 Import from OpenAccess, and EDIF, with automatic conversion of files
from Mentor and other third-party tools

Tanner Layout Editor (L-Edit)


 L-Edit Photonics supports a layout-centric design flow where a schematic is
not necessary. The benefit of this approach is that the layout is the “golden"
design database. Designers that want to work with a schematic can use S-
Edit.

 The tool generates a netlist to use as input into a photonics simulator.

 L-Edit Photonics partners with simulation vendors. Our partners include


Luceda, Lumerical, Optiwave, and VPIphotonics™.
 Photonic PDKs are available from multiple foundries that support both
Tanner L-Edit Photonics and LightSuite Photonic Compiler. The tool
supports iPDK and Mentor-formatted PDKs.

 L-Edit Photonics is available on both Linux® and Windows®.

Tanner T-SPICE

It improves simulation accuracy with advanced modeling, multi-threading


support, device-state plotting, real-time waveform viewing, and analysis, and a
command wizard for simple SPICE syntax creation.

 Fast, accurate analog/mixed-signal circuit simulation with support for


multi-threading

 Accurately characterize circuit behavior with virtual data measurements,


parameter sweeping, Monte Carlo, DC/AC, and transient analysis

 Supports Levenberg-Marquardt non-linear optimizer, plot statements and


parameter definitions, plus bit or bus logic waveform inputs

 Lowest total cost of ownership in the industry

 Available for Windows or Linux

Questa® Advanced Simulator

The Questa® Advanced Simulator combines high performance and capacity


simulation with unified advanced debug and functional coverage capabilities for
the most complete native support of Verilog, SystemVerilog, VHDL, SystemC,
SVA, UPF and UVM.

The Questa Advanced Simulator is the core simulation and debug engine of the
Questa Verification Solution; the comprehensive advanced verification platform
capable of reducing the risk of validating complex FPGA and SoC designs.
Analog-Digital Mixed-Signal Simulator

High Performance and Capacity Analog and Mixed-Signal Simulation

Questa ADMS extends the familiar Questa verification platform with analog
and mixed-signal standard languages while maintaining a unified simulation
environment. ADMS is language neutral; you can combine VHDL-AMS,
Verilog-AMS, VHDL, Verilog, SystemVerilog, SPICE and SystemC anywhere
and at any level in the design.

Questa ADMS includes the versatile EZwave mixed-signal waveform viewer


and waveform calculation tool for display and analysis of mixed-signal results.

RF Applications

Complete simulation of RF system-on-chip (SoC) designs becomes a reality


when you combination the RF capabilities of Eldo RF with the mixed signal
capabilities of Questa ADMS.

AMS-Targeted Fast-SPICE Simulator

ADiT is the tool of choice to address the challenges associated with simulating
today's complex analog and mixed signal circuit designs. ADiT is a fast-SPICE
simulation tool that delivers the ability to obtain accurate and reliable
simulation results faster than traditional SPICE tools.

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