Combinational ATPG

Ganesh C. Patil

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Irredundant Hardware and Test
Patterns

 Fault Test Response (good/failing)

a sa0, A=0 D
a sa1 A=1 D_bar
b sa0 A=1 D_bar
b sa1 A=0 D
 Therefore, these faults are not redundant
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Redundant Hardware and
Simplification

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Fault q sa1

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Redundant Fault q sa1

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Redundant Fault q sa1

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Fault f sa0

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Fault f sa0

 Single fault f sa0 is tested by input vector

110.
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Multiple Fault Masking
 Single fault f sa0 is tested by input vector
110.

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Multiple Fault Masking
 f sa0 is masked when fault q sa1 is also
present.

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Hazardous Circuit
 x1 = x2 = x3 =1 => f =1
 Now let x1 change from 1 to 0.
Then circuit supposed to
maintain f =1
 For x1 = 0, p = 0.
 Because of presence of
Circuit with Static Hazard
inverter p = 0 before signal q
become1
 For short time p =0, and q =0
causing f to drop to 0 before
it recovers back to 1

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Design of Hazard free circuit Example-1

Circuit with Static Hazard

Hazard free circuit

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Intentional Redundant Implicant
 Elimination of hazards in circuit output

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Intentional Redundant Implicant
 Redundant Fault e sa0

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 Fault Cone and D-frontier
 Fault Cone – Set of hardware affected by fault
 D-frontier – Set of gates closest to POs with fault
effect(s) at input(s)

D-frontier

Fault Cone

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 Redundancy Removal Algorithm
Repeat until there are no redundant faults:
{
Use ATPG to find all redundant faults;
Remove all redundant faults with non-
overlapping fault cone areas;
}

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 Combinational ATPG Algorithms
 D-Algorithm (Roth) – 1966
 PODEM (Goel) – 1981
 FAN – Multiple Backtrace (1983)
 TOPS – Dominators (1987)
 SOCRATES – Learning (1988)
 Legal Assignments (1990)
 EST – Search space learning (1991)
 BDD Test generation (1991)

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D-Algorithm - Roth
IBM (1966)
 Fundamental concepts invented:
 First complete ATPG algorithm
 D-Cube
 D-Calculus
 Implications – forward and backward

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Forward Implication
 Results in logic gate inputs
that are significantly labeled so
that output is uniquely
determined
 AND gate forward implication
table:

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 Backward Implication
 Unique determination of all gate inputs when the
gate output and some of the inputs are given

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D-Frontier
 All gates whose outputs are X but has at least one D
or D-bar at the input of the gates
 Initially, the D-frontier consists of only 1 gate (output
of the fault-site)

 The D-frontier contains 2 gates

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J-Frontier
 All gates whose outputs are specified by are
not justified by the input assignments

 The J-Frontier contains 2 gates

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Singular Cover
 Minimal set of logic signal assignments to show
essential prime implicants of Karnaugh map

Gate Inputs Output Gate Inputs Output

AND A B d NOR d e F
1 0 X 0 1 1 X 0
2 X 0 0 2 X 1 0
3 1 1 1 3 0 0 1

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 D-Cube
 Collapsed truth table entry to characterize logic
 Use Roth’s 5-valued algebra
 Can change all D’s to D’s and D’s to D’s (do both)
 AND gate:

A B d
Gate InputsOutput D 1 D
Rows 1 & 3
AND A B d 1 D D
Reverse inputs
1 0 X 0 D D D
And two cubes
2 X 0 0 D D D
Interchange D and D
3 1 1 1 1 D D
D 1 D

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 D-Cube NOR gate

A B d
Gate Inputs Output D 0 D
Rows 1 & 3
NOR d e F 0 D D
Reverse inputs
1 1 X 0 D D D
NOR two cubes
2 X 1 0 D D D
Interchange D and D
3 0 0 1 0 D D
D 0 D

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Primitive D-Cube of Failure
 Models circuit faults:
 Stuck-at-0
 Stuck-at-1
 Bridging fault (short circuit)
 AND Output sa0: “1 1 D”
 AND Output sa1: “0 X D ”
“X 0 D ”

 Wire sa0: “D”

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Implication Procedure
1. Model fault with appropriate primitive D-
cube of failure (PDF)
2. Select propagation D-cubes to propagate
fault effect to a circuit output (D-drive
procedure)
3. Select singular cover cubes to justify internal
circuit signals (Consistency procedure)

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Example 1
Inputs Output
A B C F
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

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Singular Cover & D-Cubes
A B C d e F
1 1 1
0 0
0 0
1 1 0
0 1
0 1
1 0  Singular cover – Used for
1 0 justifying lines
0 0 1
D 1 D
1 D D
D D D  Propagation D-cubes –
D 1 D Conditions under which
1 D D difference between
D D D
D 0 D good/failing machines
0 D D propagates
D D D
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Fault d sa0

Step A B C d e F Cube type

1 1 1 D PDF of AND gate

2 D 0 D Prop. D-cube for NOR

3 1 1 0 Sing. Cover of NAND

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Example 2 Fault A sa0
 Step 1 – D-Drive – Set A = 1

D
1 D

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Step 2 – Example 2
 Step 2 – D-Drive – Set f = 0

0
D D
1 D

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Step 3 – Example 2
 Step 3 – D-Drive – Set k = 1

1
D
0
D D
1 D

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Step 4 – Example 2
 Step 4 – Consistency – Set g = 1

1 1
D
0
D D
1 D

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Step 5 – Example 2
 Step 5 – Consistency – f = 0 Already set

1 1
D
0
D D
1 D

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Step 6 – Example 2
 Step 6 – Consistency – Set c = 0, Set e = 0

1 1
0 D
0
0
D D
1 D

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D-Chain Dies Example 2
 Step 7 – Consistency – Set B = 0
 Fault detected at PO, although D-Chain dies

X
1 1
0 D
0 0
0
D D
1 D

 Test cube: A, B, C, D, e, f, g, h, k, L
 Test Vector {X 0 0 1}
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D-Cube Table

 Test Vector DCBA = {X 0 0 1}

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Example 3 – Fault s sa1
 Primitive D-cube of Failure

D
sa1

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Example 3 – Step 2 s sa1
 Propagation D-cube for v

D
1 sa1 D
0

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Example 3 – Step 2 s sa1
 Forward & Backward Implications
0
1

1 1
1 D
1 sa1 D
0

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Example 3 – Step 3 s sa1
 Propagation D-cube for Z – test found!
0
1

1 1
1 D
1 sa1 D
0

D
D
1

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D-Cube Table s sa1

 Test Vector ABC = {1 1 1}

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Example 3 – Fault u sa1
 Primitive D-cube of Failure

sa1 D

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Example 3 – Step 2 u sa1
 Propagation D-cube for v

0 0

sa1
D
D

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Example 3 – Step 2 u sa1
 Forward and backward implications
1
1

0
0 1
0 0
0
sa1
D
D

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Inconsistent

 d = 0 and m = 1 cannot justify r = 1

(equivalence)
 Backtrack
 Remove B = 0 assignment

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D-Cube Table

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Example 3 – Backtrack
 Need alternate propagation D-cube for v

sa1 D

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Example 3 – Step 3 u sa1
 Propagation D-cube for v

1 0

sa1 D

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Example 3 – Step 4 u sa1
 Propagation D-cube for Z

1 1 0

sa1
D
D D
1

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Example 3 – Step 4 u sa1
 Propagation D-cube for Z and implications
0
1

1 1
1 1 0
0
0
sa1
D
D D
1

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D-Cube Table u sa1

 Test Vector ABC = {1 1 1}

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D-Algorithm – Top Level
1. Number all circuit lines in increasing
level order from PIs to POs;
2. Select a primitive D-cube of the fault to
be the test cube;
 Put logic outputs with inputs labeled as D
(D) onto the D-frontier;
3. D-drive ();
4. Consistency ();
5. return ();

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Thank you !!!

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