Chapter 5: Transistor Bias Circuits

A transistor must be properly biased in order to operate as an amplifier. DC biasing is used to

establish fixed dc values for the transistor currents and voltages called the dc operating point or
quiescent point (Q-point). In this chapter, several types of bias circuits are discussed. This
material lays the groundwork for the study of amplifiers, and other circuits that require proper
biasing.
5.1 The DC Operating Point
A transistor must be properly biased with a dc voltage in order to operate as a linear amplifier. A
dc operating point must be set so that signal variations at the input terminal are amplified and
accurately reproduced at the output terminal. When we bias a transistor, we establish the dc
voltage and current values. This means, for example, that at the dc operating point, 𝐼C and 𝑉CE
have specified values. The dc operating point is often referred to as the Q-point (quiescent point).
DC Bias
Bias establishes the dc operating point (Q-point) for proper linear operation of an amplifier. If
an amplifier is not biased with correct dc voltages on the input and output, it can go into saturation
or cutoff when an input signal is applied. Figure 5–1 shows the effects of proper and improper dc
biasing of an inverting amplifier. In part (a), the output signal is an amplified replica of the input
signal except that it is inverted, which means that it is 180° out of phase with the input. The
output signal swings equally above and below the dc bias level of the output, 𝑉DC(out) . Improper
biasing can cause distortion in the output signal, as illustrated in parts (b) and (c). Part (b)
illustrates limiting of the positive portion of the output voltage as a result of a Q-point (dc
operating point) being too close to cutoff. Part (c) shows limiting of the negative portion of the
output voltage as a result of a dc operating point being too close to saturation.

FIGURE 5–1: Examples of linear and nonlinear operation of an inverting amplifier (the triangle symbol).

131
Graphical Analysis The transistor in Figure 5–2(a) is biased with 𝑉CC and 𝑉BB to obtain certain
values of 𝐼B , 𝐼C , 𝐼E , and 𝑉CE . The collector characteristic curves for this particular transistor are
shown in Figure 5–2(b); we will use these curves to graphically illustrate the effects of dc bias.

FIGURE 5–2: A dc-biased transistor circuit with variable bias voltage (𝑉BB ) for generating the collector
characteristic curves shown in part (b).

In Figure 5–3, we assign three values to 𝐼B and observe what happens to 𝐼C and 𝑉CE . First, 𝑉BB is
adjusted to produce an 𝐼B of 200 𝜇A, as shown in Figure 5–3(a). Since 𝐼C = 𝛽DC 𝐼B , the collector
current is 20 mA, as indicated, and
𝑉CE = 𝑉CC − 𝐼C 𝑅C = 10 V − (20 mA)(220 Ω) = 10 V − 4.4 V = 5.6 V
This Q-point is shown on the graph of Figure 5–3(a) as 𝑄1 .
Next, as shown in Figure 5–3(b), 𝑉BB is increased to produce an 𝐼B of 300 𝜇A and an 𝐼C of 30
mA.
𝑉CE = 10 V − (30 mA)(220 Ω) = 10 V − 6.6 V = 3.4 V
The Q-point for this condition is indicated by 𝑄2 on the graph.
Finally, as in Figure 5–3(c), 𝑉BB is increased to give an 𝐼B of 400 𝜇A and an 𝐼C of 40 mA.
𝑉CE = 10 V − (40 mA)(220 Ω) = 10 V − 8.8 V = 1.2 V
𝑄3 is the corresponding Q-point on the graph.

132
 FIGURE 5–3: Illustration of Q-point adjustment.

DC Load Line The dc operation of a transistor circuit can be described graphically using a dc
load line. This is a straight line drawn on the characteristic curves from the saturation value where
𝐼C = 𝐼C(sat) on the y-axis to the cutoff value where 𝑉CE = 𝑉CC on the x-axis, as shown in Figure
133
5–4(a). The load line is determined by the external circuit (𝑉CC and 𝑅C ), not the transistor itself,
which is described by the characteristic curves.
In Figure 5–3, the equation for 𝐼C is
𝑉CC − 𝑉CE 𝑉CC 𝑉CE 𝑉CE 𝑉CC 1 𝑉CC
𝐼C = = − =− + = − ( ) 𝑉CE +
𝑅C 𝑅C 𝑅C 𝑅C 𝑅C 𝑅C 𝑅C
This is the equation of a straight line with a slope of −1⁄𝑅C , an x intercept of 𝑉CE = 𝑉CC , and a y
intercept of 𝑉CC ⁄𝑅C , which is 𝐼C(sat) .

FIGURE 5–4: The dc load line.

The point at which the load line intersects a characteristic curve represents the Q-point for that
particular value of 𝐼B . Figure 5– 4(b) illustrates the Q-point on the load line for each value of 𝐼B
in Figure 5–3.
Linear Operation The region along the load line including all points between saturation and
cutoff is generally known as the linear region of the transistor’s operation. As long as the
transistor is operated in this region, the output voltage is ideally a linear reproduction of the input.
Figure 5–5 shows an example of the linear operation of a transistor. AC quantities are indicated
by lowercase italic subscripts. Assume a sinusoidal voltage, 𝑉𝑖𝑛 , is superimposed on 𝑉BB , causing
the base current to vary sinusoidally 100 𝜇A above and below its Q-point value of 300 𝜇A. This,
in turn, causes the collector current to vary 10 mA above and below its Q-point value of 30 mA.
As a result of the variation in collector current, the collector-to-emitter voltage varies 2.2 V above
and below its Q-point value of 3.4 V. Point A on the load line in Figure 5–5 corresponds to the
positive peak of the sinusoidal input voltage. Point B corresponds to the negative peak, and point
Q corresponds to the zero value of the sine wave, as indicated. 𝑉CEQ , 𝐼CQ , and 𝐼BQ are dc Q-point
values with no input sinusoidal voltage applied.
134
 FIGURE 5–5: Variations in collector current and collector-to-emitter voltage as a result of a variation in base
current.

Waveform Distortion As previously mentioned, under certain input signal conditions the location
of the Q-point on the load line can cause one peak of the 𝑉𝑐𝑒 waveform to be limited or clipped,
as shown in parts (a) and (b) of Figure 5–6. In each case the input signal is too large for the Q-
point location and is driving the transistor into cutoff or saturation during a portion of the input
cycle. When both peaks are limited as in Figure 5–6(c), the transistor is being driven into both
saturation and cutoff by an excessively large input signal. When only the positive peak is limited,
the transistor is being driven into cutoff but not saturation. When only the negative peak is limited,
the transistor is being driven into saturation but not cutoff.

135
 FIGURE 5–6: Graphical load line illustration of a transistor being driven into saturation and/or cutoff.

EXAMPLE 5–1: Determine the Q-point for the circuit in Figure 5–7 and draw the dc load line.
Find the maximum peak value of base current for linear operation. Assume 𝛽DC = 200.

FIGURE 5–7

136
Solution The Q-point is defined by the values of 𝐼C and 𝑉CE .
𝑉BB − 𝑉BE 10 V − 0.7 V
𝐼B = = = 198 𝜇A
𝑅B 47 kΩ
𝐼C = 𝛽DC 𝐼B = (200)(198 𝜇A) = 39.6 mA
𝑉CE = 𝑉CC − 𝐼C 𝑅C = 20 V − (39.6 mA)(330 Ω) = 10 V − 13.07 V = 6.93 V
The Q-point is at 𝐼C = 39.6 mA and at 𝑉CE = 6.93 V.
Since 𝐼C(cutoff) = 0, we need to know 𝐼C(sat) to determine how much variation in collector current
can occur and still maintain linear operation of the transistor.
𝑉CC 20 V
𝐼C(sat) = = = 60.6 mA
𝑅C 330 Ω
The dc load line is graphically illustrated in Figure 5–8, showing that before saturation is reached,
𝐼C can increase an amount ideally equal to
𝐼C(sat) − 𝐼CQ = 60.6 mA − 39.6 mA = 21.0 mA
However, 𝐼C can decrease by 39.6 mA before cutoff (𝐼C = 0) is reached. Therefore, the limiting
excursion is 21 mA because the Q-point is closer to saturation than to cutoff. The 21 mA is the
maximum peak variation of the collector current. Actually, it would be slightly less in practice
because 𝑉CE(sat) is not quite zero.

FIGURE 5–8

Determine the maximum peak variation of the base current as follows:

𝐼𝑐(𝑝𝑒𝑎𝑘) 21 mA
𝐼𝑏(𝑝𝑒𝑎𝑘) = = = 105 𝜇A
𝛽DC 200
Related Problem Find the Q-point for the circuit in Figure 5–7, and determine the maximum peak
value of base current for linear operation for the following circuit values: 𝛽DC = 100, 𝑅C =
1.0 kΩ, and 𝑉CC = 24 V.

137
5.2 Voltage-Divider Bias
We will now study a method of biasing a transistor for linear operation using a single-source
resistive voltage divider. This is the most widely used biasing method. Four other methods are
covered in Section 5–3.
Up to this point a separate dc source, 𝑉BB , was used to bias the base-emitter junction because it
could be varied independently of 𝑉CC and it helped to illustrate transistor operation. A more
practical bias method is to use 𝑉CC as the single bias source, as shown in Figure 5–9. To simplify
the schematic, the battery symbol is omitted and replaced by a line termination circle with a
voltage indicator (𝑉CC ) as shown.

FIGURE 5–9: Voltage-divider bias.

A dc bias voltage at the base of the transistor can be developed by a resistive voltage-divider that
consists of 𝑅1 and 𝑅2 , as shown in Figure 5–9. 𝑉CC is the dc collector supply voltage. Two current
paths are between point A and ground: one through 𝑅2 and the other through the base-emitter
junction of the transistor and 𝑅E .
Generally, voltage-divider bias circuits are designed so that the base current is much smaller than
the current (𝐼2 ) through 𝑅2 in Figure 5–9. In this case, the voltage-divider circuit is very
straightforward to analyze because the loading effect of the base current can be ignored. A voltage
divider in which the base current is small compared to the current in 𝑅2 is said to be a stiff voltage
divider because the base voltage is relatively independent of different transistors and temperature
effects.
To analyze a voltage-divider circuit in which 𝐼B is small compared to 𝐼2 , first calculate the voltage
on the base using the unloaded voltage-divider rule:
138
 𝑹𝟐
𝑽𝐁 ≅ ( )𝑽 Equation 5– 1
𝑹𝟏 + 𝑹𝟐 𝐂𝐂
Once we know the base voltage, we can find the voltages and currents in the circuit, as follows:
𝑽𝐄 = 𝑽𝐁 − 𝑽𝐁𝐄 Equation 5– 2
and
𝑽𝐄
𝑰𝐂 ≅ 𝑰𝐄 = Equation 5– 3
𝑹𝐄
Then,
𝑽𝐂 = 𝑽𝐂𝐂 − 𝑰𝐂 𝑹𝐂 Equation 5– 4
Once we know 𝑉C and 𝑉E , you can determine 𝑉CE .
𝑉CE = 𝑉C − 𝑉E
EXAMPLE 5–2: Determine 𝑉CE and 𝐼C in the stiff voltage-divider biased transistor circuit of
Figure 5–10 if 𝛽DC = 100.

FIGURE 5–10

Solution The base voltage is

𝑅2 5.6 kΩ
𝑉B ≅ ( ) 𝑉CC = ( ) 10 V = 3.59 V
𝑅1 + 𝑅2 15.6 kΩ
So,
𝑉E = 𝑉B − 𝑉BE = 3.59 V − 0.7 V = 2.89 V
And
𝑉E 2.89 V
𝐼E = = = 5.16 mA
𝑅E 560 Ω
139
Therefore,
𝐼C ≅ 𝐼E = 5.16 mA
And
𝑉C = 𝑉CC − 𝐼C 𝑅C = 10 V − (5.16 mA)(1.0 kΩ) = 4.84 V
𝑉CE = 𝑉C − 𝑉E = 4.84 V − 2.89 V = 1.95 V
Related Problem If the voltage divider in Figure 5–10 was not stiff, how would 𝑉B be affected?
The basic analysis developed in Example 5–2 is all that is needed for most voltage-divider
circuits, but there may be cases where we need to analyze the circuit with more accuracy. Ideally,
a voltage-divider circuit is stiff, which means that the transistor does not appear as a significant
load. All circuit design involves trade-offs; and one trade-off is that stiff voltage dividers require
smaller resistors, which are not always desirable because of potential loading effects on other
circuits and added power requirements. If the circuit designer wanted to raise the input resistance,
the divider string may not be stiff; and more detailed analysis is required to calculate circuit
parameters. To determine if the divider is stiff, we need to examine the dc input resistance looking
in at the base as shown in Figure 5–11.

FIGURE 5–11: Voltage divider with load.

140
Loading Effects of Voltage-Divider Bias
DC Input Resistance at the Transistor Base The dc input resistance of the transistor is
proportional to 𝛽DC so it will change for different transistors. When a transistor is operating in its
linear region, the emitter current (𝐼E ) is 𝛽DC 𝐼B . When the emitter resistor is viewed from the base
circuit, the resistor appears to be larger than its actual value because of the dc current gain in the
transistor. That is, 𝑅IN(BASE) = 𝑉B ⁄𝐼B = 𝑉B ⁄(𝐼E ⁄𝛽DC ).
𝜷𝐃𝐂 𝑽𝐁
𝑹𝐈𝐍(𝐁𝐀𝐒𝐄) = Equation 5– 5
𝑰𝐄
This is the effective load on the voltage divider illustrated in Figure 5–11.
We can quickly estimate the loading effect by comparing 𝑹𝐈𝐍(𝐁𝐀𝐒𝐄) to the resistor 𝑹𝟐 in the
voltage divider. As long as 𝑹𝐈𝐍(𝐁𝐀𝐒𝐄) is at least ten times larger than 𝑹𝟐 , the loading effect
will be 10% or less and the voltage divider is stiff. If 𝑹𝐈𝐍(𝐁𝐀𝐒𝐄) is less than ten times 𝑹𝟐 , it
should be combined in parallel with 𝑹𝟐 .
EXAMPLE 5–3: Determine the dc input resistance looking in at the base of the transistor in
Figure 5–12. 𝛽DC = 125 and 𝑉B = 4 V.

FIGURE 5–12

Solution
𝑉BE = 𝑉B − 𝑉E
0.7 V = 𝑉B − 𝐼E 𝑅E
𝑉B − 0.7 V 4 V − 0.7 V
𝐼E = = = 3.3 mA
𝑅E 1.0 kΩ
𝛽DC 𝑉B 125 V(4 V)
𝑅IN(BASE) = = = 152 kΩ
𝐼E 3.3 mA
Related Problem What is 𝑅IN(BASE) in Figure 5–12 if 𝛽DC = 60 and 𝑉B = 2 V?
141
Thevenin’s Theorem Applied to Voltage-Divider Bias
To analyze a voltage-divider biased transistor circuit for base current loading effects, we will
apply Thevenin’s theorem to evaluate the circuit. First, let’s get an equivalent base-emitter circuit
for the circuit in Figure 5–13(a) using Thevenin’s theorem. Looking out from the base terminal,
the bias circuit can be redrawn as shown in Figure 5–13(b). Apply Thevenin’s theorem to the
circuit left of point A, with 𝑉CC replaced by a short to ground and the transistor disconnected from
the circuit. The voltage at point A with respect to ground is
𝑅2
𝑉TH = ( )𝑉
𝑅1 + 𝑅2 CC
and the resistance is
𝑅1 𝑅2
𝑅TH =
𝑅1 + 𝑅2

FIGURE 5–13: Thevenizing the bias circuit.

The Thevenin equivalent of the bias circuit, connected to the transistor base, is shown in the beige
box in Figure 5–13(c). Applying Kirchhoff’s voltage law around the equivalent base-emitter loop
gives
𝑉TH − 𝑉𝑅TH − 𝑉BE − 𝑉𝑅E = 0

Substituting, using Ohm’s law, and solving for 𝑉TH ,

𝑉TH = 𝐼B 𝑅TH + 𝑉BE + 𝐼E 𝑅E
Substituting
142
 𝐼E
𝐼B =
𝛽DC
So,
𝑉TH = 𝐼E (𝑅E + 𝑅TH ⁄𝛽DC ) + 𝑉BE
Then solving for 𝐼E ,
𝑽𝐓𝐇 − 𝑽𝐁𝐄
𝑰𝐄 = Equation 5– 6
𝑹𝐄 + 𝑹𝐓𝐇 ⁄𝜷𝐃𝐂
If 𝑅TH ⁄𝛽DC is small compared to 𝑅E , the result is the same as for an unloaded voltage divider.
Voltage-divider bias is widely used because reasonably good bias stability is achieved with a
single supply voltage.
Voltage-Divider Biased PNP Transistor As we know, a pnp transistor requires bias polarities
opposite to the npn. This can be accomplished with a negative collector supply voltage, as in
Figure 5–14(a), or with a positive emitter supply voltage, as in Figure 5–14(b).

FIGURE 5–14: Voltage-divider biased pnp transistor.

In a schematic, the pnp is often drawn upside down so that the supply voltage is at the top of the
schematic and ground at the bottom, as in Figure 5–14(c).
The analysis procedure is the same as for an npn transistor circuit using Thevenin’s theorem and
Kirchhoff’s voltage law, as demonstrated in the following steps with reference to Figure 5–14.
For Figure 5–14(a), applying Kirchhoff’s voltage law around the base-emitter circuit gives
𝑉TH + 𝐼B 𝑅TH − 𝑉BE + 𝐼E 𝑅E = 0

143
By Thevenin’s theorem,
𝑅2
𝑉TH = ( )𝑉
𝑅1 + 𝑅2 CC
𝑅1 𝑅2
𝑅TH =
𝑅1 + 𝑅2
The base current is
𝐼E
𝐼B =
𝛽DC
The equation for 𝐼E is
−𝑽𝐓𝐇 + 𝑽𝐁𝐄
𝑰𝐄 = Equation 5– 7
𝑹𝐄 + 𝑹𝐓𝐇 ⁄𝜷𝐃𝐂
For Figure 5–14(b), the analysis is as follows:
−𝑉TH + 𝐼B 𝑅TH − 𝑉BE + 𝐼E 𝑅E − 𝑉EE = 0
𝑅1
𝑉TH = ( )𝑉
𝑅1 + 𝑅2 EE
𝑅1 𝑅2
𝑅TH =
𝑅1 + 𝑅2
𝐼E
𝐼B =
𝛽DC
The equation for 𝐼E is
𝑽𝐓𝐇 + 𝑽𝐁𝐄 − 𝑉EE
𝑰𝐄 = Equation 5– 8
𝑹𝐄 + 𝑹𝐓𝐇 ⁄𝜷𝐃𝐂
EXAMPLE 5–4: Find 𝐼𝐶 and 𝑉EC for the pnp transistor circuit in Figure 5–15.

FIGURE 5–15

144
Solution This circuit has the configuration of Figures 5–14(b) and (c). Apply Thevenin’s theorem.
𝑅1 22 kΩ
𝑉TH = ( ) 𝑉EE = ( ) 10 V = (0.688)10 V = 6.88 V
𝑅1 + 𝑅2 22 kΩ + 10 kΩ
𝑅1 𝑅2 (22 kΩ)(10 kΩ)
𝑅TH = = = 6.88 kΩ
𝑅1 + 𝑅2 22 kΩ + 10 kΩ
Use Equation 5–8 to determine 𝐼E .
𝑉TH + 𝑉BE − 𝑉EE 6.88 V + 0.7 V − 10 V −2.42 V
𝐼E = = = = −2.31 mA
𝑅E + 𝑅TH ⁄𝛽DC 1.0 kΩ + 6.88 kΩ⁄150 1.0 kΩ + 45.9 Ω
The negative sign on 𝐼E indicates that the assumed current direction in the Kirchhoff’s analysis is
opposite from the actual current direction. From 𝐼E , we can determine 𝐼C and 𝑉EC as follows:
𝐼C = 𝐼E = 2.31 mA
𝑉C = 𝐼C 𝑅C = (2.31 mA)(2.2 kΩ) = 5.08 V
𝑉E = 𝑉EE − 𝑉𝑅E = 𝑉EE − 𝐼E 𝑅E = 10 V − (2.31 mA)(1.0 kΩ) = 7.68 V

𝑉EC = 𝑉E − 𝑉C = 7.68 V − 5.08 V = 2.6 V

Related Problem Determine 𝑅IN(BASE) for Figure 5–15.

EXAMPLE 5–5: Find 𝐼C and 𝑉CE for a pnp transistor circuit with these values:𝑅1 = 68 kΩ, 𝑅2 =
47 kΩ, 𝑅C = 1.8 kΩ, 𝑅E = 2.2 kΩ, 𝑉CC = −6 V, and 𝛽DC = 75. Refer to Figure 5–14(a), which
shows the schematic with a negative supply voltage.
Solution Apply Thevenin’s theorem.
𝑅2 47 kΩ
𝑉TH = ( ) 𝑉CC = ( ) (−6 V) = (0.409)(−6 V) = −2.45 V
𝑅1 + 𝑅2 68 kΩ + 47 kΩ
𝑅1 𝑅2 (68 kΩ)(47 kΩ)
𝑅TH = = = 27.8 kΩ
𝑅1 + 𝑅2 68 kΩ + 47 kΩ
Use Equation 5–7 to determine 𝐼E .

−𝑉TH + 𝑉BE −(−2.45 V) + 0.7 V 3.15 V

𝐼E = = = = 1.23 mA
𝑅E + 𝑅TH ⁄𝛽DC 2.2 kΩ + 27.8 kΩ⁄75 2.2 kΩ + 371 Ω
From 𝐼E , we can determine 𝐼C and 𝑉CE as follows:
145
 𝐼C = 𝐼E = 1.23 mA
𝑉C = −𝑉CC − 𝑉𝑅C = −𝑉CC + 𝐼C 𝑅C = −6 V + (1.23 mA)(1.8 kΩ) = −3.79 V

𝑉E = 𝑉EE − 𝑉𝑅E = 𝑉EE − 𝐼E 𝑅E = 0 − (1.23 mA)(2.2 kΩ) = −2.71 V

𝑉CE = 𝑉C − 𝑉E = −3.79 V − (−2.71 V) = −1.08 V

Related Problem What value of 𝛽DC is required in this example in order to neglect 𝑅IN(BASE) ) in
keeping with the basic ten-times rule for a stiff voltage divider?

5.3 Other Bias Methods

In this section, four additional methods for dc biasing a transistor circuit are discussed. Although
these methods are not as common as voltage-divider bias, we should be able to recognize them
when we see them and understand the basic differences.
Emitter Bias
Emitter bias provides excellent bias stability in spite of changes in 𝛽 or temperature. It uses both
a positive and a negative supply voltage. To obtain a reasonable estimate of the key dc values in
an emitter-biased circuit, analysis is quite easy. In an npn circuit, such as shown in Figure 5–17,
the small base current causes the base voltage to be slightly below ground. The emitter voltage is
one diode drop less than this. The combination of this small drop across 𝑅B and 𝑉BE forces the
emitter to be at approximately −1 V. Using this approximation, we can obtain the emitter current
as
−𝑉EE − 1 V
𝐼E =
𝑅E
𝑉EE is entered as a negative value in this equation.
We can apply the approximation that 𝐼C ≅ 𝐼E to calculate the collector voltage.
𝑉C = 𝑉CC − 𝑉𝑅C = 𝑉CC − 𝐼C 𝑅C

The approximation that 𝑉E = −1 V is useful for troubleshooting because we won’t need to

perform any detailed calculations. As in the case of voltage-divider bias, there is a more rigorous
calculation for cases where we need a more exact result.
The approximation that 𝑉E = −1 V and the neglect of 𝛽DC may not be accurate enough for design
work or detailed analysis. In this case, Kirchhoff’s voltage law can be applied as follows to
develop a more detailed formula for 𝐼E . Kirchhoff’s voltage law applied around the base-emitter

146
circuit in Figure 5–17(a), which has been redrawn in part (b) for analysis, gives the following
equation:
𝑉EE + 𝑉𝑅B + 𝑉BE + 𝑉𝑅E = 0
Substituting, using Ohm’s law,
𝑉EE + 𝐼B 𝑅B + 𝑉BE + 𝐼E 𝑅E = 0
Substituting 𝐼B ≅ 𝐼E ⁄𝛽DC for and transposing 𝑉EE ,
𝐼E
( ) 𝑅 + 𝐼E 𝑅E + 𝑉BE = −𝑉EE
𝛽DC B
Factoring out 𝐼E and solving for 𝐼E ,
−𝑽𝐄𝐄 − 𝑽𝐁𝐄
𝑰𝐄 = Equation 5– 9
𝑹𝐄 + 𝑹𝐁 ⁄𝜷𝐃𝐂
Voltages with respect to ground are indicated by a single subscript. The emitter voltage with
respect to ground is
𝑉E = 𝑉EE + 𝑉𝑅E = 𝑉EE + 𝐼E 𝑅E
The base voltage with respect to ground is
𝑉B = 𝑉E + 𝑉BE
The collector voltage with respect to ground is
𝑉C = 𝑉CC − 𝑉𝑅C = 𝑉CC − 𝐼C 𝑅C

FIGURE 5–17: An npn transistor with emitter bias. Polarities are reversed for a pnp transistor. Single subscripts
indicate voltages with respect to ground.

147
EXAMPLE 5–6: Calculate 𝐼E and 𝑉CE for the circuit in Figure 5–16 using the approximations
𝑉E ≅ −1 V and 𝐼C ≅ 𝐼E .

FIGURE 5–16

Solution
𝑉E ≅ −1 V
−𝑉EE − 1 V −(−15 V) − 1 V 14 V
𝐼E = = = = 1.4 mA
𝑅E 10 kΩ 10 kΩ
𝑉C = 𝑉CC − 𝑉𝑅C = 𝑉CC − 𝐼C 𝑅C = +15 V − (1.4 mA)(4.7 kΩ) = 8.4 V

𝑉CE = 𝑉C − 𝑉E = 8.4 V − (−1 V) = 9.4 V

Related Problem If 𝑉CE is changed to −12 V, what is the new value of 𝑉CE ?

EXAMPLE 5–7: Determine how much the Q-point (𝐼C , 𝑉CE ) for the circuit in Figure 5–18 will
change if 𝛽DC increases from 100 to 200 when one transistor is replaced by another.

FIGURE 5–18

148
Solution For 𝛽DC = 100,
−𝑉EE − 𝑉BE −(−15V) − 0.7 V
𝐼C(1) ≅ 𝐼E = = = 1.37 mA
𝑅E + 𝑅B ⁄𝛽DC 10 kΩ + 47 kΩ⁄100
𝑉C = 𝑉CC − 𝐼C(1) 𝑅C = 15 V − (1.37 mA)(4.7 kΩ) = 8.56 V

𝑉E = 𝑉EE + 𝐼E 𝑅E = −15 V + (1.37 mA)(10 kΩ) = −1.3 V

Therefore,
𝑉CE(1) = 𝑉C − 𝑉E = 8.56 V − (−1.3) = 9.83 V

For 𝛽DC = 200,

−𝑉EE − 𝑉BE −(−15V) − 0.7 V
𝐼C(2) ≅ 𝐼E = = = 1.38 mA
𝑅E + 𝑅B ⁄𝛽DC 10 kΩ + 47 kΩ⁄200
𝑉C = 𝑉CC − 𝐼C(2) 𝑅C = 15 V − (1.38 mA)(4.7 kΩ) = 8.51 V

𝑉E = 𝑉EE + 𝐼E 𝑅E = −15 V + (1.38 mA)(10 kΩ) = −1.2 V

Therefore,
𝑉CE(2) = 𝑉C − 𝑉E = 8.51 V − (−1.2) = 9.71 V

The percent change in 𝐼C as 𝛽DC changes from 100 to 200 is

𝐼C(2) − 𝐼C(1) 1.38 mA − 1.37 mA
%∆𝐼C = ( ) 100% = ( ) 100% = 0.730%
𝐼C(1) 1.37 mA

The percent change in 𝑉CE is

𝑉CE(2) − 𝑉CE(1) 9.71 V − 9.83 V
%∆𝑉CE = ( ) 100% = ( ) 100% = −1.22%
𝑉CE(1) 9.83 V

Related Problem Determine the Q-point in Figure 5–18 if 𝛽DC increases to 300.
Base Bias
This method of biasing is common in switching circuits. Figure 5–19 shows a base-biased
transistor. The analysis of this circuit for the linear region shows that it is directly dependent on
𝛽DC . Starting with Kirchhoff’s voltage law around the base circuit,
𝑉CC − 𝑉𝑅B − 𝑉BE = 0

Substituting 𝐼B 𝑅B for 𝑉𝑅B we get

149
 𝑉CC − 𝐼B 𝑅B − 𝑉BE = 0
Then solving for 𝐼B ,
𝑉CC − 𝑉BE
𝐼B =
𝑅B
Kirchhoff’s voltage law applied around the collector circuit in Figure 5–19 gives the following
equation:
𝑉CC − 𝐼C 𝑅𝐶 − 𝑉CE = 0
Solving for 𝑉CE ,
𝑉CE = 𝑉CC − 𝐼C 𝑅C Equation 5– 10
Substituting the expression for 𝐼B into the formula 𝐼C = 𝛽DC 𝐼B yields
𝑉CC − 𝑉BE
𝐼C = 𝛽DC ( ) Equation 5– 11
𝑅B

FIGURE 5–19: Base bias.

Q-Point Stability of Base Bias Notice that Equation 5–11 shows that 𝐼C is dependent on𝛽DC . The
disadvantage of this is that a variation in 𝛽DC causes 𝐼C and, as a result, 𝑉CE to change, thus
changing the Q-point of the transistor. This makes the base bias circuit extremely beta-dependent
and unpredictable.
Recall that 𝛽DC varies with temperature and collector current. In addition, there is a large spread
of 𝛽DC values from one transistor to another of the same type due to manufacturing variations.
For these reasons, base bias is rarely used in linear circuits but is discussed here so we will be
familiar with it.
150
EXAMPLE 5–8: Determine how much the Q-point (𝐼C , 𝑉CE ) for the circuit in Figure 5–20 will
change over a temperature range where 𝛽DC increases from 100 to 200.

FIGURE 5–20

Solution
For 𝛽DC = 100,
𝑉CC − 𝑉BE 12 V − 0.7 V
𝐼C(1) = 𝛽DC ( ) = 100 ( ) = 3.42 mA
𝑅B 330 kΩ
𝑉CE(1) = 𝑉CC − 𝐼C(1) 𝑅C = 12 V − (3.42 mA)(560 Ω) = 10.1 V

For 𝛽DC = 200,

𝑉CC − 𝑉BE 12 V − 0.7 V
𝐼C(2) = 𝛽DC ( ) = 200 ( ) = 6.84 mA
𝑅B 330 kΩ
𝑉CE(2) = 𝑉CC − 𝐼C(2) 𝑅C = 12 V − (6.84 mA)(560 Ω) = 8.17 V

The percent change in 𝐼C as 𝛽DC changes from 100 to 200 is

𝐼C(2) − 𝐼C(1) 6.84 mA − 3.42 mA
%∆𝐼C = ( ) 100% = ( ) 100% = 100% (an increase)
𝐼C(1) 3.42 mA

The percent change in 𝑉CE is

𝑉CE(2) − 𝑉CE(1) 8.17 V − 10.1 V
%∆𝑉CE = ( ) 100% = ( ) 100% = −19.1% (a decrease)
𝑉CE(1) 10.1 V

As we can see, the Q-point is very dependent on 𝛽DC in this circuit and therefore makes the base
bias arrangement very unreliable. Consequently, base bias is not normally used if linear operation
is required. However, it can be used in switching applications.
Related Problem Determine 𝐼C if 𝛽DC increases to 300.

151
Emitter-Feedback Bias
If an emitter resistor is added to the base-bias circuit in Figure 5–20, the result is emitter-feedback
bias, as shown in Figure 5–21. The idea is to help make base bias more predictable with negative
feedback, which negates any attempted change in collector current with an opposing change in
base voltage. If the collector current tries to increase, the emitter voltage increases, causing an
increase in base voltage because 𝑉B = 𝑉E + 𝑉BE . This increase in base voltage reduces the voltage
across 𝑅B , thus reducing the base current and keeping the collector current from increasing. A
similar action occurs if the collector current tries to decrease. While this is better for linear circuits
than base bias, it is still dependent on 𝛽DC and is not as predictable as voltage-divider bias. To
calculate 𝐼E , we can write Kirchhoff’s voltage law (KVL) around the base circuit.
−𝑉CC + 𝐼B 𝑅B + 𝑉BE + 𝐼E 𝑅E = 0
Substituting 𝐼E ⁄𝛽DC for 𝐼B , we can see that 𝐼E is still dependent on 𝛽DC .
𝑽𝐂𝐂 − 𝑽𝐁𝐄
𝑰𝐄 = Equation 5– 12
𝑹𝐄 + 𝑹𝐁 ⁄𝜷𝐃𝐂

FIGURE 5–21: Emitter-feedback bias.

EXAMPLE 5–9: The base-bias circuit from Example 5–8 is converted to emitter-feedback bias
by the addition of a 1 kΩ emitter resistor. All other values are the same, and a transistor with a
𝛽DC = 100 is used. Determine how much the Q-point will change if the first transistor is replaced
with one having a 𝛽DC = 200. Compare the results to those of the base-bias circuit.
Solution
For 𝛽DC = 100,
𝑉CC − 𝑉BE 12 V − 0.7 V
𝐼C(1) = 𝐼E = = = 2.63 mA
𝑅E + 𝑅B ⁄𝛽DC 1 kΩ + 330 kΩ⁄100

152
 𝑉CE(1) = 𝑉CC − 𝐼C(1) (𝑅C + 𝑅E ) = 12 V − (2.63 mA)(560 Ω + 1 kΩ) = 7.90 V

For 𝛽DC = 200,

𝑉CC − 𝑉BE 12 V − 0.7 V
𝐼C(2) = 𝐼E = = = 4.26 mA
𝑅E + 𝑅B ⁄𝛽DC 1 kΩ + 330 kΩ⁄200
𝑉CE(2) = 𝑉CC − 𝐼C(2) (𝑅C + 𝑅E ) = 12 V − (4.26 mA)(560 Ω + 1 kΩ) = 5.35 V

The percent change in 𝐼C is

𝐼C(2) − 𝐼C(1) 4.26 mA − 2.63 mA
%∆𝐼C = ( ) 100% = ( ) 100% = 62.0%
𝐼C(1) 2.63 mA

𝑉CE(2) − 𝑉CE(1) 5.35 V − 7.90 V

%∆𝑉CE = ( ) 100% = ( ) 100% = −32.3%
𝑉CE(1) 7.90 V
Although the emitter-feedback bias significantly improved the stability of the bias for a change
in 𝛽DC compared to base bias, it still does not provide a reliable Q-point.
Related Problem Determine 𝐼C if a transistor with 𝛽DC = 300 is used in the circuit.

Collector-Feedback Bias
In Figure 5–22, the base resistor 𝑅B is connected to the collector rather than to 𝑉CC , as it was in
the base bias arrangement discussed earlier. The collector voltage provides the bias for the base-
emitter junction. The negative feedback creates an “offsetting” effect that tends to keep the Q-
point stable. If 𝐼C tries to increase, it drops more voltage across 𝑅C , thereby causing 𝑉C to decrease.
When 𝑉C decreases, there is a decrease in voltage across 𝑅B , which decreases 𝐼B . The decrease in
𝐼B produces less 𝐼C which, in turn, drops less voltage across 𝑅C and thus offsets the decrease in
𝑉C .

FIGURE 5–22: Collector-feedback bias.

153
Analysis of a Collector-Feedback Bias Circuit By Ohm’s law, the base current can be expressed
as
𝑉C − 𝑉BE
𝐼B =
𝑅B
Let’s assume that 𝐼C ≫ 𝐼B . The collector voltage is
𝑉C ≅ 𝑉CC − 𝐼C 𝑅C
Also,
𝐼C
𝐼B =
𝛽DC
Substituting for 𝑉C in the equation 𝐼B = (𝑉C − 𝑉BE )⁄𝑅B ,
𝐼C 𝑉CC − 𝐼C 𝑅C − 𝑉BE
=
𝛽DC 𝑅B
The terms can be arranged so that
𝐼C 𝑅B
+ 𝐼C 𝑅C = 𝑉CC − 𝑉BE
𝛽DC
Then you can solve for 𝐼C as follows:
𝑅B
𝐼C (𝑅C + ) = 𝑉CC − 𝑉BE
𝛽DC
𝑉CC − 𝑉BE
𝐼C = Equation 5– 13
𝑅C + 𝑅B ⁄𝛽DC
Since the emitter is ground, 𝑉CE = 𝑉C .
𝑉CE = 𝑉CC − 𝐼C 𝑅C Equation 5– 14
Q-Point Stability Over Temperature Equation 5–13 shows that the collector current is dependent
to some extent on 𝛽DC and 𝑉BE . This dependency, of course, can be minimized by making 𝑅C ≫
𝑅B ⁄𝛽DC and 𝑉CC ≫ 𝑉BE . An important feature of collector-feedback bias is that it essentially
eliminates the 𝛽DC and 𝑉BE dependency even if the stated conditions are met.
As we have learned, 𝛽DC varies directly with temperature, and 𝑉BE varies inversely with
temperature. As the temperature goes up in a collector-feedback circuit, 𝛽DC goes up and 𝑉BE
goes down. The increase in 𝛽DC acts to increase 𝐼C . The decrease in 𝑉BE acts to increase 𝐼B which,
in turn also acts to increase 𝐼C . As 𝐼C tries to increase, the voltage drop across 𝑅C also tries to
154
increase. This tends to reduce the collector voltage and therefore the voltage across 𝑅B , thus
reducing 𝐼B and offsetting the attempted increase in 𝐼C and the attempted decrease in 𝑉C . The
result is that the collector-feedback circuit maintains a relatively stable Q-point. The reverse
action occurs when the temperature decreases.
EXAMPLE 5–10: Calculate the Q-point values (𝐼C and 𝑉CE ) for the circuit in Figure 5–23.

FIGURE 5–23

Solution Using Equation 5–13, the collector current is

𝑉CC − 𝑉BE 10 V − 0.7 V
𝐼C = = = 788 𝜇A
𝑅C + 𝑅B ⁄𝛽DC 10 kΩ + 180 kΩ⁄100
Using Equation 5–14, the collector-to-emitter voltage is
𝑉CE = 𝑉CC − 𝐼C 𝑅C = 10 V − (788 𝜇A)(10 kΩ) = 2.12 V
Related Problem Calculate the Q-point values in Figure 5–23 for 𝛽DC = 200 and determine the
percent change in the Q-point from 𝛽DC = 100 to 𝛽DC = 200.

155