EED102: Semiconductor
Devices
Dr. Venkatnarayan Hariharan
Dept of Electrical Engg., Shiv Nadar Univ., Delhi NCR
EED102 - VH - L1 0
Course Overview
• Course handout, grading scheme, etc
• What students will learn from this course (First ask the students!)
• Broad outline of course contents:
• Fundamentals of semiconductor materials
• Energy bands, Electrons and holes as charge carriers
• Excess minority carriers
• Carrier transport mechanisms
• Semiconductor junctions
• MOS capacitors (Metal Oxide Semiconductor)
• Field Effect Transistors (FET)
• Bipolar Junction Transistor (BJT)
• Integrated Circuits (ICs)
• Power semiconductor devices
EED102 - VH - L1 1
Semiconductor Devices
• Building blocks of today’s electronic gadgets
• Laptops
• Mobile phones
• TVs (smart or otherwise!)
• Automobiles (ECUs, ADAS, AVs, etc)
• USB pen drive
• LED (Light Emitting Diode)
• The list goes on …
• Form factor:
• Integrated circuits (IC): VLSI
• Discrete devices
EED102 - VH - L1 2
Broad Learnings from this Course
• What are the electrical characteristics of key
semiconductor devices
• What happens when some voltage is applied at some
terminals
• Why these devices exhibit these characteristics
• The exact physics of what happens inside them, that
make them do the things they do
• Sample applications of such devices
EED102 - VH - L1 3
Why Integrated Circuits
• More transistors on die => more functionality
• Lower power
• Good matching (especially important for analog circuits)
• Low cost
• For integrated circuits, before packaging stage is reached, the process cost is amortized
over many xtors in many dies in many wafers in many lots across many customers (in
case of foundry model). For example: Today’s digital designs have about 50M xtors (ie.
50x106 transistors) per mm2
• For same circuit made using discrete components, every part is packaged before use
• Other benefits of integrated circuit versus making using discrete components:
• Better reliability when an IC chip is surface mounted on a PCB
• Lesser weight when an IC chip is surface mounted on a PCB
EED102 - VH - L1 4
Moore’s Law
Typical size-related statistics in 2020:
• GPU die size (typically bigger than
CPU): 600 𝑚𝑚2 (think of it as 2 cm x 3
cm die)
• Xtor count in such a die: 30 billion
(30 x 109 )
• => Xtor density: 50 million per 𝑚𝑚2
EED102 - VH - L1 5
Integrated Circuits
1960: First planar IC (by Fairchild
Semiconductors Inc), had about 4 xtors
Source: https://www.computerhistory.org/revolution/digital-logic/12/329
What a wafer fab looks like
Source: https://fortune.com/2016/06/11/raytheon-next-gen-chips/
2007: Intel fab engineer holding a 300 mm
wafer with 45 nm test chips
Source: https://en.wikichip.org/wiki/45_nm_lithography_process
EED102 - VH - L1 6
Semiconductors: From Sand to Chip
• Key enablers:
• Process:
• Photolithography (immersion, dual/quad patterning, etc)
• Ion implantation and/or diffusion
• Etching (dry, wet, plasma, etc)
• Epitaxial growth
• ALD (atomic layer deposition)
• Metallization (evaporation, (dual)damascene, etc)
• CMP (chemical mechanical polishing)
• Tools
• TCAD tools (process simulation, device simulation, EM field-solvers for on-chip interconnects)
• EDA/CAD tools: Circuit simulation, parasitic extraction, etc. And in the case of digital circuits:
HDL simulation, synthesis, place and route, static timing analysis, reliability analysis, etc
• Each of the above are active areas of research to varying extents
EED102 - VH - L1 7
Most Impactful Device: MOSFET
• MOSFET: Metal Oxide Semiconductor Field Effect
Transistor (Xtor)
Common Schematic Symbol (there are several other symbols in use, depending on use in analog
versus digital, enhancement versus depletion mode, etc)
EED102 - VH - L1 8
Cross-section: Planar N-MOSFET
Schematic cross-section Schematic cross-section that’s a bit more realistic
EED102 - VH - L1 9
Typical Layout and Other Views
Chip-design activity final deliverables: Layout polygons
for each layer that help make the masks for that layer. In
picture below, each color is a different layer/mask.
Similar to multi-layer PCB design
EED102 - VH - L1 10
END OF LECTURE
EED102 - VH - L1 11
