Laboratory Record
CSE2003 Digital Logic and
Computer Architecture
A11+D11+A12+D12+A13, BL2024250100711
Fall Semester:2024-2025
Name of the student: Akshat Dwivedi Register
Number: 23BAI10283
B.Tech Computer Science and Engineering (AI&ML)
Programme Output (POs):
1. Engineering knowledge: Apply the knowledge of mathematics, science, engineering
fundamentals, and an engineering specialization to the solution of complex engineering
problems.
2. Problem analysis: Identify, formulate, review research literature, and analyze complex
engineering problems reaching substantiated conclusions using first principles of
mathematics, natural sciences, and engineering sciences.
3. Design/development of solutions: Design solutions for complex engineering problems
and design system components or processes that meet the specified needs with
appropriate consideration for the public health and safety, and the cultural, societal, and
environmental considerations.
4. Conduct investigations of complex problems: Use research-based knowledge and
research methods including design of experiments, analysis and interpretation of data,
and synthesis of the information to provide valid conclusions.
5. Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modeling to complex
engineering activities with an understanding of the limitations.
6. The engineer and society: Apply reasoning informed by the contextual knowledge to
assess societal, health, safety, legal and cultural issues and the consequent responsibilities
relevant to the professional engineering practice.
7. Environment and sustainability: Understand the impact of the professional engineering
solutions in societal and environmental contexts, and demonstrate the knowledge of, and
need for sustainable development.
8. Ethics: Apply ethical principles and commit to professional ethics and responsibilities
and norms of the engineering practice.
9. Individual and teamwork: Function effectively as an individual, and as a member or
leader in diverse teams, and in multidisciplinary settings.
10. Communication: Communicate effectively on complex engineering activities with the
engineering community and with society at large, such as, being able to comprehend and
write effective reports and design documentation, make effective presentations, and give
and receive clear instructions.
11. Project management and finance: Demonstrate knowledge and understanding of the
engineering and management principles and apply these to one’s own work, as a member
and leader in a team, to manage projects and in multidisciplinary environments.
12. Life-long learning: Recognize the need for, and have the preparation and ability to engage
in independent and life-long learning in the broadest context of technological change.
Programme Specific Outcomes (PSOs):
PSO1. Ability to comprehend, assess, and demonstrate knowledge of human cognition, artificial
intelligence, machine learning, and data engineering concerning real-world
circumstances to address future challenges.
PSO2. Capability to gain computational expertise and project-development skills in the areas of
artificial intelligence, computer vision, deep learning, and machine learning.
Programme Educational Outcome (PEOs):
PEO 1. A competent professional with knowledge of Artificial Intelligence and Machine
Learning by designing innovative solutions to real-life problems that are technically
sound, economically viable, and socially acceptable.
PEO 2. Capable of pursuing higher studies, research activities, and entrepreneurial skills by
adapting to new technologies and constantly upgrading their skills with an attitude
towards lifelong learning.
PEO 3. Proficient team leaders with effective communication capable of working on
multidisciplinary projects and diverse professional activities conforming to ethical
norms.
Index
Page
Exp. No. Name of the Experiment
Number
1. Design and verify the truth table of logic gates. 1
To simplify the given expression and to realize it using Basic gates
2.
and Universal gate.
To Design and implement the circuit for the following 4bit Code
conversion.
3.
a. Binary to Gray Code
b. Gray to Binary Code
To realize
a. Half Adder and Full Adder
4.
b. Half Subtractor and Full Subtractor by using
Basic gates and NAND gates.
a. Truth Table verification of
1) RS Flip Flop 2) T type Flip Flop.
5.
3) D type Flip Flop. 4) JK Flip Flop.
b. Conversion of one type of Flip flop to another.
a. To design and set up a 4:1 Multiplexer (MUX) using only
NAND gates.
6.
b. To design and set up a 1:4 Demultiplexer (DEMUX) using only
NAND gates.
Implementation of a 3-bit SIPO and SISO shift register using flip
7.
flops.
8. Implementation of a 3-bit PIPO and PISO shift register using flip
flops.
9. Design and verify the 4-bit synchronous counter.
10. Design and verify the 4-bit asynchronous counter.
Exp No: 1
Design and verify the truth table of logic gates
(Date)
Aim:
To design and verify the truth table of logic gates using NI software.
Objective:
1. To ensure that the designed logic gates and their combinations perform as expected
by comparing the simulated outputs against the theoretical truth tables.
2. To validate the design of logic circuits before physical implementation, reducing the
risk of errors and saving time and resources .
Simulation Tool:
Simulation tools used are: Function Generator, four channel oscilloscope, OR gate, AND gate,
NOT gate, XOR gate, XNOR gate, NOR gate, NAND gate, connecting wires, ground source.
Theory:
Logic gates are fundamental building blocks of digital circuit. They perform basic logic
operations on one or more binary inputs to produce a single binary output.
These gates are implemented using electronic components such as transistors and are essential
in the design of digital systems like computers and communication devices. The primary logic
gates include AND, OR, NOT, NAND, NOR, XOR, and XNOR.
Procedure:
1. AND Gate Circuit Diagram :
1|Page
2. OR Gate Circuit Diagram:
3. NOT Gate circuit Diagram:
2|Page
4. X-OR Gate Circuit Diagram:
5. X-NOR Gate Circuit Diagram:
6. NOR Gate Circuit Diagram:
7.NAND Gate Circuit Diagram:
3|Page
Output: 1.
AND Gate Simulation:
2.OR Gate Simulation:
4|Page
2. NOT Gate Simulation:
3. X-OR Gate Simulation:
4. X-NOR Gate Simulation:
5|Page
5. NOR Gate Simulation:
6. NAND Gate Simulation:
6|Page
Result:
1. Truth Table of AND gate:
2. Truth Table of OR gate:
3. Truth Table of NOT gate:
4. Truth Table of X-OR gate:
7|Page
5. Truth Table of X-NOR gate:
6. Truth Table of NOR gate:
7. Truth Table of NAND gate:
References:
1. NI Multisim Software.
8|Page
9|Page
